cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap1-usb.h (3810B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __SOC_TI_OMAP1_USB
      3#define __SOC_TI_OMAP1_USB
      4/*
      5 * Constants in this file are used all over the place, in platform
      6 * code, as well as the udc, phy and ohci drivers.
      7 * This is not a great design, but unlikely to get fixed after
      8 * such a long time. Don't do this elsewhere.
      9 */
     10
     11#define OMAP1_OTG_BASE			0xfffb0400
     12#define OMAP1_UDC_BASE			0xfffb4000
     13
     14#define OMAP2_UDC_BASE			0x4805e200
     15#define OMAP2_OTG_BASE			0x4805e300
     16#define OTG_BASE			OMAP1_OTG_BASE
     17#define UDC_BASE			OMAP1_UDC_BASE
     18
     19/*
     20 * OTG and transceiver registers, for OMAPs starting with ARM926
     21 */
     22#define OTG_REV				(OTG_BASE + 0x00)
     23#define OTG_SYSCON_1			(OTG_BASE + 0x04)
     24#	define	 USB2_TRX_MODE(w)	(((w)>>24)&0x07)
     25#	define	 USB1_TRX_MODE(w)	(((w)>>20)&0x07)
     26#	define	 USB0_TRX_MODE(w)	(((w)>>16)&0x07)
     27#	define	 OTG_IDLE_EN		(1 << 15)
     28#	define	 HST_IDLE_EN		(1 << 14)
     29#	define	 DEV_IDLE_EN		(1 << 13)
     30#	define	 OTG_RESET_DONE		(1 << 2)
     31#	define	 OTG_SOFT_RESET		(1 << 1)
     32#define OTG_SYSCON_2			(OTG_BASE + 0x08)
     33#	define	 OTG_EN			(1 << 31)
     34#	define	 USBX_SYNCHRO		(1 << 30)
     35#	define	 OTG_MST16		(1 << 29)
     36#	define	 SRP_GPDATA		(1 << 28)
     37#	define	 SRP_GPDVBUS		(1 << 27)
     38#	define	 SRP_GPUVBUS(w)		(((w)>>24)&0x07)
     39#	define	 A_WAIT_VRISE(w)	(((w)>>20)&0x07)
     40#	define	 B_ASE_BRST(w)		(((w)>>16)&0x07)
     41#	define	 SRP_DPW		(1 << 14)
     42#	define	 SRP_DATA		(1 << 13)
     43#	define	 SRP_VBUS		(1 << 12)
     44#	define	 OTG_PADEN		(1 << 10)
     45#	define	 HMC_PADEN		(1 << 9)
     46#	define	 UHOST_EN		(1 << 8)
     47#	define	 HMC_TLLSPEED		(1 << 7)
     48#	define	 HMC_TLLATTACH		(1 << 6)
     49#	define	 OTG_HMC(w)		(((w)>>0)&0x3f)
     50#define OTG_CTRL			(OTG_BASE + 0x0c)
     51#	define	 OTG_USB2_EN		(1 << 29)
     52#	define	 OTG_USB2_DP		(1 << 28)
     53#	define	 OTG_USB2_DM		(1 << 27)
     54#	define	 OTG_USB1_EN		(1 << 26)
     55#	define	 OTG_USB1_DP		(1 << 25)
     56#	define	 OTG_USB1_DM		(1 << 24)
     57#	define	 OTG_USB0_EN		(1 << 23)
     58#	define	 OTG_USB0_DP		(1 << 22)
     59#	define	 OTG_USB0_DM		(1 << 21)
     60#	define	 OTG_ASESSVLD		(1 << 20)
     61#	define	 OTG_BSESSEND		(1 << 19)
     62#	define	 OTG_BSESSVLD		(1 << 18)
     63#	define	 OTG_VBUSVLD		(1 << 17)
     64#	define	 OTG_ID			(1 << 16)
     65#	define	 OTG_DRIVER_SEL		(1 << 15)
     66#	define	 OTG_A_SETB_HNPEN	(1 << 12)
     67#	define	 OTG_A_BUSREQ		(1 << 11)
     68#	define	 OTG_B_HNPEN		(1 << 9)
     69#	define	 OTG_B_BUSREQ		(1 << 8)
     70#	define	 OTG_BUSDROP		(1 << 7)
     71#	define	 OTG_PULLDOWN		(1 << 5)
     72#	define	 OTG_PULLUP		(1 << 4)
     73#	define	 OTG_DRV_VBUS		(1 << 3)
     74#	define	 OTG_PD_VBUS		(1 << 2)
     75#	define	 OTG_PU_VBUS		(1 << 1)
     76#	define	 OTG_PU_ID		(1 << 0)
     77#define OTG_IRQ_EN			(OTG_BASE + 0x10)	/* 16-bit */
     78#	define	 DRIVER_SWITCH		(1 << 15)
     79#	define	 A_VBUS_ERR		(1 << 13)
     80#	define	 A_REQ_TMROUT		(1 << 12)
     81#	define	 A_SRP_DETECT		(1 << 11)
     82#	define	 B_HNP_FAIL		(1 << 10)
     83#	define	 B_SRP_TMROUT		(1 << 9)
     84#	define	 B_SRP_DONE		(1 << 8)
     85#	define	 B_SRP_STARTED		(1 << 7)
     86#	define	 OPRT_CHG		(1 << 0)
     87#define OTG_IRQ_SRC			(OTG_BASE + 0x14)	/* 16-bit */
     88	// same bits as in IRQ_EN
     89#define OTG_OUTCTRL			(OTG_BASE + 0x18)	/* 16-bit */
     90#	define	 OTGVPD			(1 << 14)
     91#	define	 OTGVPU			(1 << 13)
     92#	define	 OTGPUID		(1 << 12)
     93#	define	 USB2VDR		(1 << 10)
     94#	define	 USB2PDEN		(1 << 9)
     95#	define	 USB2PUEN		(1 << 8)
     96#	define	 USB1VDR		(1 << 6)
     97#	define	 USB1PDEN		(1 << 5)
     98#	define	 USB1PUEN		(1 << 4)
     99#	define	 USB0VDR		(1 << 2)
    100#	define	 USB0PDEN		(1 << 1)
    101#	define	 USB0PUEN		(1 << 0)
    102#define OTG_TEST			(OTG_BASE + 0x20)	/* 16-bit */
    103#define OTG_VENDOR_CODE			(OTG_BASE + 0xfc)	/* 16-bit */
    104
    105/*-------------------------------------------------------------------------*/
    106
    107/* OMAP1 */
    108#define	USB_TRANSCEIVER_CTRL		(0xfffe1000 + 0x0064)
    109#	define	CONF_USB2_UNI_R		(1 << 8)
    110#	define	CONF_USB1_UNI_R		(1 << 7)
    111#	define	CONF_USB_PORT0_R(x)	(((x)>>4)&0x7)
    112#	define	CONF_USB0_ISOLATE_R	(1 << 3)
    113#	define	CONF_USB_PWRDN_DM_R	(1 << 2)
    114#	define	CONF_USB_PWRDN_DP_R	(1 << 1)
    115
    116#endif