cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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regs.h (4131B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __LINUX_ULPI_REGS_H
      3#define __LINUX_ULPI_REGS_H
      4
      5/*
      6 * Macros for Set and Clear
      7 * See ULPI 1.1 specification to find the registers with Set and Clear offsets
      8 */
      9#define ULPI_SET(a)				(a + 1)
     10#define ULPI_CLR(a)				(a + 2)
     11
     12/*
     13 * Register Map
     14 */
     15#define ULPI_VENDOR_ID_LOW			0x00
     16#define ULPI_VENDOR_ID_HIGH			0x01
     17#define ULPI_PRODUCT_ID_LOW			0x02
     18#define ULPI_PRODUCT_ID_HIGH			0x03
     19#define ULPI_FUNC_CTRL				0x04
     20#define ULPI_IFC_CTRL				0x07
     21#define ULPI_OTG_CTRL				0x0a
     22#define ULPI_USB_INT_EN_RISE			0x0d
     23#define ULPI_USB_INT_EN_FALL			0x10
     24#define ULPI_USB_INT_STS			0x13
     25#define ULPI_USB_INT_LATCH			0x14
     26#define ULPI_DEBUG				0x15
     27#define ULPI_SCRATCH				0x16
     28/* Optional Carkit Registers */
     29#define ULPI_CARKIT_CTRL			0x19
     30#define ULPI_CARKIT_INT_DELAY			0x1c
     31#define ULPI_CARKIT_INT_EN			0x1d
     32#define ULPI_CARKIT_INT_STS			0x20
     33#define ULPI_CARKIT_INT_LATCH			0x21
     34#define ULPI_CARKIT_PLS_CTRL			0x22
     35/* Other Optional Registers */
     36#define ULPI_TX_POS_WIDTH			0x25
     37#define ULPI_TX_NEG_WIDTH			0x26
     38#define ULPI_POLARITY_RECOVERY			0x27
     39/* Access Extended Register Set */
     40#define ULPI_ACCESS_EXTENDED			0x2f
     41/* Vendor Specific */
     42#define ULPI_VENDOR_SPECIFIC			0x30
     43/* Extended Registers */
     44#define ULPI_EXT_VENDOR_SPECIFIC		0x80
     45
     46/*
     47 * Register Bits
     48 */
     49
     50/* Function Control */
     51#define ULPI_FUNC_CTRL_XCVRSEL			BIT(0)
     52#define  ULPI_FUNC_CTRL_XCVRSEL_MASK		0x3
     53#define  ULPI_FUNC_CTRL_HIGH_SPEED		0x0
     54#define  ULPI_FUNC_CTRL_FULL_SPEED		0x1
     55#define  ULPI_FUNC_CTRL_LOW_SPEED		0x2
     56#define  ULPI_FUNC_CTRL_FS4LS			0x3
     57#define ULPI_FUNC_CTRL_TERMSELECT		BIT(2)
     58#define ULPI_FUNC_CTRL_OPMODE			BIT(3)
     59#define  ULPI_FUNC_CTRL_OPMODE_MASK		(0x3 << 3)
     60#define  ULPI_FUNC_CTRL_OPMODE_NORMAL		(0x0 << 3)
     61#define  ULPI_FUNC_CTRL_OPMODE_NONDRIVING	(0x1 << 3)
     62#define  ULPI_FUNC_CTRL_OPMODE_DISABLE_NRZI	(0x2 << 3)
     63#define  ULPI_FUNC_CTRL_OPMODE_NOSYNC_NOEOP	(0x3 << 3)
     64#define ULPI_FUNC_CTRL_RESET			BIT(5)
     65#define ULPI_FUNC_CTRL_SUSPENDM			BIT(6)
     66
     67/* Interface Control */
     68#define ULPI_IFC_CTRL_6_PIN_SERIAL_MODE		BIT(0)
     69#define ULPI_IFC_CTRL_3_PIN_SERIAL_MODE		BIT(1)
     70#define ULPI_IFC_CTRL_CARKITMODE		BIT(2)
     71#define ULPI_IFC_CTRL_CLOCKSUSPENDM		BIT(3)
     72#define ULPI_IFC_CTRL_AUTORESUME		BIT(4)
     73#define ULPI_IFC_CTRL_EXTERNAL_VBUS		BIT(5)
     74#define ULPI_IFC_CTRL_PASSTHRU			BIT(6)
     75#define ULPI_IFC_CTRL_PROTECT_IFC_DISABLE	BIT(7)
     76
     77/* OTG Control */
     78#define ULPI_OTG_CTRL_ID_PULLUP			BIT(0)
     79#define ULPI_OTG_CTRL_DP_PULLDOWN		BIT(1)
     80#define ULPI_OTG_CTRL_DM_PULLDOWN		BIT(2)
     81#define ULPI_OTG_CTRL_DISCHRGVBUS		BIT(3)
     82#define ULPI_OTG_CTRL_CHRGVBUS			BIT(4)
     83#define ULPI_OTG_CTRL_DRVVBUS			BIT(5)
     84#define ULPI_OTG_CTRL_DRVVBUS_EXT		BIT(6)
     85#define ULPI_OTG_CTRL_EXTVBUSIND		BIT(7)
     86
     87/* USB Interrupt Enable Rising,
     88 * USB Interrupt Enable Falling,
     89 * USB Interrupt Status and
     90 * USB Interrupt Latch
     91 */
     92#define ULPI_INT_HOST_DISCONNECT		BIT(0)
     93#define ULPI_INT_VBUS_VALID			BIT(1)
     94#define ULPI_INT_SESS_VALID			BIT(2)
     95#define ULPI_INT_SESS_END			BIT(3)
     96#define ULPI_INT_IDGRD				BIT(4)
     97
     98/* Debug */
     99#define ULPI_DEBUG_LINESTATE0			BIT(0)
    100#define ULPI_DEBUG_LINESTATE1			BIT(1)
    101
    102/* Carkit Control */
    103#define ULPI_CARKIT_CTRL_CARKITPWR		BIT(0)
    104#define ULPI_CARKIT_CTRL_IDGNDDRV		BIT(1)
    105#define ULPI_CARKIT_CTRL_TXDEN			BIT(2)
    106#define ULPI_CARKIT_CTRL_RXDEN			BIT(3)
    107#define ULPI_CARKIT_CTRL_SPKLEFTEN		BIT(4)
    108#define ULPI_CARKIT_CTRL_SPKRIGHTEN		BIT(5)
    109#define ULPI_CARKIT_CTRL_MICEN			BIT(6)
    110
    111/* Carkit Interrupt Enable */
    112#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE		BIT(0)
    113#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL		BIT(1)
    114#define ULPI_CARKIT_INT_EN_CARINTDET		BIT(2)
    115#define ULPI_CARKIT_INT_EN_DP_RISE		BIT(3)
    116#define ULPI_CARKIT_INT_EN_DP_FALL		BIT(4)
    117
    118/* Carkit Interrupt Status and
    119 * Carkit Interrupt Latch
    120 */
    121#define ULPI_CARKIT_INT_IDFLOAT			BIT(0)
    122#define ULPI_CARKIT_INT_CARINTDET		BIT(1)
    123#define ULPI_CARKIT_INT_DP			BIT(2)
    124
    125/* Carkit Pulse Control*/
    126#define ULPI_CARKIT_PLS_CTRL_TXPLSEN		BIT(0)
    127#define ULPI_CARKIT_PLS_CTRL_RXPLSEN		BIT(1)
    128#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN	BIT(2)
    129#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN	BIT(3)
    130
    131#endif /* __LINUX_ULPI_REGS_H */