cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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musb.h (3600B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * This is used to for host and peripheral modes of the driver for
      4 * Inventra (Multidrop) Highspeed Dual-Role Controllers:  (M)HDRC.
      5 *
      6 * Board initialization should put one of these into dev->platform_data,
      7 * probably on some platform_device named "musb-hdrc".  It encapsulates
      8 * key configuration differences between boards.
      9 */
     10
     11#ifndef __LINUX_USB_MUSB_H
     12#define __LINUX_USB_MUSB_H
     13
     14/* The USB role is defined by the connector used on the board, so long as
     15 * standards are being followed.  (Developer boards sometimes won't.)
     16 */
     17enum musb_mode {
     18	MUSB_UNDEFINED = 0,
     19	MUSB_HOST,		/* A or Mini-A connector */
     20	MUSB_PERIPHERAL,	/* B or Mini-B connector */
     21	MUSB_OTG		/* Mini-AB connector */
     22};
     23
     24struct clk;
     25
     26enum musb_fifo_style {
     27	FIFO_RXTX,
     28	FIFO_TX,
     29	FIFO_RX
     30} __attribute__ ((packed));
     31
     32enum musb_buf_mode {
     33	BUF_SINGLE,
     34	BUF_DOUBLE
     35} __attribute__ ((packed));
     36
     37struct musb_fifo_cfg {
     38	u8			hw_ep_num;
     39	enum musb_fifo_style	style;
     40	enum musb_buf_mode	mode;
     41	u16			maxpacket;
     42};
     43
     44#define MUSB_EP_FIFO(ep, st, m, pkt)		\
     45{						\
     46	.hw_ep_num	= ep,			\
     47	.style		= st,			\
     48	.mode		= m,			\
     49	.maxpacket	= pkt,			\
     50}
     51
     52#define MUSB_EP_FIFO_SINGLE(ep, st, pkt)	\
     53	MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt)
     54
     55#define MUSB_EP_FIFO_DOUBLE(ep, st, pkt)	\
     56	MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt)
     57
     58struct musb_hdrc_eps_bits {
     59	const char	name[16];
     60	u8		bits;
     61};
     62
     63struct musb_hdrc_config {
     64	struct musb_fifo_cfg	*fifo_cfg;	/* board fifo configuration */
     65	unsigned		fifo_cfg_size;	/* size of the fifo configuration */
     66
     67	/* MUSB configuration-specific details */
     68	unsigned	multipoint:1;	/* multipoint device */
     69	unsigned	dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */
     70
     71	/* need to explicitly de-assert the port reset after resume? */
     72	unsigned	host_port_deassert_reset_at_resume:1;
     73
     74	u8		num_eps;	/* number of endpoints _with_ ep0 */
     75	u8		ram_bits;	/* ram address size */
     76
     77	u32		maximum_speed;
     78};
     79
     80struct musb_hdrc_platform_data {
     81	/* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
     82	u8		mode;
     83
     84	/* for clk_get() */
     85	const char	*clock;
     86
     87	/* (HOST or OTG) switch VBUS on/off */
     88	int		(*set_vbus)(struct device *dev, int is_on);
     89
     90	/* (HOST or OTG) mA/2 power supplied on (default = 8mA) */
     91	u8		power;
     92
     93	/* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */
     94	u8		min_power;
     95
     96	/* (HOST or OTG) msec/2 after VBUS on till power good */
     97	u8		potpgt;
     98
     99	/* (HOST or OTG) program PHY for external Vbus */
    100	unsigned	extvbus:1;
    101
    102	/* Power the device on or off */
    103	int		(*set_power)(int state);
    104
    105	/* MUSB configuration-specific details */
    106	const struct musb_hdrc_config *config;
    107
    108	/* Architecture specific board data	*/
    109	void		*board_data;
    110
    111	/* Platform specific struct musb_ops pointer */
    112	const void	*platform_ops;
    113};
    114
    115enum musb_vbus_id_status {
    116	MUSB_UNKNOWN = 0,
    117	MUSB_ID_GROUND,
    118	MUSB_ID_FLOAT,
    119	MUSB_VBUS_VALID,
    120	MUSB_VBUS_OFF,
    121};
    122
    123#if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
    124int musb_mailbox(enum musb_vbus_id_status status);
    125#else
    126static inline int musb_mailbox(enum musb_vbus_id_status status)
    127{
    128	return 0;
    129}
    130#endif
    131
    132/* TUSB 6010 support */
    133
    134#define	TUSB6010_OSCCLK_60	16667	/* psec/clk @ 60.0 MHz */
    135#define	TUSB6010_REFCLK_24	41667	/* psec/clk @ 24.0 MHz XI */
    136#define	TUSB6010_REFCLK_19	52083	/* psec/clk @ 19.2 MHz CLKIN */
    137
    138#ifdef	CONFIG_ARCH_OMAP2
    139
    140extern int __init tusb6010_setup_interface(
    141		struct musb_hdrc_platform_data *data,
    142		unsigned ps_refclk, unsigned waitpin,
    143		unsigned async_cs, unsigned sync_cs,
    144		unsigned irq, unsigned dmachan);
    145
    146extern int tusb6010_platform_retime(unsigned is_refclk);
    147
    148#endif	/* OMAP2 */
    149
    150#endif /* __LINUX_USB_MUSB_H */