dm355_ccdc.h (7291B)
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Copyright (C) 2005-2009 Texas Instruments Inc 4 */ 5#ifndef _DM355_CCDC_H 6#define _DM355_CCDC_H 7#include <media/davinci/ccdc_types.h> 8#include <media/davinci/vpfe_types.h> 9 10/* enum for No of pixel per line to be avg. in Black Clamping */ 11enum ccdc_sample_length { 12 CCDC_SAMPLE_1PIXELS, 13 CCDC_SAMPLE_2PIXELS, 14 CCDC_SAMPLE_4PIXELS, 15 CCDC_SAMPLE_8PIXELS, 16 CCDC_SAMPLE_16PIXELS 17}; 18 19/* enum for No of lines in Black Clamping */ 20enum ccdc_sample_line { 21 CCDC_SAMPLE_1LINES, 22 CCDC_SAMPLE_2LINES, 23 CCDC_SAMPLE_4LINES, 24 CCDC_SAMPLE_8LINES, 25 CCDC_SAMPLE_16LINES 26}; 27 28/* enum for Alaw gamma width */ 29enum ccdc_gamma_width { 30 CCDC_GAMMA_BITS_13_4, 31 CCDC_GAMMA_BITS_12_3, 32 CCDC_GAMMA_BITS_11_2, 33 CCDC_GAMMA_BITS_10_1, 34 CCDC_GAMMA_BITS_09_0 35}; 36 37enum ccdc_colpats { 38 CCDC_RED, 39 CCDC_GREEN_RED, 40 CCDC_GREEN_BLUE, 41 CCDC_BLUE 42}; 43 44struct ccdc_col_pat { 45 enum ccdc_colpats olop; 46 enum ccdc_colpats olep; 47 enum ccdc_colpats elop; 48 enum ccdc_colpats elep; 49}; 50 51enum ccdc_datasft { 52 CCDC_DATA_NO_SHIFT, 53 CCDC_DATA_SHIFT_1BIT, 54 CCDC_DATA_SHIFT_2BIT, 55 CCDC_DATA_SHIFT_3BIT, 56 CCDC_DATA_SHIFT_4BIT, 57 CCDC_DATA_SHIFT_5BIT, 58 CCDC_DATA_SHIFT_6BIT 59}; 60 61enum ccdc_data_size { 62 CCDC_DATA_16BITS, 63 CCDC_DATA_15BITS, 64 CCDC_DATA_14BITS, 65 CCDC_DATA_13BITS, 66 CCDC_DATA_12BITS, 67 CCDC_DATA_11BITS, 68 CCDC_DATA_10BITS, 69 CCDC_DATA_8BITS 70}; 71enum ccdc_mfilt1 { 72 CCDC_NO_MEDIAN_FILTER1, 73 CCDC_AVERAGE_FILTER1, 74 CCDC_MEDIAN_FILTER1 75}; 76 77enum ccdc_mfilt2 { 78 CCDC_NO_MEDIAN_FILTER2, 79 CCDC_AVERAGE_FILTER2, 80 CCDC_MEDIAN_FILTER2 81}; 82 83/* structure for ALaw */ 84struct ccdc_a_law { 85 /* Enable/disable A-Law */ 86 unsigned char enable; 87 /* Gamma Width Input */ 88 enum ccdc_gamma_width gamma_wd; 89}; 90 91/* structure for Black Clamping */ 92struct ccdc_black_clamp { 93 /* only if bClampEnable is TRUE */ 94 unsigned char b_clamp_enable; 95 /* only if bClampEnable is TRUE */ 96 enum ccdc_sample_length sample_pixel; 97 /* only if bClampEnable is TRUE */ 98 enum ccdc_sample_line sample_ln; 99 /* only if bClampEnable is TRUE */ 100 unsigned short start_pixel; 101 /* only if bClampEnable is FALSE */ 102 unsigned short sgain; 103 unsigned short dc_sub; 104}; 105 106/* structure for Black Level Compensation */ 107struct ccdc_black_compensation { 108 /* Constant value to subtract from Red component */ 109 unsigned char r; 110 /* Constant value to subtract from Gr component */ 111 unsigned char gr; 112 /* Constant value to subtract from Blue component */ 113 unsigned char b; 114 /* Constant value to subtract from Gb component */ 115 unsigned char gb; 116}; 117 118struct ccdc_float { 119 int integer; 120 unsigned int decimal; 121}; 122 123#define CCDC_CSC_COEFF_TABLE_SIZE 16 124/* structure for color space converter */ 125struct ccdc_csc { 126 unsigned char enable; 127 /* 128 * S8Q5. Use 2 decimal precision, user values range from -3.00 to 3.99. 129 * example - to use 1.03, set integer part as 1, and decimal part as 3 130 * to use -1.03, set integer part as -1 and decimal part as 3 131 */ 132 struct ccdc_float coeff[CCDC_CSC_COEFF_TABLE_SIZE]; 133}; 134 135/* Structures for Vertical Defect Correction*/ 136enum ccdc_vdf_csl { 137 CCDC_VDF_NORMAL, 138 CCDC_VDF_HORZ_INTERPOL_SAT, 139 CCDC_VDF_HORZ_INTERPOL 140}; 141 142enum ccdc_vdf_cuda { 143 CCDC_VDF_WHOLE_LINE_CORRECT, 144 CCDC_VDF_UPPER_DISABLE 145}; 146 147enum ccdc_dfc_mwr { 148 CCDC_DFC_MWR_WRITE_COMPLETE, 149 CCDC_DFC_WRITE_REG 150}; 151 152enum ccdc_dfc_mrd { 153 CCDC_DFC_READ_COMPLETE, 154 CCDC_DFC_READ_REG 155}; 156 157enum ccdc_dfc_ma_rst { 158 CCDC_DFC_INCR_ADDR, 159 CCDC_DFC_CLR_ADDR 160}; 161 162enum ccdc_dfc_mclr { 163 CCDC_DFC_CLEAR_COMPLETE, 164 CCDC_DFC_CLEAR 165}; 166 167struct ccdc_dft_corr_ctl { 168 enum ccdc_vdf_csl vdfcsl; 169 enum ccdc_vdf_cuda vdfcuda; 170 unsigned int vdflsft; 171}; 172 173struct ccdc_dft_corr_mem_ctl { 174 enum ccdc_dfc_mwr dfcmwr; 175 enum ccdc_dfc_mrd dfcmrd; 176 enum ccdc_dfc_ma_rst dfcmarst; 177 enum ccdc_dfc_mclr dfcmclr; 178}; 179 180#define CCDC_DFT_TABLE_SIZE 16 181/* 182 * Main Structure for vertical defect correction. Vertical defect 183 * correction can correct up to 16 defects if defects less than 16 184 * then pad the rest with 0 185 */ 186struct ccdc_vertical_dft { 187 unsigned char ver_dft_en; 188 unsigned char gen_dft_en; 189 unsigned int saturation_ctl; 190 struct ccdc_dft_corr_ctl dft_corr_ctl; 191 struct ccdc_dft_corr_mem_ctl dft_corr_mem_ctl; 192 int table_size; 193 unsigned int dft_corr_horz[CCDC_DFT_TABLE_SIZE]; 194 unsigned int dft_corr_vert[CCDC_DFT_TABLE_SIZE]; 195 unsigned int dft_corr_sub1[CCDC_DFT_TABLE_SIZE]; 196 unsigned int dft_corr_sub2[CCDC_DFT_TABLE_SIZE]; 197 unsigned int dft_corr_sub3[CCDC_DFT_TABLE_SIZE]; 198}; 199 200struct ccdc_data_offset { 201 unsigned char horz_offset; 202 unsigned char vert_offset; 203}; 204 205/* 206 * Structure for CCDC configuration parameters for raw capture mode passed 207 * by application 208 */ 209struct ccdc_config_params_raw { 210 /* data shift to be applied before storing */ 211 enum ccdc_datasft datasft; 212 /* data size value from 8 to 16 bits */ 213 enum ccdc_data_size data_sz; 214 /* median filter for sdram */ 215 enum ccdc_mfilt1 mfilt1; 216 enum ccdc_mfilt2 mfilt2; 217 /* low pass filter enable/disable */ 218 unsigned char lpf_enable; 219 /* Threshold of median filter */ 220 int med_filt_thres; 221 /* 222 * horz and vertical data offset. Applicable for defect correction 223 * and lsc 224 */ 225 struct ccdc_data_offset data_offset; 226 /* Structure for Optional A-Law */ 227 struct ccdc_a_law alaw; 228 /* Structure for Optical Black Clamp */ 229 struct ccdc_black_clamp blk_clamp; 230 /* Structure for Black Compensation */ 231 struct ccdc_black_compensation blk_comp; 232 /* structure for vertical Defect Correction Module Configuration */ 233 struct ccdc_vertical_dft vertical_dft; 234 /* structure for color space converter Module Configuration */ 235 struct ccdc_csc csc; 236 /* color patters for bayer capture */ 237 struct ccdc_col_pat col_pat_field0; 238 struct ccdc_col_pat col_pat_field1; 239}; 240 241#ifdef __KERNEL__ 242#include <linux/io.h> 243 244#define CCDC_WIN_PAL {0, 0, 720, 576} 245#define CCDC_WIN_VGA {0, 0, 640, 480} 246 247struct ccdc_params_ycbcr { 248 /* pixel format */ 249 enum ccdc_pixfmt pix_fmt; 250 /* progressive or interlaced frame */ 251 enum ccdc_frmfmt frm_fmt; 252 /* video window */ 253 struct v4l2_rect win; 254 /* field id polarity */ 255 enum vpfe_pin_pol fid_pol; 256 /* vertical sync polarity */ 257 enum vpfe_pin_pol vd_pol; 258 /* horizontal sync polarity */ 259 enum vpfe_pin_pol hd_pol; 260 /* enable BT.656 embedded sync mode */ 261 int bt656_enable; 262 /* cb:y:cr:y or y:cb:y:cr in memory */ 263 enum ccdc_pixorder pix_order; 264 /* interleaved or separated fields */ 265 enum ccdc_buftype buf_type; 266}; 267 268/* Gain applied to Raw Bayer data */ 269struct ccdc_gain { 270 unsigned short r_ye; 271 unsigned short gr_cy; 272 unsigned short gb_g; 273 unsigned short b_mg; 274}; 275 276/* Structure for CCDC configuration parameters for raw capture mode */ 277struct ccdc_params_raw { 278 /* pixel format */ 279 enum ccdc_pixfmt pix_fmt; 280 /* progressive or interlaced frame */ 281 enum ccdc_frmfmt frm_fmt; 282 /* video window */ 283 struct v4l2_rect win; 284 /* field id polarity */ 285 enum vpfe_pin_pol fid_pol; 286 /* vertical sync polarity */ 287 enum vpfe_pin_pol vd_pol; 288 /* horizontal sync polarity */ 289 enum vpfe_pin_pol hd_pol; 290 /* interleaved or separated fields */ 291 enum ccdc_buftype buf_type; 292 /* Gain values */ 293 struct ccdc_gain gain; 294 /* offset */ 295 unsigned int ccdc_offset; 296 /* horizontal flip enable */ 297 unsigned char horz_flip_enable; 298 /* 299 * enable to store the image in inverse order in memory 300 * (bottom to top) 301 */ 302 unsigned char image_invert_enable; 303 /* Configurable part of raw data */ 304 struct ccdc_config_params_raw config_params; 305}; 306 307#endif 308#endif /* DM355_CCDC_H */