cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

exynos-fimc.h (4696B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Samsung S5P/Exynos4 SoC series camera interface driver header
      4 *
      5 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
      6 * Sylwester Nawrocki <s.nawrocki@samsung.com>
      7 */
      8
      9#ifndef S5P_FIMC_H_
     10#define S5P_FIMC_H_
     11
     12#include <media/media-entity.h>
     13#include <media/v4l2-dev.h>
     14#include <media/v4l2-mediabus.h>
     15
     16/*
     17 * Enumeration of data inputs to the camera subsystem.
     18 */
     19enum fimc_input {
     20	FIMC_INPUT_PARALLEL_0	= 1,
     21	FIMC_INPUT_PARALLEL_1,
     22	FIMC_INPUT_MIPI_CSI2_0	= 3,
     23	FIMC_INPUT_MIPI_CSI2_1,
     24	FIMC_INPUT_WRITEBACK_A	= 5,
     25	FIMC_INPUT_WRITEBACK_B,
     26	FIMC_INPUT_WRITEBACK_ISP = 5,
     27};
     28
     29/*
     30 * Enumeration of the FIMC data bus types.
     31 */
     32enum fimc_bus_type {
     33	/* Camera parallel bus */
     34	FIMC_BUS_TYPE_ITU_601 = 1,
     35	/* Camera parallel bus with embedded synchronization */
     36	FIMC_BUS_TYPE_ITU_656,
     37	/* Camera MIPI-CSI2 serial bus */
     38	FIMC_BUS_TYPE_MIPI_CSI2,
     39	/* FIFO link from LCD controller (WriteBack A) */
     40	FIMC_BUS_TYPE_LCD_WRITEBACK_A,
     41	/* FIFO link from LCD controller (WriteBack B) */
     42	FIMC_BUS_TYPE_LCD_WRITEBACK_B,
     43	/* FIFO link from FIMC-IS */
     44	FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
     45};
     46
     47#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
     48#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
     49
     50/*
     51 * The subdevices' group IDs.
     52 */
     53#define GRP_ID_SENSOR		(1 << 8)
     54#define GRP_ID_FIMC_IS_SENSOR	(1 << 9)
     55#define GRP_ID_WRITEBACK	(1 << 10)
     56#define GRP_ID_CSIS		(1 << 11)
     57#define GRP_ID_FIMC		(1 << 12)
     58#define GRP_ID_FLITE		(1 << 13)
     59#define GRP_ID_FIMC_IS		(1 << 14)
     60
     61/**
     62 * struct fimc_source_info - video source description required for the host
     63 *			     interface configuration
     64 *
     65 * @fimc_bus_type: FIMC camera input type
     66 * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
     67 * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
     68 * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
     69 */
     70struct fimc_source_info {
     71	enum fimc_bus_type fimc_bus_type;
     72	enum fimc_bus_type sensor_bus_type;
     73	u16 flags;
     74	u16 mux_id;
     75};
     76
     77/*
     78 * v4l2_device notification id. This is only for internal use in the kernel.
     79 * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
     80 * frame capture mode when there is only one VSYNC pulse issued by the sensor
     81 * at beginning of the frame transmission.
     82 */
     83#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
     84
     85#define FIMC_MAX_PLANES	3
     86
     87/**
     88 * struct fimc_fmt - color format data structure
     89 * @mbus_code: media bus pixel code, -1 if not applicable
     90 * @fourcc: fourcc code for this format, 0 if not applicable
     91 * @color: the driver's private color format id
     92 * @memplanes: number of physically non-contiguous data planes
     93 * @colplanes: number of physically contiguous data planes
     94 * @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
     95 * @depth: per plane driver's private 'number of bits per pixel'
     96 * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
     97 * @flags: flags indicating which operation mode format applies to
     98 */
     99struct fimc_fmt {
    100	u32 mbus_code;
    101	u32	fourcc;
    102	u32	color;
    103	u16	memplanes;
    104	u16	colplanes;
    105	u8	colorspace;
    106	u8	depth[FIMC_MAX_PLANES];
    107	u16	mdataplanes;
    108	u16	flags;
    109#define FMT_FLAGS_CAM		(1 << 0)
    110#define FMT_FLAGS_M2M_IN	(1 << 1)
    111#define FMT_FLAGS_M2M_OUT	(1 << 2)
    112#define FMT_FLAGS_M2M		(1 << 1 | 1 << 2)
    113#define FMT_HAS_ALPHA		(1 << 3)
    114#define FMT_FLAGS_COMPRESSED	(1 << 4)
    115#define FMT_FLAGS_WRITEBACK	(1 << 5)
    116#define FMT_FLAGS_RAW_BAYER	(1 << 6)
    117#define FMT_FLAGS_YUV		(1 << 7)
    118};
    119
    120struct exynos_media_pipeline;
    121
    122/*
    123 * Media pipeline operations to be called from within a video node,  i.e. the
    124 * last entity within the pipeline. Implemented by related media device driver.
    125 */
    126struct exynos_media_pipeline_ops {
    127	int (*prepare)(struct exynos_media_pipeline *p,
    128						struct media_entity *me);
    129	int (*unprepare)(struct exynos_media_pipeline *p);
    130	int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
    131							bool resume);
    132	int (*close)(struct exynos_media_pipeline *p);
    133	int (*set_stream)(struct exynos_media_pipeline *p, bool state);
    134};
    135
    136struct exynos_video_entity {
    137	struct video_device vdev;
    138	struct exynos_media_pipeline *pipe;
    139};
    140
    141struct exynos_media_pipeline {
    142	struct media_pipeline mp;
    143	const struct exynos_media_pipeline_ops *ops;
    144};
    145
    146static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
    147					struct video_device *vdev)
    148{
    149	return container_of(vdev, struct exynos_video_entity, vdev);
    150}
    151
    152#define fimc_pipeline_call(ent, op, args...)				  \
    153	((!(ent) || !(ent)->pipe) ? -ENOENT : \
    154	(((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
    155	(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD))	  \
    156
    157#endif /* S5P_FIMC_H_ */