cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cxl-base.h (1017B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Copyright 2014 IBM Corp.
      4 */
      5
      6#ifndef _MISC_CXL_BASE_H
      7#define _MISC_CXL_BASE_H
      8
      9#ifdef CONFIG_CXL_BASE
     10
     11#define CXL_IRQ_RANGES 4
     12
     13struct cxl_irq_ranges {
     14	irq_hw_number_t offset[CXL_IRQ_RANGES];
     15	irq_hw_number_t range[CXL_IRQ_RANGES];
     16};
     17
     18extern atomic_t cxl_use_count;
     19
     20static inline bool cxl_ctx_in_use(void)
     21{
     22       return (atomic_read(&cxl_use_count) != 0);
     23}
     24
     25static inline void cxl_ctx_get(void)
     26{
     27       atomic_inc(&cxl_use_count);
     28}
     29
     30static inline void cxl_ctx_put(void)
     31{
     32       atomic_dec(&cxl_use_count);
     33}
     34
     35struct cxl_afu *cxl_afu_get(struct cxl_afu *afu);
     36void cxl_afu_put(struct cxl_afu *afu);
     37void cxl_slbia(struct mm_struct *mm);
     38
     39#else /* CONFIG_CXL_BASE */
     40
     41static inline bool cxl_ctx_in_use(void) { return false; }
     42static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu) { return NULL; }
     43static inline void cxl_afu_put(struct cxl_afu *afu) {}
     44static inline void cxl_slbia(struct mm_struct *mm) {}
     45
     46#endif /* CONFIG_CXL_BASE */
     47
     48#endif