cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qe_tdm.h (1917B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Internal header file for QE TDM mode routines.
      4 *
      5 * Copyright (C) 2016 Freescale Semiconductor, Inc. All rights reserved.
      6 *
      7 * Authors:	Zhao Qiang <qiang.zhao@nxp.com>
      8 */
      9
     10#ifndef _QE_TDM_H_
     11#define _QE_TDM_H_
     12
     13#include <linux/list.h>
     14#include <linux/types.h>
     15
     16#include <soc/fsl/qe/immap_qe.h>
     17#include <soc/fsl/qe/qe.h>
     18
     19#include <soc/fsl/qe/ucc.h>
     20#include <soc/fsl/qe/ucc_fast.h>
     21
     22struct device_node;
     23
     24/* SI RAM entries */
     25#define SIR_LAST	0x0001
     26#define SIR_BYTE	0x0002
     27#define SIR_CNT(x)	((x) << 2)
     28#define SIR_CSEL(x)	((x) << 5)
     29#define SIR_SGS		0x0200
     30#define SIR_SWTR	0x4000
     31#define SIR_MCC		0x8000
     32#define SIR_IDLE	0
     33
     34/* SIxMR fields */
     35#define SIMR_SAD(x) ((x) << 12)
     36#define SIMR_SDM_NORMAL	0x0000
     37#define SIMR_SDM_INTERNAL_LOOPBACK	0x0800
     38#define SIMR_SDM_MASK	0x0c00
     39#define SIMR_CRT	0x0040
     40#define SIMR_SL		0x0020
     41#define SIMR_CE		0x0010
     42#define SIMR_FE		0x0008
     43#define SIMR_GM		0x0004
     44#define SIMR_TFSD(n)	(n)
     45#define SIMR_RFSD(n)	((n) << 8)
     46
     47enum tdm_ts_t {
     48	TDM_TX_TS,
     49	TDM_RX_TS
     50};
     51
     52enum tdm_framer_t {
     53	TDM_FRAMER_T1,
     54	TDM_FRAMER_E1
     55};
     56
     57enum tdm_mode_t {
     58	TDM_INTERNAL_LOOPBACK,
     59	TDM_NORMAL
     60};
     61
     62struct si_mode_info {
     63	u8 simr_rfsd;
     64	u8 simr_tfsd;
     65	u8 simr_crt;
     66	u8 simr_sl;
     67	u8 simr_ce;
     68	u8 simr_fe;
     69	u8 simr_gm;
     70};
     71
     72struct ucc_tdm_info {
     73	struct ucc_fast_info uf_info;
     74	struct si_mode_info si_info;
     75};
     76
     77struct ucc_tdm {
     78	u16 tdm_port;		/* port for this tdm:TDMA,TDMB */
     79	u32 siram_entry_id;
     80	u16 __iomem *siram;
     81	struct si1 __iomem *si_regs;
     82	enum tdm_framer_t tdm_framer_type;
     83	enum tdm_mode_t tdm_mode;
     84	u8 num_of_ts;		/* the number of timeslots in this tdm frame */
     85	u32 tx_ts_mask;		/* tx time slot mask */
     86	u32 rx_ts_mask;		/* rx time slot mask */
     87};
     88
     89int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
     90		     struct ucc_tdm_info *ut_info);
     91void ucc_tdm_init(struct ucc_tdm *utdm, struct ucc_tdm_info *ut_info);
     92#endif