cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

revision.h (948B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright 2015 Linaro Ltd.
      4 */
      5
      6#ifndef __SOC_IMX_REVISION_H__
      7#define __SOC_IMX_REVISION_H__
      8
      9#define IMX_CHIP_REVISION_1_0		0x10
     10#define IMX_CHIP_REVISION_1_1		0x11
     11#define IMX_CHIP_REVISION_1_2		0x12
     12#define IMX_CHIP_REVISION_1_3		0x13
     13#define IMX_CHIP_REVISION_1_4		0x14
     14#define IMX_CHIP_REVISION_1_5		0x15
     15#define IMX_CHIP_REVISION_2_0		0x20
     16#define IMX_CHIP_REVISION_2_1		0x21
     17#define IMX_CHIP_REVISION_2_2		0x22
     18#define IMX_CHIP_REVISION_2_3		0x23
     19#define IMX_CHIP_REVISION_3_0		0x30
     20#define IMX_CHIP_REVISION_3_1		0x31
     21#define IMX_CHIP_REVISION_3_2		0x32
     22#define IMX_CHIP_REVISION_3_3		0x33
     23#define IMX_CHIP_REVISION_UNKNOWN	0xff
     24
     25int mx27_revision(void);
     26int mx31_revision(void);
     27int mx35_revision(void);
     28int mx51_revision(void);
     29int mx53_revision(void);
     30
     31unsigned int imx_get_soc_revision(void);
     32void imx_print_silicon_rev(const char *cpu, int srev);
     33
     34#endif /* __SOC_IMX_REVISION_H__ */