cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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designware_i2s.h (1631B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Copyright (ST) 2012 Rajeev Kumar (rajeevkumar.linux@gmail.com)
      4 */
      5
      6#ifndef __SOUND_DESIGNWARE_I2S_H
      7#define __SOUND_DESIGNWARE_I2S_H
      8
      9#include <linux/dmaengine.h>
     10#include <linux/types.h>
     11
     12/*
     13 * struct i2s_clk_config_data - represent i2s clk configuration data
     14 * @chan_nr: number of channel
     15 * @data_width: number of bits per sample (8/16/24/32 bit)
     16 * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
     17 */
     18struct i2s_clk_config_data {
     19	int chan_nr;
     20	u32 data_width;
     21	u32 sample_rate;
     22};
     23
     24struct i2s_platform_data {
     25	#define DWC_I2S_PLAY	(1 << 0)
     26	#define DWC_I2S_RECORD	(1 << 1)
     27	#define DW_I2S_SLAVE	(1 << 2)
     28	#define DW_I2S_MASTER	(1 << 3)
     29	unsigned int cap;
     30	int channel;
     31	u32 snd_fmts;
     32	u32 snd_rates;
     33
     34	#define DW_I2S_QUIRK_COMP_REG_OFFSET	(1 << 0)
     35	#define DW_I2S_QUIRK_COMP_PARAM1	(1 << 1)
     36	#define DW_I2S_QUIRK_16BIT_IDX_OVERRIDE (1 << 2)
     37	unsigned int quirks;
     38	unsigned int i2s_reg_comp1;
     39	unsigned int i2s_reg_comp2;
     40
     41	void *play_dma_data;
     42	void *capture_dma_data;
     43	bool (*filter)(struct dma_chan *chan, void *slave);
     44	int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
     45};
     46
     47struct i2s_dma_data {
     48	void *data;
     49	dma_addr_t addr;
     50	u32 max_burst;
     51	enum dma_slave_buswidth addr_width;
     52	bool (*filter)(struct dma_chan *chan, void *slave);
     53};
     54
     55/* I2S DMA registers */
     56#define I2S_RXDMA		0x01C0
     57#define I2S_TXDMA		0x01C8
     58
     59#define TWO_CHANNEL_SUPPORT	2	/* up to 2.0 */
     60#define FOUR_CHANNEL_SUPPORT	4	/* up to 3.1 */
     61#define SIX_CHANNEL_SUPPORT	6	/* up to 5.1 */
     62#define EIGHT_CHANNEL_SUPPORT	8	/* up to 7.1 */
     63
     64#endif /*  __SOUND_DESIGNWARE_I2S_H */