hda_verbs.h (17289B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * HD-audio codec verbs 4 */ 5 6#ifndef __SOUND_HDA_VERBS_H 7#define __SOUND_HDA_VERBS_H 8 9/* 10 * nodes 11 */ 12#define AC_NODE_ROOT 0x00 13 14/* 15 * function group types 16 */ 17enum { 18 AC_GRP_AUDIO_FUNCTION = 0x01, 19 AC_GRP_MODEM_FUNCTION = 0x02, 20}; 21 22/* 23 * widget types 24 */ 25enum { 26 AC_WID_AUD_OUT, /* Audio Out */ 27 AC_WID_AUD_IN, /* Audio In */ 28 AC_WID_AUD_MIX, /* Audio Mixer */ 29 AC_WID_AUD_SEL, /* Audio Selector */ 30 AC_WID_PIN, /* Pin Complex */ 31 AC_WID_POWER, /* Power */ 32 AC_WID_VOL_KNB, /* Volume Knob */ 33 AC_WID_BEEP, /* Beep Generator */ 34 AC_WID_VENDOR = 0x0f /* Vendor specific */ 35}; 36 37/* 38 * GET verbs 39 */ 40#define AC_VERB_GET_STREAM_FORMAT 0x0a00 41#define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00 42#define AC_VERB_GET_PROC_COEF 0x0c00 43#define AC_VERB_GET_COEF_INDEX 0x0d00 44#define AC_VERB_PARAMETERS 0x0f00 45#define AC_VERB_GET_CONNECT_SEL 0x0f01 46#define AC_VERB_GET_CONNECT_LIST 0x0f02 47#define AC_VERB_GET_PROC_STATE 0x0f03 48#define AC_VERB_GET_SDI_SELECT 0x0f04 49#define AC_VERB_GET_POWER_STATE 0x0f05 50#define AC_VERB_GET_CONV 0x0f06 51#define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07 52#define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08 53#define AC_VERB_GET_PIN_SENSE 0x0f09 54#define AC_VERB_GET_BEEP_CONTROL 0x0f0a 55#define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c 56#define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d 57#define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */ 58#define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f 59/* f10-f1a: GPIO */ 60#define AC_VERB_GET_GPIO_DATA 0x0f15 61#define AC_VERB_GET_GPIO_MASK 0x0f16 62#define AC_VERB_GET_GPIO_DIRECTION 0x0f17 63#define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18 64#define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19 65#define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a 66#define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c 67/* f20: AFG/MFG */ 68#define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 69#define AC_VERB_GET_STRIPE_CONTROL 0x0f24 70#define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d 71#define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e 72#define AC_VERB_GET_HDMI_ELDD 0x0f2f 73#define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 74#define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 75#define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 76#define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 77#define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 78#define AC_VERB_GET_DEVICE_SEL 0xf35 79#define AC_VERB_GET_DEVICE_LIST 0xf36 80 81/* 82 * SET verbs 83 */ 84#define AC_VERB_SET_STREAM_FORMAT 0x200 85#define AC_VERB_SET_AMP_GAIN_MUTE 0x300 86#define AC_VERB_SET_PROC_COEF 0x400 87#define AC_VERB_SET_COEF_INDEX 0x500 88#define AC_VERB_SET_CONNECT_SEL 0x701 89#define AC_VERB_SET_PROC_STATE 0x703 90#define AC_VERB_SET_SDI_SELECT 0x704 91#define AC_VERB_SET_POWER_STATE 0x705 92#define AC_VERB_SET_CHANNEL_STREAMID 0x706 93#define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707 94#define AC_VERB_SET_UNSOLICITED_ENABLE 0x708 95#define AC_VERB_SET_PIN_SENSE 0x709 96#define AC_VERB_SET_BEEP_CONTROL 0x70a 97#define AC_VERB_SET_EAPD_BTLENABLE 0x70c 98#define AC_VERB_SET_DIGI_CONVERT_1 0x70d 99#define AC_VERB_SET_DIGI_CONVERT_2 0x70e 100#define AC_VERB_SET_DIGI_CONVERT_3 0x73e 101#define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f 102#define AC_VERB_SET_GPIO_DATA 0x715 103#define AC_VERB_SET_GPIO_MASK 0x716 104#define AC_VERB_SET_GPIO_DIRECTION 0x717 105#define AC_VERB_SET_GPIO_WAKE_MASK 0x718 106#define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719 107#define AC_VERB_SET_GPIO_STICKY_MASK 0x71a 108#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c 109#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d 110#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e 111#define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f 112#define AC_VERB_SET_EAPD 0x788 113#define AC_VERB_SET_CODEC_RESET 0x7ff 114#define AC_VERB_SET_STRIPE_CONTROL 0x724 115#define AC_VERB_SET_CVT_CHAN_COUNT 0x72d 116#define AC_VERB_SET_HDMI_DIP_INDEX 0x730 117#define AC_VERB_SET_HDMI_DIP_DATA 0x731 118#define AC_VERB_SET_HDMI_DIP_XMIT 0x732 119#define AC_VERB_SET_HDMI_CP_CTRL 0x733 120#define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 121#define AC_VERB_SET_DEVICE_SEL 0x735 122 123/* 124 * Parameter IDs 125 */ 126#define AC_PAR_VENDOR_ID 0x00 127#define AC_PAR_SUBSYSTEM_ID 0x01 128#define AC_PAR_REV_ID 0x02 129#define AC_PAR_NODE_COUNT 0x04 130#define AC_PAR_FUNCTION_TYPE 0x05 131#define AC_PAR_AUDIO_FG_CAP 0x08 132#define AC_PAR_AUDIO_WIDGET_CAP 0x09 133#define AC_PAR_PCM 0x0a 134#define AC_PAR_STREAM 0x0b 135#define AC_PAR_PIN_CAP 0x0c 136#define AC_PAR_AMP_IN_CAP 0x0d 137#define AC_PAR_CONNLIST_LEN 0x0e 138#define AC_PAR_POWER_STATE 0x0f 139#define AC_PAR_PROC_CAP 0x10 140#define AC_PAR_GPIO_CAP 0x11 141#define AC_PAR_AMP_OUT_CAP 0x12 142#define AC_PAR_VOL_KNB_CAP 0x13 143#define AC_PAR_DEVLIST_LEN 0x15 144#define AC_PAR_HDMI_LPCM_CAP 0x20 145 146/* 147 * AC_VERB_PARAMETERS results (32bit) 148 */ 149 150/* Function Group Type */ 151#define AC_FGT_TYPE (0xff<<0) 152#define AC_FGT_TYPE_SHIFT 0 153#define AC_FGT_UNSOL_CAP (1<<8) 154 155/* Audio Function Group Capabilities */ 156#define AC_AFG_OUT_DELAY (0xf<<0) 157#define AC_AFG_IN_DELAY (0xf<<8) 158#define AC_AFG_BEEP_GEN (1<<16) 159 160/* Audio Widget Capabilities */ 161#define AC_WCAP_STEREO (1<<0) /* stereo I/O */ 162#define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */ 163#define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */ 164#define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */ 165#define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */ 166#define AC_WCAP_STRIPE (1<<5) /* stripe */ 167#define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */ 168#define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */ 169#define AC_WCAP_CONN_LIST (1<<8) /* connection list */ 170#define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ 171#define AC_WCAP_POWER (1<<10) /* power control */ 172#define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ 173#define AC_WCAP_CP_CAPS (1<<12) /* content protection */ 174#define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ 175#define AC_WCAP_DELAY (0xf<<16) 176#define AC_WCAP_DELAY_SHIFT 16 177#define AC_WCAP_TYPE (0xf<<20) 178#define AC_WCAP_TYPE_SHIFT 20 179 180/* supported PCM rates and bits */ 181#define AC_SUPPCM_RATES (0xfff << 0) 182#define AC_SUPPCM_BITS_8 (1<<16) 183#define AC_SUPPCM_BITS_16 (1<<17) 184#define AC_SUPPCM_BITS_20 (1<<18) 185#define AC_SUPPCM_BITS_24 (1<<19) 186#define AC_SUPPCM_BITS_32 (1<<20) 187 188/* supported PCM stream format */ 189#define AC_SUPFMT_PCM (1<<0) 190#define AC_SUPFMT_FLOAT32 (1<<1) 191#define AC_SUPFMT_AC3 (1<<2) 192 193/* GP I/O count */ 194#define AC_GPIO_IO_COUNT (0xff<<0) 195#define AC_GPIO_O_COUNT (0xff<<8) 196#define AC_GPIO_O_COUNT_SHIFT 8 197#define AC_GPIO_I_COUNT (0xff<<16) 198#define AC_GPIO_I_COUNT_SHIFT 16 199#define AC_GPIO_UNSOLICITED (1<<30) 200#define AC_GPIO_WAKE (1<<31) 201 202/* Converter stream, channel */ 203#define AC_CONV_CHANNEL (0xf<<0) 204#define AC_CONV_STREAM (0xf<<4) 205#define AC_CONV_STREAM_SHIFT 4 206 207/* Input converter SDI select */ 208#define AC_SDI_SELECT (0xf<<0) 209 210/* stream format id */ 211#define AC_FMT_CHAN_SHIFT 0 212#define AC_FMT_CHAN_MASK (0x0f << 0) 213#define AC_FMT_BITS_SHIFT 4 214#define AC_FMT_BITS_MASK (7 << 4) 215#define AC_FMT_BITS_8 (0 << 4) 216#define AC_FMT_BITS_16 (1 << 4) 217#define AC_FMT_BITS_20 (2 << 4) 218#define AC_FMT_BITS_24 (3 << 4) 219#define AC_FMT_BITS_32 (4 << 4) 220#define AC_FMT_DIV_SHIFT 8 221#define AC_FMT_DIV_MASK (7 << 8) 222#define AC_FMT_MULT_SHIFT 11 223#define AC_FMT_MULT_MASK (7 << 11) 224#define AC_FMT_BASE_SHIFT 14 225#define AC_FMT_BASE_48K (0 << 14) 226#define AC_FMT_BASE_44K (1 << 14) 227#define AC_FMT_TYPE_SHIFT 15 228#define AC_FMT_TYPE_PCM (0 << 15) 229#define AC_FMT_TYPE_NON_PCM (1 << 15) 230 231/* Unsolicited response control */ 232#define AC_UNSOL_TAG (0x3f<<0) 233#define AC_UNSOL_ENABLED (1<<7) 234#define AC_USRSP_EN AC_UNSOL_ENABLED 235 236/* Unsolicited responses */ 237#define AC_UNSOL_RES_TAG (0x3f<<26) 238#define AC_UNSOL_RES_TAG_SHIFT 26 239#define AC_UNSOL_RES_SUBTAG (0x1f<<21) 240#define AC_UNSOL_RES_SUBTAG_SHIFT 21 241#define AC_UNSOL_RES_DE (0x3f<<15) /* Device Entry 242 * (for DP1.2 MST) 243 */ 244#define AC_UNSOL_RES_DE_SHIFT 15 245#define AC_UNSOL_RES_IA (1<<2) /* Inactive (for DP1.2 MST) */ 246#define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ 247#define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ 248#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ 249#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ 250 251/* Pin widget capabilies */ 252#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ 253#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */ 254#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */ 255#define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */ 256#define AC_PINCAP_OUT (1<<4) /* output capable */ 257#define AC_PINCAP_IN (1<<5) /* input capable */ 258#define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */ 259/* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification, 260 * but is marked reserved in the Intel HDA specification. 261 */ 262#define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ 263/* Note: The same bit as LR_SWAP is newly defined as HDMI capability 264 * in HD-audio specification 265 */ 266#define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ 267#define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can 268 * coexist with AC_PINCAP_HDMI 269 */ 270#define AC_PINCAP_VREF (0x37<<8) 271#define AC_PINCAP_VREF_SHIFT 8 272#define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ 273#define AC_PINCAP_HBR (1<<27) /* High Bit Rate */ 274/* Vref status (used in pin cap) */ 275#define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */ 276#define AC_PINCAP_VREF_50 (1<<1) /* 50% */ 277#define AC_PINCAP_VREF_GRD (1<<2) /* ground */ 278#define AC_PINCAP_VREF_80 (1<<4) /* 80% */ 279#define AC_PINCAP_VREF_100 (1<<5) /* 100% */ 280 281/* Amplifier capabilities */ 282#define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */ 283#define AC_AMPCAP_OFFSET_SHIFT 0 284#define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */ 285#define AC_AMPCAP_NUM_STEPS_SHIFT 8 286#define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB 287 * in 0.25dB 288 */ 289#define AC_AMPCAP_STEP_SIZE_SHIFT 16 290#define AC_AMPCAP_MUTE (1<<31) /* mute capable */ 291#define AC_AMPCAP_MUTE_SHIFT 31 292 293/* driver-specific amp-caps: using bits 24-30 */ 294#define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */ 295 296/* Connection list */ 297#define AC_CLIST_LENGTH (0x7f<<0) 298#define AC_CLIST_LONG (1<<7) 299 300/* Supported power status */ 301#define AC_PWRST_D0SUP (1<<0) 302#define AC_PWRST_D1SUP (1<<1) 303#define AC_PWRST_D2SUP (1<<2) 304#define AC_PWRST_D3SUP (1<<3) 305#define AC_PWRST_D3COLDSUP (1<<4) 306#define AC_PWRST_S3D3COLDSUP (1<<29) 307#define AC_PWRST_CLKSTOP (1<<30) 308#define AC_PWRST_EPSS (1U<<31) 309 310/* Power state values */ 311#define AC_PWRST_SETTING (0xf<<0) 312#define AC_PWRST_ACTUAL (0xf<<4) 313#define AC_PWRST_ACTUAL_SHIFT 4 314#define AC_PWRST_D0 0x00 315#define AC_PWRST_D1 0x01 316#define AC_PWRST_D2 0x02 317#define AC_PWRST_D3 0x03 318#define AC_PWRST_ERROR (1<<8) 319#define AC_PWRST_CLK_STOP_OK (1<<9) 320#define AC_PWRST_SETTING_RESET (1<<10) 321 322/* Processing capabilies */ 323#define AC_PCAP_BENIGN (1<<0) 324#define AC_PCAP_NUM_COEF (0xff<<8) 325#define AC_PCAP_NUM_COEF_SHIFT 8 326 327/* Volume knobs capabilities */ 328#define AC_KNBCAP_NUM_STEPS (0x7f<<0) 329#define AC_KNBCAP_DELTA (1<<7) 330 331/* HDMI LPCM capabilities */ 332#define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ 333#define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ 334#define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ 335#define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ 336#define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ 337#define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ 338#define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ 339#define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ 340#define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ 341#define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ 342#define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ 343#define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ 344#define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ 345#define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ 346 347/* Display pin's device list length */ 348#define AC_DEV_LIST_LEN_MASK 0x3f 349#define AC_MAX_DEV_LIST_LEN 64 350 351/* 352 * Control Parameters 353 */ 354 355/* Amp gain/mute */ 356#define AC_AMP_MUTE (1<<7) 357#define AC_AMP_GAIN (0x7f) 358#define AC_AMP_GET_INDEX (0xf<<0) 359 360#define AC_AMP_GET_LEFT (1<<13) 361#define AC_AMP_GET_RIGHT (0<<13) 362#define AC_AMP_GET_OUTPUT (1<<15) 363#define AC_AMP_GET_INPUT (0<<15) 364 365#define AC_AMP_SET_INDEX (0xf<<8) 366#define AC_AMP_SET_INDEX_SHIFT 8 367#define AC_AMP_SET_RIGHT (1<<12) 368#define AC_AMP_SET_LEFT (1<<13) 369#define AC_AMP_SET_INPUT (1<<14) 370#define AC_AMP_SET_OUTPUT (1<<15) 371 372/* DIGITAL1 bits */ 373#define AC_DIG1_ENABLE (1<<0) 374#define AC_DIG1_V (1<<1) 375#define AC_DIG1_VCFG (1<<2) 376#define AC_DIG1_EMPHASIS (1<<3) 377#define AC_DIG1_COPYRIGHT (1<<4) 378#define AC_DIG1_NONAUDIO (1<<5) 379#define AC_DIG1_PROFESSIONAL (1<<6) 380#define AC_DIG1_LEVEL (1<<7) 381 382/* DIGITAL2 bits */ 383#define AC_DIG2_CC (0x7f<<0) 384 385/* DIGITAL3 bits */ 386#define AC_DIG3_ICT (0xf<<0) 387#define AC_DIG3_KAE (1<<7) 388 389/* Pin widget control - 8bit */ 390#define AC_PINCTL_EPT (0x3<<0) 391#define AC_PINCTL_EPT_NATIVE 0 392#define AC_PINCTL_EPT_HBR 3 393#define AC_PINCTL_VREFEN (0x7<<0) 394#define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */ 395#define AC_PINCTL_VREF_50 1 /* 50% */ 396#define AC_PINCTL_VREF_GRD 2 /* ground */ 397#define AC_PINCTL_VREF_80 4 /* 80% */ 398#define AC_PINCTL_VREF_100 5 /* 100% */ 399#define AC_PINCTL_IN_EN (1<<5) 400#define AC_PINCTL_OUT_EN (1<<6) 401#define AC_PINCTL_HP_EN (1<<7) 402 403/* Pin sense - 32bit */ 404#define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) 405#define AC_PINSENSE_PRESENCE (1<<31) 406#define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ 407 408/* EAPD/BTL enable - 32bit */ 409#define AC_EAPDBTL_BALANCED (1<<0) 410#define AC_EAPDBTL_EAPD (1<<1) 411#define AC_EAPDBTL_LR_SWAP (1<<2) 412 413/* HDMI ELD data */ 414#define AC_ELDD_ELD_VALID (1<<31) 415#define AC_ELDD_ELD_DATA 0xff 416 417/* HDMI DIP size */ 418#define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ 419#define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ 420 421/* HDMI DIP index */ 422#define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ 423#define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ 424 425/* HDMI DIP xmit (transmit) control */ 426#define AC_DIPXMIT_MASK (0x3<<6) 427#define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ 428#define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ 429#define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ 430 431/* HDMI content protection (CP) control */ 432#define AC_CPCTRL_CES (1<<9) /* current encryption state */ 433#define AC_CPCTRL_READY (1<<8) /* ready bit */ 434#define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ 435#define AC_CPCTRL_STATE (3<<0) /* current CP request state */ 436 437/* Converter channel <-> HDMI slot mapping */ 438#define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ 439#define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ 440 441/* configuration default - 32bit */ 442#define AC_DEFCFG_SEQUENCE (0xf<<0) 443#define AC_DEFCFG_DEF_ASSOC (0xf<<4) 444#define AC_DEFCFG_ASSOC_SHIFT 4 445#define AC_DEFCFG_MISC (0xf<<8) 446#define AC_DEFCFG_MISC_SHIFT 8 447#define AC_DEFCFG_MISC_NO_PRESENCE (1<<0) 448#define AC_DEFCFG_COLOR (0xf<<12) 449#define AC_DEFCFG_COLOR_SHIFT 12 450#define AC_DEFCFG_CONN_TYPE (0xf<<16) 451#define AC_DEFCFG_CONN_TYPE_SHIFT 16 452#define AC_DEFCFG_DEVICE (0xf<<20) 453#define AC_DEFCFG_DEVICE_SHIFT 20 454#define AC_DEFCFG_LOCATION (0x3f<<24) 455#define AC_DEFCFG_LOCATION_SHIFT 24 456#define AC_DEFCFG_PORT_CONN (0x3<<30) 457#define AC_DEFCFG_PORT_CONN_SHIFT 30 458 459/* Display pin's device list entry */ 460#define AC_DE_PD (1<<0) 461#define AC_DE_ELDV (1<<1) 462#define AC_DE_IA (1<<2) 463 464/* device types (0x0-0xf) */ 465enum { 466 AC_JACK_LINE_OUT, 467 AC_JACK_SPEAKER, 468 AC_JACK_HP_OUT, 469 AC_JACK_CD, 470 AC_JACK_SPDIF_OUT, 471 AC_JACK_DIG_OTHER_OUT, 472 AC_JACK_MODEM_LINE_SIDE, 473 AC_JACK_MODEM_HAND_SIDE, 474 AC_JACK_LINE_IN, 475 AC_JACK_AUX, 476 AC_JACK_MIC_IN, 477 AC_JACK_TELEPHONY, 478 AC_JACK_SPDIF_IN, 479 AC_JACK_DIG_OTHER_IN, 480 AC_JACK_OTHER = 0xf, 481}; 482 483/* jack connection types (0x0-0xf) */ 484enum { 485 AC_JACK_CONN_UNKNOWN, 486 AC_JACK_CONN_1_8, 487 AC_JACK_CONN_1_4, 488 AC_JACK_CONN_ATAPI, 489 AC_JACK_CONN_RCA, 490 AC_JACK_CONN_OPTICAL, 491 AC_JACK_CONN_OTHER_DIGITAL, 492 AC_JACK_CONN_OTHER_ANALOG, 493 AC_JACK_CONN_DIN, 494 AC_JACK_CONN_XLR, 495 AC_JACK_CONN_RJ11, 496 AC_JACK_CONN_COMB, 497 AC_JACK_CONN_OTHER = 0xf, 498}; 499 500/* jack colors (0x0-0xf) */ 501enum { 502 AC_JACK_COLOR_UNKNOWN, 503 AC_JACK_COLOR_BLACK, 504 AC_JACK_COLOR_GREY, 505 AC_JACK_COLOR_BLUE, 506 AC_JACK_COLOR_GREEN, 507 AC_JACK_COLOR_RED, 508 AC_JACK_COLOR_ORANGE, 509 AC_JACK_COLOR_YELLOW, 510 AC_JACK_COLOR_PURPLE, 511 AC_JACK_COLOR_PINK, 512 AC_JACK_COLOR_WHITE = 0xe, 513 AC_JACK_COLOR_OTHER, 514}; 515 516/* Jack location (0x0-0x3f) */ 517/* common case */ 518enum { 519 AC_JACK_LOC_NONE, 520 AC_JACK_LOC_REAR, 521 AC_JACK_LOC_FRONT, 522 AC_JACK_LOC_LEFT, 523 AC_JACK_LOC_RIGHT, 524 AC_JACK_LOC_TOP, 525 AC_JACK_LOC_BOTTOM, 526}; 527/* bits 4-5 */ 528enum { 529 AC_JACK_LOC_EXTERNAL = 0x00, 530 AC_JACK_LOC_INTERNAL = 0x10, 531 AC_JACK_LOC_SEPARATE = 0x20, 532 AC_JACK_LOC_OTHER = 0x30, 533}; 534enum { 535 /* external on primary chasis */ 536 AC_JACK_LOC_REAR_PANEL = 0x07, 537 AC_JACK_LOC_DRIVE_BAY, 538 /* internal */ 539 AC_JACK_LOC_RISER = 0x17, 540 AC_JACK_LOC_HDMI, 541 AC_JACK_LOC_ATAPI, 542 /* others */ 543 AC_JACK_LOC_MOBILE_IN = 0x37, 544 AC_JACK_LOC_MOBILE_OUT, 545}; 546 547/* Port connectivity (0-3) */ 548enum { 549 AC_JACK_PORT_COMPLEX, 550 AC_JACK_PORT_NONE, 551 AC_JACK_PORT_FIXED, 552 AC_JACK_PORT_BOTH, 553}; 554 555/* max. codec address */ 556#define HDA_MAX_CODEC_ADDRESS 0x0f 557 558#endif /* __SOUND_HDA_VERBS_H */