cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

fb.h (16517B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2#ifndef _UAPI_LINUX_FB_H
      3#define _UAPI_LINUX_FB_H
      4
      5#include <linux/types.h>
      6#include <linux/i2c.h>
      7
      8/* Definitions of frame buffers						*/
      9
     10#define FB_MAX			32	/* sufficient for now */
     11
     12/* ioctls
     13   0x46 is 'F'								*/
     14#define FBIOGET_VSCREENINFO	0x4600
     15#define FBIOPUT_VSCREENINFO	0x4601
     16#define FBIOGET_FSCREENINFO	0x4602
     17#define FBIOGETCMAP		0x4604
     18#define FBIOPUTCMAP		0x4605
     19#define FBIOPAN_DISPLAY		0x4606
     20#ifndef __KERNEL__
     21#define FBIO_CURSOR            _IOWR('F', 0x08, struct fb_cursor)
     22#endif
     23/* 0x4607-0x460B are defined below */
     24/* #define FBIOGET_MONITORSPEC	0x460C */
     25/* #define FBIOPUT_MONITORSPEC	0x460D */
     26/* #define FBIOSWITCH_MONIBIT	0x460E */
     27#define FBIOGET_CON2FBMAP	0x460F
     28#define FBIOPUT_CON2FBMAP	0x4610
     29#define FBIOBLANK		0x4611		/* arg: 0 or vesa level + 1 */
     30#define FBIOGET_VBLANK		_IOR('F', 0x12, struct fb_vblank)
     31#define FBIO_ALLOC              0x4613
     32#define FBIO_FREE               0x4614
     33#define FBIOGET_GLYPH           0x4615
     34#define FBIOGET_HWCINFO         0x4616
     35#define FBIOPUT_MODEINFO        0x4617
     36#define FBIOGET_DISPINFO        0x4618
     37#define FBIO_WAITFORVSYNC	_IOW('F', 0x20, __u32)
     38
     39#define FB_TYPE_PACKED_PIXELS		0	/* Packed Pixels	*/
     40#define FB_TYPE_PLANES			1	/* Non interleaved planes */
     41#define FB_TYPE_INTERLEAVED_PLANES	2	/* Interleaved planes	*/
     42#define FB_TYPE_TEXT			3	/* Text/attributes	*/
     43#define FB_TYPE_VGA_PLANES		4	/* EGA/VGA planes	*/
     44#define FB_TYPE_FOURCC			5	/* Type identified by a V4L2 FOURCC */
     45
     46#define FB_AUX_TEXT_MDA		0	/* Monochrome text */
     47#define FB_AUX_TEXT_CGA		1	/* CGA/EGA/VGA Color text */
     48#define FB_AUX_TEXT_S3_MMIO	2	/* S3 MMIO fasttext */
     49#define FB_AUX_TEXT_MGA_STEP16	3	/* MGA Millenium I: text, attr, 14 reserved bytes */
     50#define FB_AUX_TEXT_MGA_STEP8	4	/* other MGAs:      text, attr,  6 reserved bytes */
     51#define FB_AUX_TEXT_SVGA_GROUP	8	/* 8-15: SVGA tileblit compatible modes */
     52#define FB_AUX_TEXT_SVGA_MASK	7	/* lower three bits says step */
     53#define FB_AUX_TEXT_SVGA_STEP2	8	/* SVGA text mode:  text, attr */
     54#define FB_AUX_TEXT_SVGA_STEP4	9	/* SVGA text mode:  text, attr,  2 reserved bytes */
     55#define FB_AUX_TEXT_SVGA_STEP8	10	/* SVGA text mode:  text, attr,  6 reserved bytes */
     56#define FB_AUX_TEXT_SVGA_STEP16	11	/* SVGA text mode:  text, attr, 14 reserved bytes */
     57#define FB_AUX_TEXT_SVGA_LAST	15	/* reserved up to 15 */
     58
     59#define FB_AUX_VGA_PLANES_VGA4		0	/* 16 color planes (EGA/VGA) */
     60#define FB_AUX_VGA_PLANES_CFB4		1	/* CFB4 in planes (VGA) */
     61#define FB_AUX_VGA_PLANES_CFB8		2	/* CFB8 in planes (VGA) */
     62
     63#define FB_VISUAL_MONO01		0	/* Monochr. 1=Black 0=White */
     64#define FB_VISUAL_MONO10		1	/* Monochr. 1=White 0=Black */
     65#define FB_VISUAL_TRUECOLOR		2	/* True color	*/
     66#define FB_VISUAL_PSEUDOCOLOR		3	/* Pseudo color (like atari) */
     67#define FB_VISUAL_DIRECTCOLOR		4	/* Direct color */
     68#define FB_VISUAL_STATIC_PSEUDOCOLOR	5	/* Pseudo color readonly */
     69#define FB_VISUAL_FOURCC		6	/* Visual identified by a V4L2 FOURCC */
     70
     71#define FB_ACCEL_NONE		0	/* no hardware accelerator	*/
     72#define FB_ACCEL_ATARIBLITT	1	/* Atari Blitter		*/
     73#define FB_ACCEL_AMIGABLITT	2	/* Amiga Blitter                */
     74#define FB_ACCEL_S3_TRIO64	3	/* Cybervision64 (S3 Trio64)    */
     75#define FB_ACCEL_NCR_77C32BLT	4	/* RetinaZ3 (NCR 77C32BLT)      */
     76#define FB_ACCEL_S3_VIRGE	5	/* Cybervision64/3D (S3 ViRGE)	*/
     77#define FB_ACCEL_ATI_MACH64GX	6	/* ATI Mach 64GX family		*/
     78#define FB_ACCEL_DEC_TGA	7	/* DEC 21030 TGA		*/
     79#define FB_ACCEL_ATI_MACH64CT	8	/* ATI Mach 64CT family		*/
     80#define FB_ACCEL_ATI_MACH64VT	9	/* ATI Mach 64CT family VT class */
     81#define FB_ACCEL_ATI_MACH64GT	10	/* ATI Mach 64CT family GT class */
     82#define FB_ACCEL_SUN_CREATOR	11	/* Sun Creator/Creator3D	*/
     83#define FB_ACCEL_SUN_CGSIX	12	/* Sun cg6			*/
     84#define FB_ACCEL_SUN_LEO	13	/* Sun leo/zx			*/
     85#define FB_ACCEL_IMS_TWINTURBO	14	/* IMS Twin Turbo		*/
     86#define FB_ACCEL_3DLABS_PERMEDIA2 15	/* 3Dlabs Permedia 2		*/
     87#define FB_ACCEL_MATROX_MGA2064W 16	/* Matrox MGA2064W (Millenium)	*/
     88#define FB_ACCEL_MATROX_MGA1064SG 17	/* Matrox MGA1064SG (Mystique)	*/
     89#define FB_ACCEL_MATROX_MGA2164W 18	/* Matrox MGA2164W (Millenium II) */
     90#define FB_ACCEL_MATROX_MGA2164W_AGP 19	/* Matrox MGA2164W (Millenium II) */
     91#define FB_ACCEL_MATROX_MGAG100	20	/* Matrox G100 (Productiva G100) */
     92#define FB_ACCEL_MATROX_MGAG200	21	/* Matrox G200 (Myst, Mill, ...) */
     93#define FB_ACCEL_SUN_CG14	22	/* Sun cgfourteen		 */
     94#define FB_ACCEL_SUN_BWTWO	23	/* Sun bwtwo			*/
     95#define FB_ACCEL_SUN_CGTHREE	24	/* Sun cgthree			*/
     96#define FB_ACCEL_SUN_TCX	25	/* Sun tcx			*/
     97#define FB_ACCEL_MATROX_MGAG400	26	/* Matrox G400			*/
     98#define FB_ACCEL_NV3		27	/* nVidia RIVA 128              */
     99#define FB_ACCEL_NV4		28	/* nVidia RIVA TNT		*/
    100#define FB_ACCEL_NV5		29	/* nVidia RIVA TNT2		*/
    101#define FB_ACCEL_CT_6555x	30	/* C&T 6555x			*/
    102#define FB_ACCEL_3DFX_BANSHEE	31	/* 3Dfx Banshee			*/
    103#define FB_ACCEL_ATI_RAGE128	32	/* ATI Rage128 family		*/
    104#define FB_ACCEL_IGS_CYBER2000	33	/* CyberPro 2000		*/
    105#define FB_ACCEL_IGS_CYBER2010	34	/* CyberPro 2010		*/
    106#define FB_ACCEL_IGS_CYBER5000	35	/* CyberPro 5000		*/
    107#define FB_ACCEL_SIS_GLAMOUR    36	/* SiS 300/630/540              */
    108#define FB_ACCEL_3DLABS_PERMEDIA3 37	/* 3Dlabs Permedia 3		*/
    109#define FB_ACCEL_ATI_RADEON	38	/* ATI Radeon family		*/
    110#define FB_ACCEL_I810           39      /* Intel 810/815                */
    111#define FB_ACCEL_SIS_GLAMOUR_2  40	/* SiS 315, 650, 740		*/
    112#define FB_ACCEL_SIS_XABRE      41	/* SiS 330 ("Xabre")		*/
    113#define FB_ACCEL_I830           42      /* Intel 830M/845G/85x/865G     */
    114#define FB_ACCEL_NV_10          43      /* nVidia Arch 10               */
    115#define FB_ACCEL_NV_20          44      /* nVidia Arch 20               */
    116#define FB_ACCEL_NV_30          45      /* nVidia Arch 30               */
    117#define FB_ACCEL_NV_40          46      /* nVidia Arch 40               */
    118#define FB_ACCEL_XGI_VOLARI_V	47	/* XGI Volari V3XT, V5, V8      */
    119#define FB_ACCEL_XGI_VOLARI_Z	48	/* XGI Volari Z7                */
    120#define FB_ACCEL_OMAP1610	49	/* TI OMAP16xx                  */
    121#define FB_ACCEL_TRIDENT_TGUI	50	/* Trident TGUI			*/
    122#define FB_ACCEL_TRIDENT_3DIMAGE 51	/* Trident 3DImage		*/
    123#define FB_ACCEL_TRIDENT_BLADE3D 52	/* Trident Blade3D		*/
    124#define FB_ACCEL_TRIDENT_BLADEXP 53	/* Trident BladeXP		*/
    125#define FB_ACCEL_CIRRUS_ALPINE   53	/* Cirrus Logic 543x/544x/5480	*/
    126#define FB_ACCEL_NEOMAGIC_NM2070 90	/* NeoMagic NM2070              */
    127#define FB_ACCEL_NEOMAGIC_NM2090 91	/* NeoMagic NM2090              */
    128#define FB_ACCEL_NEOMAGIC_NM2093 92	/* NeoMagic NM2093              */
    129#define FB_ACCEL_NEOMAGIC_NM2097 93	/* NeoMagic NM2097              */
    130#define FB_ACCEL_NEOMAGIC_NM2160 94	/* NeoMagic NM2160              */
    131#define FB_ACCEL_NEOMAGIC_NM2200 95	/* NeoMagic NM2200              */
    132#define FB_ACCEL_NEOMAGIC_NM2230 96	/* NeoMagic NM2230              */
    133#define FB_ACCEL_NEOMAGIC_NM2360 97	/* NeoMagic NM2360              */
    134#define FB_ACCEL_NEOMAGIC_NM2380 98	/* NeoMagic NM2380              */
    135#define FB_ACCEL_PXA3XX		 99	/* PXA3xx			*/
    136
    137#define FB_ACCEL_SAVAGE4        0x80	/* S3 Savage4                   */
    138#define FB_ACCEL_SAVAGE3D       0x81	/* S3 Savage3D                  */
    139#define FB_ACCEL_SAVAGE3D_MV    0x82	/* S3 Savage3D-MV               */
    140#define FB_ACCEL_SAVAGE2000     0x83	/* S3 Savage2000                */
    141#define FB_ACCEL_SAVAGE_MX_MV   0x84	/* S3 Savage/MX-MV              */
    142#define FB_ACCEL_SAVAGE_MX      0x85	/* S3 Savage/MX                 */
    143#define FB_ACCEL_SAVAGE_IX_MV   0x86	/* S3 Savage/IX-MV              */
    144#define FB_ACCEL_SAVAGE_IX      0x87	/* S3 Savage/IX                 */
    145#define FB_ACCEL_PROSAVAGE_PM   0x88	/* S3 ProSavage PM133           */
    146#define FB_ACCEL_PROSAVAGE_KM   0x89	/* S3 ProSavage KM133           */
    147#define FB_ACCEL_S3TWISTER_P    0x8a	/* S3 Twister                   */
    148#define FB_ACCEL_S3TWISTER_K    0x8b	/* S3 TwisterK                  */
    149#define FB_ACCEL_SUPERSAVAGE    0x8c    /* S3 Supersavage               */
    150#define FB_ACCEL_PROSAVAGE_DDR  0x8d	/* S3 ProSavage DDR             */
    151#define FB_ACCEL_PROSAVAGE_DDRK 0x8e	/* S3 ProSavage DDR-K           */
    152
    153#define FB_ACCEL_PUV3_UNIGFX	0xa0	/* PKUnity-v3 Unigfx		*/
    154
    155#define FB_CAP_FOURCC		1	/* Device supports FOURCC-based formats */
    156
    157struct fb_fix_screeninfo {
    158	char id[16];			/* identification string eg "TT Builtin" */
    159	unsigned long smem_start;	/* Start of frame buffer mem */
    160					/* (physical address) */
    161	__u32 smem_len;			/* Length of frame buffer mem */
    162	__u32 type;			/* see FB_TYPE_*		*/
    163	__u32 type_aux;			/* Interleave for interleaved Planes */
    164	__u32 visual;			/* see FB_VISUAL_*		*/ 
    165	__u16 xpanstep;			/* zero if no hardware panning  */
    166	__u16 ypanstep;			/* zero if no hardware panning  */
    167	__u16 ywrapstep;		/* zero if no hardware ywrap    */
    168	__u32 line_length;		/* length of a line in bytes    */
    169	unsigned long mmio_start;	/* Start of Memory Mapped I/O   */
    170					/* (physical address) */
    171	__u32 mmio_len;			/* Length of Memory Mapped I/O  */
    172	__u32 accel;			/* Indicate to driver which	*/
    173					/*  specific chip/card we have	*/
    174	__u16 capabilities;		/* see FB_CAP_*			*/
    175	__u16 reserved[2];		/* Reserved for future compatibility */
    176};
    177
    178/* Interpretation of offset for color fields: All offsets are from the right,
    179 * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
    180 * can use the offset as right argument to <<). A pixel afterwards is a bit
    181 * stream and is written to video memory as that unmodified.
    182 *
    183 * For pseudocolor: offset and length should be the same for all color
    184 * components. Offset specifies the position of the least significant bit
    185 * of the palette index in a pixel value. Length indicates the number
    186 * of available palette entries (i.e. # of entries = 1 << length).
    187 */
    188struct fb_bitfield {
    189	__u32 offset;			/* beginning of bitfield	*/
    190	__u32 length;			/* length of bitfield		*/
    191	__u32 msb_right;		/* != 0 : Most significant bit is */ 
    192					/* right */ 
    193};
    194
    195#define FB_NONSTD_HAM		1	/* Hold-And-Modify (HAM)        */
    196#define FB_NONSTD_REV_PIX_IN_B	2	/* order of pixels in each byte is reversed */
    197
    198#define FB_ACTIVATE_NOW		0	/* set values immediately (or vbl)*/
    199#define FB_ACTIVATE_NXTOPEN	1	/* activate on next open	*/
    200#define FB_ACTIVATE_TEST	2	/* don't set, round up impossible */
    201#define FB_ACTIVATE_MASK       15
    202					/* values			*/
    203#define FB_ACTIVATE_VBL	       16	/* activate values on next vbl  */
    204#define FB_CHANGE_CMAP_VBL     32	/* change colormap on vbl	*/
    205#define FB_ACTIVATE_ALL	       64	/* change all VCs on this fb	*/
    206#define FB_ACTIVATE_FORCE     128	/* force apply even when no change*/
    207#define FB_ACTIVATE_INV_MODE  256       /* invalidate videomode */
    208#define FB_ACTIVATE_KD_TEXT   512       /* for KDSET vt ioctl */
    209
    210#define FB_ACCELF_TEXT		1	/* (OBSOLETE) see fb_info.flags and vc_mode */
    211
    212#define FB_SYNC_HOR_HIGH_ACT	1	/* horizontal sync high active	*/
    213#define FB_SYNC_VERT_HIGH_ACT	2	/* vertical sync high active	*/
    214#define FB_SYNC_EXT		4	/* external sync		*/
    215#define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active   */
    216#define FB_SYNC_BROADCAST	16	/* broadcast video timings      */
    217					/* vtotal = 144d/288n/576i => PAL  */
    218					/* vtotal = 121d/242n/484i => NTSC */
    219#define FB_SYNC_ON_GREEN	32	/* sync on green */
    220
    221#define FB_VMODE_NONINTERLACED  0	/* non interlaced */
    222#define FB_VMODE_INTERLACED	1	/* interlaced	*/
    223#define FB_VMODE_DOUBLE		2	/* double scan */
    224#define FB_VMODE_ODD_FLD_FIRST	4	/* interlaced: top line first */
    225#define FB_VMODE_MASK		255
    226
    227#define FB_VMODE_YWRAP		256	/* ywrap instead of panning     */
    228#define FB_VMODE_SMOOTH_XPAN	512	/* smooth xpan possible (internally used) */
    229#define FB_VMODE_CONUPDATE	512	/* don't update x/yoffset	*/
    230
    231/*
    232 * Display rotation support
    233 */
    234#define FB_ROTATE_UR      0
    235#define FB_ROTATE_CW      1
    236#define FB_ROTATE_UD      2
    237#define FB_ROTATE_CCW     3
    238
    239#define PICOS2KHZ(a) (1000000000UL/(a))
    240#define KHZ2PICOS(a) (1000000000UL/(a))
    241
    242struct fb_var_screeninfo {
    243	__u32 xres;			/* visible resolution		*/
    244	__u32 yres;
    245	__u32 xres_virtual;		/* virtual resolution		*/
    246	__u32 yres_virtual;
    247	__u32 xoffset;			/* offset from virtual to visible */
    248	__u32 yoffset;			/* resolution			*/
    249
    250	__u32 bits_per_pixel;		/* guess what			*/
    251	__u32 grayscale;		/* 0 = color, 1 = grayscale,	*/
    252					/* >1 = FOURCC			*/
    253	struct fb_bitfield red;		/* bitfield in fb mem if true color, */
    254	struct fb_bitfield green;	/* else only length is significant */
    255	struct fb_bitfield blue;
    256	struct fb_bitfield transp;	/* transparency			*/	
    257
    258	__u32 nonstd;			/* != 0 Non standard pixel format */
    259
    260	__u32 activate;			/* see FB_ACTIVATE_*		*/
    261
    262	__u32 height;			/* height of picture in mm    */
    263	__u32 width;			/* width of picture in mm     */
    264
    265	__u32 accel_flags;		/* (OBSOLETE) see fb_info.flags */
    266
    267	/* Timing: All values in pixclocks, except pixclock (of course) */
    268	__u32 pixclock;			/* pixel clock in ps (pico seconds) */
    269	__u32 left_margin;		/* time from sync to picture	*/
    270	__u32 right_margin;		/* time from picture to sync	*/
    271	__u32 upper_margin;		/* time from sync to picture	*/
    272	__u32 lower_margin;
    273	__u32 hsync_len;		/* length of horizontal sync	*/
    274	__u32 vsync_len;		/* length of vertical sync	*/
    275	__u32 sync;			/* see FB_SYNC_*		*/
    276	__u32 vmode;			/* see FB_VMODE_*		*/
    277	__u32 rotate;			/* angle we rotate counter clockwise */
    278	__u32 colorspace;		/* colorspace for FOURCC-based modes */
    279	__u32 reserved[4];		/* Reserved for future compatibility */
    280};
    281
    282struct fb_cmap {
    283	__u32 start;			/* First entry	*/
    284	__u32 len;			/* Number of entries */
    285	__u16 *red;			/* Red values	*/
    286	__u16 *green;
    287	__u16 *blue;
    288	__u16 *transp;			/* transparency, can be NULL */
    289};
    290
    291struct fb_con2fbmap {
    292	__u32 console;
    293	__u32 framebuffer;
    294};
    295
    296/* VESA Blanking Levels */
    297#define VESA_NO_BLANKING        0
    298#define VESA_VSYNC_SUSPEND      1
    299#define VESA_HSYNC_SUSPEND      2
    300#define VESA_POWERDOWN          3
    301
    302
    303enum {
    304	/* screen: unblanked, hsync: on,  vsync: on */
    305	FB_BLANK_UNBLANK       = VESA_NO_BLANKING,
    306
    307	/* screen: blanked,   hsync: on,  vsync: on */
    308	FB_BLANK_NORMAL        = VESA_NO_BLANKING + 1,
    309
    310	/* screen: blanked,   hsync: on,  vsync: off */
    311	FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
    312
    313	/* screen: blanked,   hsync: off, vsync: on */
    314	FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
    315
    316	/* screen: blanked,   hsync: off, vsync: off */
    317	FB_BLANK_POWERDOWN     = VESA_POWERDOWN + 1
    318};
    319
    320#define FB_VBLANK_VBLANKING	0x001	/* currently in a vertical blank */
    321#define FB_VBLANK_HBLANKING	0x002	/* currently in a horizontal blank */
    322#define FB_VBLANK_HAVE_VBLANK	0x004	/* vertical blanks can be detected */
    323#define FB_VBLANK_HAVE_HBLANK	0x008	/* horizontal blanks can be detected */
    324#define FB_VBLANK_HAVE_COUNT	0x010	/* global retrace counter is available */
    325#define FB_VBLANK_HAVE_VCOUNT	0x020	/* the vcount field is valid */
    326#define FB_VBLANK_HAVE_HCOUNT	0x040	/* the hcount field is valid */
    327#define FB_VBLANK_VSYNCING	0x080	/* currently in a vsync */
    328#define FB_VBLANK_HAVE_VSYNC	0x100	/* verical syncs can be detected */
    329
    330struct fb_vblank {
    331	__u32 flags;			/* FB_VBLANK flags */
    332	__u32 count;			/* counter of retraces since boot */
    333	__u32 vcount;			/* current scanline position */
    334	__u32 hcount;			/* current scandot position */
    335	__u32 reserved[4];		/* reserved for future compatibility */
    336};
    337
    338/* Internal HW accel */
    339#define ROP_COPY 0
    340#define ROP_XOR  1
    341
    342struct fb_copyarea {
    343	__u32 dx;
    344	__u32 dy;
    345	__u32 width;
    346	__u32 height;
    347	__u32 sx;
    348	__u32 sy;
    349};
    350
    351struct fb_fillrect {
    352	__u32 dx;	/* screen-relative */
    353	__u32 dy;
    354	__u32 width;
    355	__u32 height;
    356	__u32 color;
    357	__u32 rop;
    358};
    359
    360struct fb_image {
    361	__u32 dx;		/* Where to place image */
    362	__u32 dy;
    363	__u32 width;		/* Size of image */
    364	__u32 height;
    365	__u32 fg_color;		/* Only used when a mono bitmap */
    366	__u32 bg_color;
    367	__u8  depth;		/* Depth of the image */
    368	const char *data;	/* Pointer to image data */
    369	struct fb_cmap cmap;	/* color map info */
    370};
    371
    372/*
    373 * hardware cursor control
    374 */
    375
    376#define FB_CUR_SETIMAGE 0x01
    377#define FB_CUR_SETPOS   0x02
    378#define FB_CUR_SETHOT   0x04
    379#define FB_CUR_SETCMAP  0x08
    380#define FB_CUR_SETSHAPE 0x10
    381#define FB_CUR_SETSIZE	0x20
    382#define FB_CUR_SETALL   0xFF
    383
    384struct fbcurpos {
    385	__u16 x, y;
    386};
    387
    388struct fb_cursor {
    389	__u16 set;		/* what to set */
    390	__u16 enable;		/* cursor on/off */
    391	__u16 rop;		/* bitop operation */
    392	const char *mask;	/* cursor mask bits */
    393	struct fbcurpos hot;	/* cursor hot spot */
    394	struct fb_image	image;	/* Cursor image */
    395};
    396
    397/* Settings for the generic backlight code */
    398#define FB_BACKLIGHT_LEVELS	128
    399#define FB_BACKLIGHT_MAX	0xFF
    400
    401
    402#endif /* _UAPI_LINUX_FB_H */