cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c.h (6905B)


      1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
      2/*
      3 * i2c.h - definitions for the I2C bus interface
      4 *
      5 * Copyright (C) 1995-2000 Simon G. Vogl
      6 * With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
      7 * Frodo Looijaard <frodol@dds.nl>
      8 */
      9
     10#ifndef _UAPI_LINUX_I2C_H
     11#define _UAPI_LINUX_I2C_H
     12
     13#include <linux/types.h>
     14
     15/**
     16 * struct i2c_msg - an I2C transaction segment beginning with START
     17 *
     18 * @addr: Slave address, either 7 or 10 bits. When this is a 10 bit address,
     19 *   %I2C_M_TEN must be set in @flags and the adapter must support
     20 *   %I2C_FUNC_10BIT_ADDR.
     21 *
     22 * @flags:
     23 *   Supported by all adapters:
     24 *   %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
     25 *
     26 *   Optional:
     27 *   %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense
     28 *     in kernelspace, because userspace buffers are copied anyway
     29 *
     30 *   Only if I2C_FUNC_10BIT_ADDR is set:
     31 *   %I2C_M_TEN: this is a 10 bit chip address
     32 *
     33 *   Only if I2C_FUNC_SMBUS_READ_BLOCK_DATA is set:
     34 *   %I2C_M_RECV_LEN: message length will be first received byte
     35 *
     36 *   Only if I2C_FUNC_NOSTART is set:
     37 *   %I2C_M_NOSTART: skip repeated start sequence
     38
     39 *   Only if I2C_FUNC_PROTOCOL_MANGLING is set:
     40 *   %I2C_M_NO_RD_ACK: in a read message, master ACK/NACK bit is skipped
     41 *   %I2C_M_IGNORE_NAK: treat NACK from client as ACK
     42 *   %I2C_M_REV_DIR_ADDR: toggles the Rd/Wr bit
     43 *   %I2C_M_STOP: force a STOP condition after the message
     44 *
     45 * @len: Number of data bytes in @buf being read from or written to the I2C
     46 *   slave address. For read transactions where %I2C_M_RECV_LEN is set, the
     47 *   caller guarantees that this buffer can hold up to %I2C_SMBUS_BLOCK_MAX
     48 *   bytes in addition to the initial length byte sent by the slave (plus,
     49 *   if used, the SMBus PEC); and this value will be incremented by the number
     50 *   of block data bytes received.
     51 *
     52 * @buf: The buffer into which data is read, or from which it's written.
     53 *
     54 * An i2c_msg is the low level representation of one segment of an I2C
     55 * transaction.  It is visible to drivers in the @i2c_transfer() procedure,
     56 * to userspace from i2c-dev, and to I2C adapter drivers through the
     57 * @i2c_adapter.@master_xfer() method.
     58 *
     59 * Except when I2C "protocol mangling" is used, all I2C adapters implement
     60 * the standard rules for I2C transactions.  Each transaction begins with a
     61 * START.  That is followed by the slave address, and a bit encoding read
     62 * versus write.  Then follow all the data bytes, possibly including a byte
     63 * with SMBus PEC.  The transfer terminates with a NAK, or when all those
     64 * bytes have been transferred and ACKed.  If this is the last message in a
     65 * group, it is followed by a STOP.  Otherwise it is followed by the next
     66 * @i2c_msg transaction segment, beginning with a (repeated) START.
     67 *
     68 * Alternatively, when the adapter supports %I2C_FUNC_PROTOCOL_MANGLING then
     69 * passing certain @flags may have changed those standard protocol behaviors.
     70 * Those flags are only for use with broken/nonconforming slaves, and with
     71 * adapters which are known to support the specific mangling options they need.
     72 */
     73struct i2c_msg {
     74	__u16 addr;
     75	__u16 flags;
     76#define I2C_M_RD		0x0001	/* guaranteed to be 0x0001! */
     77#define I2C_M_TEN		0x0010	/* use only if I2C_FUNC_10BIT_ADDR */
     78#define I2C_M_DMA_SAFE		0x0200	/* use only in kernel space */
     79#define I2C_M_RECV_LEN		0x0400	/* use only if I2C_FUNC_SMBUS_READ_BLOCK_DATA */
     80#define I2C_M_NO_RD_ACK		0x0800	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
     81#define I2C_M_IGNORE_NAK	0x1000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
     82#define I2C_M_REV_DIR_ADDR	0x2000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
     83#define I2C_M_NOSTART		0x4000	/* use only if I2C_FUNC_NOSTART */
     84#define I2C_M_STOP		0x8000	/* use only if I2C_FUNC_PROTOCOL_MANGLING */
     85	__u16 len;
     86	__u8 *buf;
     87};
     88
     89/* To determine what functionality is present */
     90
     91#define I2C_FUNC_I2C			0x00000001
     92#define I2C_FUNC_10BIT_ADDR		0x00000002 /* required for I2C_M_TEN */
     93#define I2C_FUNC_PROTOCOL_MANGLING	0x00000004 /* required for I2C_M_IGNORE_NAK etc. */
     94#define I2C_FUNC_SMBUS_PEC		0x00000008
     95#define I2C_FUNC_NOSTART		0x00000010 /* required for I2C_M_NOSTART */
     96#define I2C_FUNC_SLAVE			0x00000020
     97#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL	0x00008000 /* SMBus 2.0 or later */
     98#define I2C_FUNC_SMBUS_QUICK		0x00010000
     99#define I2C_FUNC_SMBUS_READ_BYTE	0x00020000
    100#define I2C_FUNC_SMBUS_WRITE_BYTE	0x00040000
    101#define I2C_FUNC_SMBUS_READ_BYTE_DATA	0x00080000
    102#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA	0x00100000
    103#define I2C_FUNC_SMBUS_READ_WORD_DATA	0x00200000
    104#define I2C_FUNC_SMBUS_WRITE_WORD_DATA	0x00400000
    105#define I2C_FUNC_SMBUS_PROC_CALL	0x00800000
    106#define I2C_FUNC_SMBUS_READ_BLOCK_DATA	0x01000000 /* required for I2C_M_RECV_LEN */
    107#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
    108#define I2C_FUNC_SMBUS_READ_I2C_BLOCK	0x04000000 /* I2C-like block xfer  */
    109#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK	0x08000000 /* w/ 1-byte reg. addr. */
    110#define I2C_FUNC_SMBUS_HOST_NOTIFY	0x10000000 /* SMBus 2.0 or later */
    111
    112#define I2C_FUNC_SMBUS_BYTE		(I2C_FUNC_SMBUS_READ_BYTE | \
    113					 I2C_FUNC_SMBUS_WRITE_BYTE)
    114#define I2C_FUNC_SMBUS_BYTE_DATA	(I2C_FUNC_SMBUS_READ_BYTE_DATA | \
    115					 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
    116#define I2C_FUNC_SMBUS_WORD_DATA	(I2C_FUNC_SMBUS_READ_WORD_DATA | \
    117					 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
    118#define I2C_FUNC_SMBUS_BLOCK_DATA	(I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
    119					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
    120#define I2C_FUNC_SMBUS_I2C_BLOCK	(I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
    121					 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
    122
    123#define I2C_FUNC_SMBUS_EMUL		(I2C_FUNC_SMBUS_QUICK | \
    124					 I2C_FUNC_SMBUS_BYTE | \
    125					 I2C_FUNC_SMBUS_BYTE_DATA | \
    126					 I2C_FUNC_SMBUS_WORD_DATA | \
    127					 I2C_FUNC_SMBUS_PROC_CALL | \
    128					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
    129					 I2C_FUNC_SMBUS_I2C_BLOCK | \
    130					 I2C_FUNC_SMBUS_PEC)
    131
    132/* if I2C_M_RECV_LEN is also supported */
    133#define I2C_FUNC_SMBUS_EMUL_ALL		(I2C_FUNC_SMBUS_EMUL | \
    134					 I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
    135					 I2C_FUNC_SMBUS_BLOCK_PROC_CALL)
    136
    137/*
    138 * Data for SMBus Messages
    139 */
    140#define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */
    141union i2c_smbus_data {
    142	__u8 byte;
    143	__u16 word;
    144	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
    145			       /* and one more for user-space compatibility */
    146};
    147
    148/* i2c_smbus_xfer read or write markers */
    149#define I2C_SMBUS_READ	1
    150#define I2C_SMBUS_WRITE	0
    151
    152/* SMBus transaction types (size parameter in the above functions)
    153   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
    154#define I2C_SMBUS_QUICK		    0
    155#define I2C_SMBUS_BYTE		    1
    156#define I2C_SMBUS_BYTE_DATA	    2
    157#define I2C_SMBUS_WORD_DATA	    3
    158#define I2C_SMBUS_PROC_CALL	    4
    159#define I2C_SMBUS_BLOCK_DATA	    5
    160#define I2C_SMBUS_I2C_BLOCK_BROKEN  6
    161#define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */
    162#define I2C_SMBUS_I2C_BLOCK_DATA    8
    163
    164#endif /* _UAPI_LINUX_I2C_H */