cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2o-dev.h (11646B)


      1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
      2/*
      3 * I2O user space accessible structures/APIs
      4 *
      5 * (c) Copyright 1999, 2000 Red Hat Software
      6 *
      7 * This program is free software; you can redistribute it and/or
      8 * modify it under the terms of the GNU General Public License
      9 * as published by the Free Software Foundation; either version
     10 * 2 of the License, or (at your option) any later version.
     11 *
     12 *************************************************************************
     13 *
     14 * This header file defines the I2O APIs that are available to both
     15 * the kernel and user level applications.  Kernel specific structures
     16 * are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which
     17 * automatically includes this file.
     18 *
     19 */
     20
     21#ifndef _I2O_DEV_H
     22#define _I2O_DEV_H
     23
     24/* How many controllers are we allowing */
     25#define MAX_I2O_CONTROLLERS	32
     26
     27#include <linux/ioctl.h>
     28#include <linux/types.h>
     29
     30/*
     31 * I2O Control IOCTLs and structures
     32 */
     33#define I2O_MAGIC_NUMBER	'i'
     34#define I2OGETIOPS		_IOR(I2O_MAGIC_NUMBER,0,__u8[MAX_I2O_CONTROLLERS])
     35#define I2OHRTGET		_IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct)
     36#define I2OLCTGET		_IOWR(I2O_MAGIC_NUMBER,2,struct i2o_cmd_hrtlct)
     37#define I2OPARMSET		_IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget)
     38#define I2OPARMGET		_IOWR(I2O_MAGIC_NUMBER,4,struct i2o_cmd_psetget)
     39#define I2OSWDL 		_IOWR(I2O_MAGIC_NUMBER,5,struct i2o_sw_xfer)
     40#define I2OSWUL 		_IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer)
     41#define I2OSWDEL		_IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer)
     42#define I2OVALIDATE		_IOR(I2O_MAGIC_NUMBER,8,__u32)
     43#define I2OHTML 		_IOWR(I2O_MAGIC_NUMBER,9,struct i2o_html)
     44#define I2OEVTREG		_IOW(I2O_MAGIC_NUMBER,10,struct i2o_evt_id)
     45#define I2OEVTGET		_IOR(I2O_MAGIC_NUMBER,11,struct i2o_evt_info)
     46#define I2OPASSTHRU		_IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru)
     47#define I2OPASSTHRU32		_IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru32)
     48
     49struct i2o_cmd_passthru32 {
     50	unsigned int iop;	/* IOP unit number */
     51	__u32 msg;		/* message */
     52};
     53
     54struct i2o_cmd_passthru {
     55	unsigned int iop;	/* IOP unit number */
     56	void __user *msg;	/* message */
     57};
     58
     59struct i2o_cmd_hrtlct {
     60	unsigned int iop;	/* IOP unit number */
     61	void __user *resbuf;	/* Buffer for result */
     62	unsigned int __user *reslen;	/* Buffer length in bytes */
     63};
     64
     65struct i2o_cmd_psetget {
     66	unsigned int iop;	/* IOP unit number */
     67	unsigned int tid;	/* Target device TID */
     68	void __user *opbuf;	/* Operation List buffer */
     69	unsigned int oplen;	/* Operation List buffer length in bytes */
     70	void __user *resbuf;	/* Result List buffer */
     71	unsigned int __user *reslen;	/* Result List buffer length in bytes */
     72};
     73
     74struct i2o_sw_xfer {
     75	unsigned int iop;	/* IOP unit number */
     76	unsigned char flags;	/* Flags field */
     77	unsigned char sw_type;	/* Software type */
     78	unsigned int sw_id;	/* Software ID */
     79	void __user *buf;	/* Pointer to software buffer */
     80	unsigned int __user *swlen;	/* Length of software data */
     81	unsigned int __user *maxfrag;	/* Maximum fragment count */
     82	unsigned int __user *curfrag;	/* Current fragment count */
     83};
     84
     85struct i2o_html {
     86	unsigned int iop;	/* IOP unit number */
     87	unsigned int tid;	/* Target device ID */
     88	unsigned int page;	/* HTML page */
     89	void __user *resbuf;	/* Buffer for reply HTML page */
     90	unsigned int __user *reslen;	/* Length in bytes of reply buffer */
     91	void __user *qbuf;	/* Pointer to HTTP query string */
     92	unsigned int qlen;	/* Length in bytes of query string buffer */
     93};
     94
     95#define I2O_EVT_Q_LEN 32
     96
     97struct i2o_evt_id {
     98	unsigned int iop;
     99	unsigned int tid;
    100	unsigned int evt_mask;
    101};
    102
    103/* Event data size = frame size - message header + evt indicator */
    104#define I2O_EVT_DATA_SIZE 88
    105
    106struct i2o_evt_info {
    107	struct i2o_evt_id id;
    108	unsigned char evt_data[I2O_EVT_DATA_SIZE];
    109	unsigned int data_size;
    110};
    111
    112struct i2o_evt_get {
    113	struct i2o_evt_info info;
    114	int pending;
    115	int lost;
    116};
    117
    118typedef struct i2o_sg_io_hdr {
    119	unsigned int flags;	/* see I2O_DPT_SG_IO_FLAGS */
    120} i2o_sg_io_hdr_t;
    121
    122/**************************************************************************
    123 * HRT related constants and structures
    124 **************************************************************************/
    125#define I2O_BUS_LOCAL	0
    126#define I2O_BUS_ISA	1
    127#define I2O_BUS_EISA	2
    128/* was  I2O_BUS_MCA	3 */
    129#define I2O_BUS_PCI	4
    130#define I2O_BUS_PCMCIA	5
    131#define I2O_BUS_NUBUS	6
    132#define I2O_BUS_CARDBUS 7
    133#define I2O_BUS_UNKNOWN 0x80
    134
    135typedef struct _i2o_pci_bus {
    136	__u8 PciFunctionNumber;
    137	__u8 PciDeviceNumber;
    138	__u8 PciBusNumber;
    139	__u8 reserved;
    140	__u16 PciVendorID;
    141	__u16 PciDeviceID;
    142} i2o_pci_bus;
    143
    144typedef struct _i2o_local_bus {
    145	__u16 LbBaseIOPort;
    146	__u16 reserved;
    147	__u32 LbBaseMemoryAddress;
    148} i2o_local_bus;
    149
    150typedef struct _i2o_isa_bus {
    151	__u16 IsaBaseIOPort;
    152	__u8 CSN;
    153	__u8 reserved;
    154	__u32 IsaBaseMemoryAddress;
    155} i2o_isa_bus;
    156
    157typedef struct _i2o_eisa_bus_info {
    158	__u16 EisaBaseIOPort;
    159	__u8 reserved;
    160	__u8 EisaSlotNumber;
    161	__u32 EisaBaseMemoryAddress;
    162} i2o_eisa_bus;
    163
    164typedef struct _i2o_mca_bus {
    165	__u16 McaBaseIOPort;
    166	__u8 reserved;
    167	__u8 McaSlotNumber;
    168	__u32 McaBaseMemoryAddress;
    169} i2o_mca_bus;
    170
    171typedef struct _i2o_other_bus {
    172	__u16 BaseIOPort;
    173	__u16 reserved;
    174	__u32 BaseMemoryAddress;
    175} i2o_other_bus;
    176
    177typedef struct _i2o_hrt_entry {
    178	__u32 adapter_id;
    179	__u32 parent_tid:12;
    180	__u32 state:4;
    181	__u32 bus_num:8;
    182	__u32 bus_type:8;
    183	union {
    184		i2o_pci_bus pci_bus;
    185		i2o_local_bus local_bus;
    186		i2o_isa_bus isa_bus;
    187		i2o_eisa_bus eisa_bus;
    188		i2o_mca_bus mca_bus;
    189		i2o_other_bus other_bus;
    190	} bus;
    191} i2o_hrt_entry;
    192
    193typedef struct _i2o_hrt {
    194	__u16 num_entries;
    195	__u8 entry_len;
    196	__u8 hrt_version;
    197	__u32 change_ind;
    198	i2o_hrt_entry hrt_entry[1];
    199} i2o_hrt;
    200
    201typedef struct _i2o_lct_entry {
    202	__u32 entry_size:16;
    203	__u32 tid:12;
    204	__u32 reserved:4;
    205	__u32 change_ind;
    206	__u32 device_flags;
    207	__u32 class_id:12;
    208	__u32 version:4;
    209	__u32 vendor_id:16;
    210	__u32 sub_class;
    211	__u32 user_tid:12;
    212	__u32 parent_tid:12;
    213	__u32 bios_info:8;
    214	__u8 identity_tag[8];
    215	__u32 event_capabilities;
    216} i2o_lct_entry;
    217
    218typedef struct _i2o_lct {
    219	__u32 table_size:16;
    220	__u32 boot_tid:12;
    221	__u32 lct_ver:4;
    222	__u32 iop_flags;
    223	__u32 change_ind;
    224	i2o_lct_entry lct_entry[1];
    225} i2o_lct;
    226
    227typedef struct _i2o_status_block {
    228	__u16 org_id;
    229	__u16 reserved;
    230	__u16 iop_id:12;
    231	__u16 reserved1:4;
    232	__u16 host_unit_id;
    233	__u16 segment_number:12;
    234	__u16 i2o_version:4;
    235	__u8 iop_state;
    236	__u8 msg_type;
    237	__u16 inbound_frame_size;
    238	__u8 init_code;
    239	__u8 reserved2;
    240	__u32 max_inbound_frames;
    241	__u32 cur_inbound_frames;
    242	__u32 max_outbound_frames;
    243	char product_id[24];
    244	__u32 expected_lct_size;
    245	__u32 iop_capabilities;
    246	__u32 desired_mem_size;
    247	__u32 current_mem_size;
    248	__u32 current_mem_base;
    249	__u32 desired_io_size;
    250	__u32 current_io_size;
    251	__u32 current_io_base;
    252	__u32 reserved3:24;
    253	__u32 cmd_status:8;
    254} i2o_status_block;
    255
    256/* Event indicator mask flags */
    257#define I2O_EVT_IND_STATE_CHANGE		0x80000000
    258#define I2O_EVT_IND_GENERAL_WARNING		0x40000000
    259#define I2O_EVT_IND_CONFIGURATION_FLAG		0x20000000
    260#define I2O_EVT_IND_LOCK_RELEASE		0x10000000
    261#define I2O_EVT_IND_CAPABILITY_CHANGE		0x08000000
    262#define I2O_EVT_IND_DEVICE_RESET		0x04000000
    263#define I2O_EVT_IND_EVT_MASK_MODIFIED		0x02000000
    264#define I2O_EVT_IND_FIELD_MODIFIED		0x01000000
    265#define I2O_EVT_IND_VENDOR_EVT			0x00800000
    266#define I2O_EVT_IND_DEVICE_STATE		0x00400000
    267
    268/* Executive event indicitors */
    269#define I2O_EVT_IND_EXEC_RESOURCE_LIMITS	0x00000001
    270#define I2O_EVT_IND_EXEC_CONNECTION_FAIL	0x00000002
    271#define I2O_EVT_IND_EXEC_ADAPTER_FAULT		0x00000004
    272#define I2O_EVT_IND_EXEC_POWER_FAIL		0x00000008
    273#define I2O_EVT_IND_EXEC_RESET_PENDING		0x00000010
    274#define I2O_EVT_IND_EXEC_RESET_IMMINENT 	0x00000020
    275#define I2O_EVT_IND_EXEC_HW_FAIL		0x00000040
    276#define I2O_EVT_IND_EXEC_XCT_CHANGE		0x00000080
    277#define I2O_EVT_IND_EXEC_NEW_LCT_ENTRY		0x00000100
    278#define I2O_EVT_IND_EXEC_MODIFIED_LCT		0x00000200
    279#define I2O_EVT_IND_EXEC_DDM_AVAILABILITY	0x00000400
    280
    281/* Random Block Storage Event Indicators */
    282#define I2O_EVT_IND_BSA_VOLUME_LOAD		0x00000001
    283#define I2O_EVT_IND_BSA_VOLUME_UNLOAD		0x00000002
    284#define I2O_EVT_IND_BSA_VOLUME_UNLOAD_REQ	0x00000004
    285#define I2O_EVT_IND_BSA_CAPACITY_CHANGE 	0x00000008
    286#define I2O_EVT_IND_BSA_SCSI_SMART		0x00000010
    287
    288/* Event data for generic events */
    289#define I2O_EVT_STATE_CHANGE_NORMAL		0x00
    290#define I2O_EVT_STATE_CHANGE_SUSPENDED		0x01
    291#define I2O_EVT_STATE_CHANGE_RESTART		0x02
    292#define I2O_EVT_STATE_CHANGE_NA_RECOVER 	0x03
    293#define I2O_EVT_STATE_CHANGE_NA_NO_RECOVER	0x04
    294#define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST	0x05
    295#define I2O_EVT_STATE_CHANGE_FAILED		0x10
    296#define I2O_EVT_STATE_CHANGE_FAULTED		0x11
    297
    298#define I2O_EVT_GEN_WARNING_NORMAL		0x00
    299#define I2O_EVT_GEN_WARNING_ERROR_THRESHOLD	0x01
    300#define I2O_EVT_GEN_WARNING_MEDIA_FAULT 	0x02
    301
    302#define I2O_EVT_CAPABILITY_OTHER		0x01
    303#define I2O_EVT_CAPABILITY_CHANGED		0x02
    304
    305#define I2O_EVT_SENSOR_STATE_CHANGED		0x01
    306
    307/*
    308 *	I2O classes / subclasses
    309 */
    310
    311/*  Class ID and Code Assignments
    312 *  (LCT.ClassID.Version field)
    313 */
    314#define I2O_CLASS_VERSION_10			0x00
    315#define I2O_CLASS_VERSION_11			0x01
    316
    317/*  Class code names
    318 *  (from v1.5 Table 6-1 Class Code Assignments.)
    319 */
    320
    321#define I2O_CLASS_EXECUTIVE			0x000
    322#define I2O_CLASS_DDM				0x001
    323#define I2O_CLASS_RANDOM_BLOCK_STORAGE		0x010
    324#define I2O_CLASS_SEQUENTIAL_STORAGE		0x011
    325#define I2O_CLASS_LAN				0x020
    326#define I2O_CLASS_WAN				0x030
    327#define I2O_CLASS_FIBRE_CHANNEL_PORT		0x040
    328#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL	0x041
    329#define I2O_CLASS_SCSI_PERIPHERAL		0x051
    330#define I2O_CLASS_ATE_PORT			0x060
    331#define I2O_CLASS_ATE_PERIPHERAL		0x061
    332#define I2O_CLASS_FLOPPY_CONTROLLER		0x070
    333#define I2O_CLASS_FLOPPY_DEVICE 		0x071
    334#define I2O_CLASS_BUS_ADAPTER			0x080
    335#define I2O_CLASS_PEER_TRANSPORT_AGENT		0x090
    336#define I2O_CLASS_PEER_TRANSPORT		0x091
    337#define	I2O_CLASS_END				0xfff
    338
    339/*
    340 *  Rest of 0x092 - 0x09f reserved for peer-to-peer classes
    341 */
    342
    343#define I2O_CLASS_MATCH_ANYCLASS		0xffffffff
    344
    345/*
    346 *  Subclasses
    347 */
    348
    349#define I2O_SUBCLASS_i960			0x001
    350#define I2O_SUBCLASS_HDM			0x020
    351#define I2O_SUBCLASS_ISM			0x021
    352
    353/* Operation functions */
    354
    355#define I2O_PARAMS_FIELD_GET			0x0001
    356#define I2O_PARAMS_LIST_GET			0x0002
    357#define I2O_PARAMS_MORE_GET			0x0003
    358#define I2O_PARAMS_SIZE_GET			0x0004
    359#define I2O_PARAMS_TABLE_GET			0x0005
    360#define I2O_PARAMS_FIELD_SET			0x0006
    361#define I2O_PARAMS_LIST_SET			0x0007
    362#define I2O_PARAMS_ROW_ADD			0x0008
    363#define I2O_PARAMS_ROW_DELETE			0x0009
    364#define I2O_PARAMS_TABLE_CLEAR			0x000A
    365
    366/*
    367 * I2O serial number conventions / formats
    368 * (circa v1.5)
    369 */
    370
    371#define I2O_SNFORMAT_UNKNOWN			0
    372#define I2O_SNFORMAT_BINARY			1
    373#define I2O_SNFORMAT_ASCII			2
    374#define I2O_SNFORMAT_UNICODE			3
    375#define I2O_SNFORMAT_LAN48_MAC			4
    376#define I2O_SNFORMAT_WAN			5
    377
    378/*
    379 * Plus new in v2.0 (Yellowstone pdf doc)
    380 */
    381
    382#define I2O_SNFORMAT_LAN64_MAC			6
    383#define I2O_SNFORMAT_DDM			7
    384#define I2O_SNFORMAT_IEEE_REG64 		8
    385#define I2O_SNFORMAT_IEEE_REG128		9
    386#define I2O_SNFORMAT_UNKNOWN2			0xff
    387
    388/*
    389 *	I2O Get Status State values
    390 */
    391
    392#define ADAPTER_STATE_INITIALIZING		0x01
    393#define ADAPTER_STATE_RESET			0x02
    394#define ADAPTER_STATE_HOLD			0x04
    395#define ADAPTER_STATE_READY			0x05
    396#define ADAPTER_STATE_OPERATIONAL		0x08
    397#define ADAPTER_STATE_FAILED			0x10
    398#define ADAPTER_STATE_FAULTED			0x11
    399
    400/*
    401 *	Software module types
    402 */
    403#define I2O_SOFTWARE_MODULE_IRTOS		0x11
    404#define I2O_SOFTWARE_MODULE_IOP_PRIVATE		0x22
    405#define I2O_SOFTWARE_MODULE_IOP_CONFIG		0x23
    406
    407/*
    408 *	Vendors
    409 */
    410#define I2O_VENDOR_DPT				0x001b
    411
    412/*
    413 * DPT / Adaptec specific values for i2o_sg_io_hdr flags.
    414 */
    415#define I2O_DPT_SG_FLAG_INTERPRET		0x00010000
    416#define I2O_DPT_SG_FLAG_PHYSICAL		0x00020000
    417
    418#define I2O_DPT_FLASH_FRAG_SIZE			0x10000
    419#define I2O_DPT_FLASH_READ			0x0101
    420#define I2O_DPT_FLASH_WRITE			0x0102
    421
    422#endif				/* _I2O_DEV_H */