cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

iommu.h (4919B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2/*
      3 * IOMMU user API definitions
      4 */
      5
      6#ifndef _UAPI_IOMMU_H
      7#define _UAPI_IOMMU_H
      8
      9#include <linux/types.h>
     10
     11#define IOMMU_FAULT_PERM_READ	(1 << 0) /* read */
     12#define IOMMU_FAULT_PERM_WRITE	(1 << 1) /* write */
     13#define IOMMU_FAULT_PERM_EXEC	(1 << 2) /* exec */
     14#define IOMMU_FAULT_PERM_PRIV	(1 << 3) /* privileged */
     15
     16/* Generic fault types, can be expanded IRQ remapping fault */
     17enum iommu_fault_type {
     18	IOMMU_FAULT_DMA_UNRECOV = 1,	/* unrecoverable fault */
     19	IOMMU_FAULT_PAGE_REQ,		/* page request fault */
     20};
     21
     22enum iommu_fault_reason {
     23	IOMMU_FAULT_REASON_UNKNOWN = 0,
     24
     25	/* Could not access the PASID table (fetch caused external abort) */
     26	IOMMU_FAULT_REASON_PASID_FETCH,
     27
     28	/* PASID entry is invalid or has configuration errors */
     29	IOMMU_FAULT_REASON_BAD_PASID_ENTRY,
     30
     31	/*
     32	 * PASID is out of range (e.g. exceeds the maximum PASID
     33	 * supported by the IOMMU) or disabled.
     34	 */
     35	IOMMU_FAULT_REASON_PASID_INVALID,
     36
     37	/*
     38	 * An external abort occurred fetching (or updating) a translation
     39	 * table descriptor
     40	 */
     41	IOMMU_FAULT_REASON_WALK_EABT,
     42
     43	/*
     44	 * Could not access the page table entry (Bad address),
     45	 * actual translation fault
     46	 */
     47	IOMMU_FAULT_REASON_PTE_FETCH,
     48
     49	/* Protection flag check failed */
     50	IOMMU_FAULT_REASON_PERMISSION,
     51
     52	/* access flag check failed */
     53	IOMMU_FAULT_REASON_ACCESS,
     54
     55	/* Output address of a translation stage caused Address Size fault */
     56	IOMMU_FAULT_REASON_OOR_ADDRESS,
     57};
     58
     59/**
     60 * struct iommu_fault_unrecoverable - Unrecoverable fault data
     61 * @reason: reason of the fault, from &enum iommu_fault_reason
     62 * @flags: parameters of this fault (IOMMU_FAULT_UNRECOV_* values)
     63 * @pasid: Process Address Space ID
     64 * @perm: requested permission access using by the incoming transaction
     65 *        (IOMMU_FAULT_PERM_* values)
     66 * @addr: offending page address
     67 * @fetch_addr: address that caused a fetch abort, if any
     68 */
     69struct iommu_fault_unrecoverable {
     70	__u32	reason;
     71#define IOMMU_FAULT_UNRECOV_PASID_VALID		(1 << 0)
     72#define IOMMU_FAULT_UNRECOV_ADDR_VALID		(1 << 1)
     73#define IOMMU_FAULT_UNRECOV_FETCH_ADDR_VALID	(1 << 2)
     74	__u32	flags;
     75	__u32	pasid;
     76	__u32	perm;
     77	__u64	addr;
     78	__u64	fetch_addr;
     79};
     80
     81/**
     82 * struct iommu_fault_page_request - Page Request data
     83 * @flags: encodes whether the corresponding fields are valid and whether this
     84 *         is the last page in group (IOMMU_FAULT_PAGE_REQUEST_* values).
     85 *         When IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID is set, the page response
     86 *         must have the same PASID value as the page request. When it is clear,
     87 *         the page response should not have a PASID.
     88 * @pasid: Process Address Space ID
     89 * @grpid: Page Request Group Index
     90 * @perm: requested page permissions (IOMMU_FAULT_PERM_* values)
     91 * @addr: page address
     92 * @private_data: device-specific private information
     93 */
     94struct iommu_fault_page_request {
     95#define IOMMU_FAULT_PAGE_REQUEST_PASID_VALID	(1 << 0)
     96#define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE	(1 << 1)
     97#define IOMMU_FAULT_PAGE_REQUEST_PRIV_DATA	(1 << 2)
     98#define IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID	(1 << 3)
     99	__u32	flags;
    100	__u32	pasid;
    101	__u32	grpid;
    102	__u32	perm;
    103	__u64	addr;
    104	__u64	private_data[2];
    105};
    106
    107/**
    108 * struct iommu_fault - Generic fault data
    109 * @type: fault type from &enum iommu_fault_type
    110 * @padding: reserved for future use (should be zero)
    111 * @event: fault event, when @type is %IOMMU_FAULT_DMA_UNRECOV
    112 * @prm: Page Request message, when @type is %IOMMU_FAULT_PAGE_REQ
    113 * @padding2: sets the fault size to allow for future extensions
    114 */
    115struct iommu_fault {
    116	__u32	type;
    117	__u32	padding;
    118	union {
    119		struct iommu_fault_unrecoverable event;
    120		struct iommu_fault_page_request prm;
    121		__u8 padding2[56];
    122	};
    123};
    124
    125/**
    126 * enum iommu_page_response_code - Return status of fault handlers
    127 * @IOMMU_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
    128 *	populated, retry the access. This is "Success" in PCI PRI.
    129 * @IOMMU_PAGE_RESP_FAILURE: General error. Drop all subsequent faults from
    130 *	this device if possible. This is "Response Failure" in PCI PRI.
    131 * @IOMMU_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
    132 *	access. This is "Invalid Request" in PCI PRI.
    133 */
    134enum iommu_page_response_code {
    135	IOMMU_PAGE_RESP_SUCCESS = 0,
    136	IOMMU_PAGE_RESP_INVALID,
    137	IOMMU_PAGE_RESP_FAILURE,
    138};
    139
    140/**
    141 * struct iommu_page_response - Generic page response information
    142 * @argsz: User filled size of this data
    143 * @version: API version of this structure
    144 * @flags: encodes whether the corresponding fields are valid
    145 *         (IOMMU_FAULT_PAGE_RESPONSE_* values)
    146 * @pasid: Process Address Space ID
    147 * @grpid: Page Request Group Index
    148 * @code: response code from &enum iommu_page_response_code
    149 */
    150struct iommu_page_response {
    151	__u32	argsz;
    152#define IOMMU_PAGE_RESP_VERSION_1	1
    153	__u32	version;
    154#define IOMMU_PAGE_RESP_PASID_VALID	(1 << 0)
    155	__u32	flags;
    156	__u32	pasid;
    157	__u32	grpid;
    158	__u32	code;
    159};
    160
    161#endif /* _UAPI_IOMMU_H */