cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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kfd_sysfs.h (4350B)


      1/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */
      2/*
      3 * Copyright 2021 Advanced Micro Devices, Inc.
      4 *
      5 * Permission is hereby granted, free of charge, to any person obtaining a
      6 * copy of this software and associated documentation files (the "Software"),
      7 * to deal in the Software without restriction, including without limitation
      8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      9 * and/or sell copies of the Software, and to permit persons to whom the
     10 * Software is furnished to do so, subject to the following conditions:
     11 *
     12 * The above copyright notice and this permission notice shall be included in
     13 * all copies or substantial portions of the Software.
     14 *
     15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     21 * OTHER DEALINGS IN THE SOFTWARE.
     22 */
     23
     24#ifndef KFD_SYSFS_H_INCLUDED
     25#define KFD_SYSFS_H_INCLUDED
     26
     27/* Capability bits in node properties */
     28#define HSA_CAP_HOT_PLUGGABLE			0x00000001
     29#define HSA_CAP_ATS_PRESENT			0x00000002
     30#define HSA_CAP_SHARED_WITH_GRAPHICS		0x00000004
     31#define HSA_CAP_QUEUE_SIZE_POW2			0x00000008
     32#define HSA_CAP_QUEUE_SIZE_32BIT		0x00000010
     33#define HSA_CAP_QUEUE_IDLE_EVENT		0x00000020
     34#define HSA_CAP_VA_LIMIT			0x00000040
     35#define HSA_CAP_WATCH_POINTS_SUPPORTED		0x00000080
     36#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK	0x00000f00
     37#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT	8
     38#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK	0x00003000
     39#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT	12
     40
     41#define HSA_CAP_DOORBELL_TYPE_PRE_1_0		0x0
     42#define HSA_CAP_DOORBELL_TYPE_1_0		0x1
     43#define HSA_CAP_DOORBELL_TYPE_2_0		0x2
     44#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP		0x00004000
     45
     46/* Old buggy user mode depends on this being 0 */
     47#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED	0x00080000
     48
     49#define HSA_CAP_MEM_EDCSUPPORTED		0x00100000
     50#define HSA_CAP_RASEVENTNOTIFY			0x00200000
     51#define HSA_CAP_ASIC_REVISION_MASK		0x03c00000
     52#define HSA_CAP_ASIC_REVISION_SHIFT		22
     53#define HSA_CAP_SRAM_EDCSUPPORTED		0x04000000
     54#define HSA_CAP_SVMAPI_SUPPORTED		0x08000000
     55#define HSA_CAP_FLAGS_COHERENTHOSTACCESS	0x10000000
     56#define HSA_CAP_RESERVED			0xe00f8000
     57
     58/* Heap types in memory properties */
     59#define HSA_MEM_HEAP_TYPE_SYSTEM	0
     60#define HSA_MEM_HEAP_TYPE_FB_PUBLIC	1
     61#define HSA_MEM_HEAP_TYPE_FB_PRIVATE	2
     62#define HSA_MEM_HEAP_TYPE_GPU_GDS	3
     63#define HSA_MEM_HEAP_TYPE_GPU_LDS	4
     64#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH	5
     65
     66/* Flag bits in memory properties */
     67#define HSA_MEM_FLAGS_HOT_PLUGGABLE		0x00000001
     68#define HSA_MEM_FLAGS_NON_VOLATILE		0x00000002
     69#define HSA_MEM_FLAGS_RESERVED			0xfffffffc
     70
     71/* Cache types in cache properties */
     72#define HSA_CACHE_TYPE_DATA		0x00000001
     73#define HSA_CACHE_TYPE_INSTRUCTION	0x00000002
     74#define HSA_CACHE_TYPE_CPU		0x00000004
     75#define HSA_CACHE_TYPE_HSACU		0x00000008
     76#define HSA_CACHE_TYPE_RESERVED		0xfffffff0
     77
     78/* Link types in IO link properties (matches CRAT link types) */
     79#define HSA_IOLINK_TYPE_UNDEFINED	0
     80#define HSA_IOLINK_TYPE_HYPERTRANSPORT	1
     81#define HSA_IOLINK_TYPE_PCIEXPRESS	2
     82#define HSA_IOLINK_TYPE_AMBA		3
     83#define HSA_IOLINK_TYPE_MIPI		4
     84#define HSA_IOLINK_TYPE_QPI_1_1	5
     85#define HSA_IOLINK_TYPE_RESERVED1	6
     86#define HSA_IOLINK_TYPE_RESERVED2	7
     87#define HSA_IOLINK_TYPE_RAPID_IO	8
     88#define HSA_IOLINK_TYPE_INFINIBAND	9
     89#define HSA_IOLINK_TYPE_RESERVED3	10
     90#define HSA_IOLINK_TYPE_XGMI		11
     91#define HSA_IOLINK_TYPE_XGOP		12
     92#define HSA_IOLINK_TYPE_GZ		13
     93#define HSA_IOLINK_TYPE_ETHERNET_RDMA	14
     94#define HSA_IOLINK_TYPE_RDMA_OTHER	15
     95#define HSA_IOLINK_TYPE_OTHER		16
     96
     97/* Flag bits in IO link properties (matches CRAT flags, excluding the
     98 * bi-directional flag, which is not offially part of the CRAT spec, and
     99 * only used internally in KFD)
    100 */
    101#define HSA_IOLINK_FLAGS_ENABLED		(1 << 0)
    102#define HSA_IOLINK_FLAGS_NON_COHERENT		(1 << 1)
    103#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT	(1 << 2)
    104#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT	(1 << 3)
    105#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA	(1 << 4)
    106#define HSA_IOLINK_FLAGS_RESERVED		0xffffffe0
    107
    108#endif