cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pci.h (1395B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2/*
      3 *	pci.h
      4 *
      5 *	PCI defines and function prototypes
      6 *	Copyright 1994, Drew Eckhardt
      7 *	Copyright 1997--1999 Martin Mares <mj@ucw.cz>
      8 *
      9 *	For more information, please consult the following manuals (look at
     10 *	http://www.pcisig.com/ for how to get them):
     11 *
     12 *	PCI BIOS Specification
     13 *	PCI Local Bus Specification
     14 *	PCI to PCI Bridge Specification
     15 *	PCI System Design Guide
     16 */
     17
     18#ifndef _UAPILINUX_PCI_H
     19#define _UAPILINUX_PCI_H
     20
     21#include <linux/pci_regs.h>	/* The pci register defines */
     22
     23/*
     24 * The PCI interface treats multi-function devices as independent
     25 * devices.  The slot/function address of each device is encoded
     26 * in a single byte as follows:
     27 *
     28 *	7:3 = slot
     29 *	2:0 = function
     30 */
     31#define PCI_DEVFN(slot, func)	((((slot) & 0x1f) << 3) | ((func) & 0x07))
     32#define PCI_SLOT(devfn)		(((devfn) >> 3) & 0x1f)
     33#define PCI_FUNC(devfn)		((devfn) & 0x07)
     34
     35/* Ioctls for /proc/bus/pci/X/Y nodes. */
     36#define PCIIOC_BASE		('P' << 24 | 'C' << 16 | 'I' << 8)
     37#define PCIIOC_CONTROLLER	(PCIIOC_BASE | 0x00)	/* Get controller for PCI device. */
     38#define PCIIOC_MMAP_IS_IO	(PCIIOC_BASE | 0x01)	/* Set mmap state to I/O space. */
     39#define PCIIOC_MMAP_IS_MEM	(PCIIOC_BASE | 0x02)	/* Set mmap state to MEM space. */
     40#define PCIIOC_WRITE_COMBINE	(PCIIOC_BASE | 0x03)	/* Enable/disable write-combining. */
     41
     42#endif /* _UAPILINUX_PCI_H */