cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rio_mport_cdev.h (9330B)


      1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
      2/*
      3 * Copyright (c) 2015-2016, Integrated Device Technology Inc.
      4 * Copyright (c) 2015, Prodrive Technologies
      5 * Copyright (c) 2015, Texas Instruments Incorporated
      6 * Copyright (c) 2015, RapidIO Trade Association
      7 * All rights reserved.
      8 *
      9 * This software is available to you under a choice of one of two licenses.
     10 * You may choose to be licensed under the terms of the GNU General Public
     11 * License(GPL) Version 2, or the BSD-3 Clause license below:
     12 *
     13 * Redistribution and use in source and binary forms, with or without
     14 * modification, are permitted provided that the following conditions are met:
     15 *
     16 * 1. Redistributions of source code must retain the above copyright notice,
     17 * this list of conditions and the following disclaimer.
     18 *
     19 * 2. Redistributions in binary form must reproduce the above copyright notice,
     20 * this list of conditions and the following disclaimer in the documentation
     21 * and/or other materials provided with the distribution.
     22 *
     23 * 3. Neither the name of the copyright holder nor the names of its contributors
     24 * may be used to endorse or promote products derived from this software without
     25 * specific prior written permission.
     26 *
     27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     28 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     29 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
     31 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     32 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     33 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     34 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     35 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     36 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     37 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     38 */
     39
     40#ifndef _RIO_MPORT_CDEV_H_
     41#define _RIO_MPORT_CDEV_H_
     42
     43#include <linux/ioctl.h>
     44#include <linux/types.h>
     45
     46struct rio_mport_maint_io {
     47	__u16 rioid;		/* destID of remote device */
     48	__u8  hopcount;		/* hopcount to remote device */
     49	__u8  pad0[5];
     50	__u32 offset;		/* offset in register space */
     51	__u32 length;		/* length in bytes */
     52	__u64 buffer;		/* pointer to data buffer */
     53};
     54
     55/*
     56 * Definitions for RapidIO data transfers:
     57 * - memory mapped (MAPPED)
     58 * - packet generation from memory (TRANSFER)
     59 */
     60#define RIO_TRANSFER_MODE_MAPPED	(1 << 0)
     61#define RIO_TRANSFER_MODE_TRANSFER	(1 << 1)
     62#define RIO_CAP_DBL_SEND		(1 << 2)
     63#define RIO_CAP_DBL_RECV		(1 << 3)
     64#define RIO_CAP_PW_SEND			(1 << 4)
     65#define RIO_CAP_PW_RECV			(1 << 5)
     66#define RIO_CAP_MAP_OUTB		(1 << 6)
     67#define RIO_CAP_MAP_INB			(1 << 7)
     68
     69struct rio_mport_properties {
     70	__u16 hdid;
     71	__u8  id;			/* Physical port ID */
     72	__u8  index;
     73	__u32 flags;
     74	__u32 sys_size;		/* Default addressing size */
     75	__u8  port_ok;
     76	__u8  link_speed;
     77	__u8  link_width;
     78	__u8  pad0;
     79	__u32 dma_max_sge;
     80	__u32 dma_max_size;
     81	__u32 dma_align;
     82	__u32 transfer_mode;		/* Default transfer mode */
     83	__u32 cap_sys_size;		/* Capable system sizes */
     84	__u32 cap_addr_size;		/* Capable addressing sizes */
     85	__u32 cap_transfer_mode;	/* Capable transfer modes */
     86	__u32 cap_mport;		/* Mport capabilities */
     87};
     88
     89/*
     90 * Definitions for RapidIO events;
     91 * - incoming port-writes
     92 * - incoming doorbells
     93 */
     94#define RIO_DOORBELL	(1 << 0)
     95#define RIO_PORTWRITE	(1 << 1)
     96
     97struct rio_doorbell {
     98	__u16 rioid;
     99	__u16 payload;
    100};
    101
    102struct rio_doorbell_filter {
    103	__u16 rioid;	/* Use RIO_INVALID_DESTID to match all ids */
    104	__u16 low;
    105	__u16 high;
    106	__u16 pad0;
    107};
    108
    109
    110struct rio_portwrite {
    111	__u32 payload[16];
    112};
    113
    114struct rio_pw_filter {
    115	__u32 mask;
    116	__u32 low;
    117	__u32 high;
    118	__u32 pad0;
    119};
    120
    121/* RapidIO base address for inbound requests set to value defined below
    122 * indicates that no specific RIO-to-local address translation is requested
    123 * and driver should use direct (one-to-one) address mapping.
    124*/
    125#define RIO_MAP_ANY_ADDR	(__u64)(~((__u64) 0))
    126
    127struct rio_mmap {
    128	__u16 rioid;
    129	__u16 pad0[3];
    130	__u64 rio_addr;
    131	__u64 length;
    132	__u64 handle;
    133	__u64 address;
    134};
    135
    136struct rio_dma_mem {
    137	__u64 length;		/* length of DMA memory */
    138	__u64 dma_handle;	/* handle associated with this memory */
    139	__u64 address;
    140};
    141
    142struct rio_event {
    143	__u32 header;	/* event type RIO_DOORBELL or RIO_PORTWRITE */
    144	union {
    145		struct rio_doorbell doorbell;	/* header for RIO_DOORBELL */
    146		struct rio_portwrite portwrite; /* header for RIO_PORTWRITE */
    147	} u;
    148	__u32 pad0;
    149};
    150
    151enum rio_transfer_sync {
    152	RIO_TRANSFER_SYNC,	/* synchronous transfer */
    153	RIO_TRANSFER_ASYNC,	/* asynchronous transfer */
    154	RIO_TRANSFER_FAF,	/* fire-and-forget transfer */
    155};
    156
    157enum rio_transfer_dir {
    158	RIO_TRANSFER_DIR_READ,	/* Read operation */
    159	RIO_TRANSFER_DIR_WRITE,	/* Write operation */
    160};
    161
    162/*
    163 * RapidIO data exchange transactions are lists of individual transfers. Each
    164 * transfer exchanges data between two RapidIO devices by remote direct memory
    165 * access and has its own completion code.
    166 *
    167 * The RapidIO specification defines four types of data exchange requests:
    168 * NREAD, NWRITE, SWRITE and NWRITE_R. The RapidIO DMA channel interface allows
    169 * to specify the required type of write operation or combination of them when
    170 * only the last data packet requires response.
    171 *
    172 * NREAD:    read up to 256 bytes from remote device memory into local memory
    173 * NWRITE:   write up to 256 bytes from local memory to remote device memory
    174 *           without confirmation
    175 * SWRITE:   as NWRITE, but all addresses and payloads must be 64-bit aligned
    176 * NWRITE_R: as NWRITE, but expect acknowledgment from remote device.
    177 *
    178 * The default exchange is chosen from NREAD and any of the WRITE modes as the
    179 * driver sees fit. For write requests the user can explicitly choose between
    180 * any of the write modes for each transaction.
    181 */
    182enum rio_exchange {
    183	RIO_EXCHANGE_DEFAULT,	/* Default method */
    184	RIO_EXCHANGE_NWRITE,	/* All packets using NWRITE */
    185	RIO_EXCHANGE_SWRITE,	/* All packets using SWRITE */
    186	RIO_EXCHANGE_NWRITE_R,	/* Last packet NWRITE_R, others NWRITE */
    187	RIO_EXCHANGE_SWRITE_R,	/* Last packet NWRITE_R, others SWRITE */
    188	RIO_EXCHANGE_NWRITE_R_ALL, /* All packets using NWRITE_R */
    189};
    190
    191struct rio_transfer_io {
    192	__u64 rio_addr;	/* Address in target's RIO mem space */
    193	__u64 loc_addr;
    194	__u64 handle;
    195	__u64 offset;	/* Offset in buffer */
    196	__u64 length;	/* Length in bytes */
    197	__u16 rioid;	/* Target destID */
    198	__u16 method;	/* Data exchange method, one of rio_exchange enum */
    199	__u32 completion_code;	/* Completion code for this transfer */
    200};
    201
    202struct rio_transaction {
    203	__u64 block;	/* Pointer to array of <count> transfers */
    204	__u32 count;	/* Number of transfers */
    205	__u32 transfer_mode;	/* Data transfer mode */
    206	__u16 sync;	/* Synch method, one of rio_transfer_sync enum */
    207	__u16 dir;	/* Transfer direction, one of rio_transfer_dir enum */
    208	__u32 pad0;
    209};
    210
    211struct rio_async_tx_wait {
    212	__u32 token;	/* DMA transaction ID token */
    213	__u32 timeout;	/* Wait timeout in msec, if 0 use default TO */
    214};
    215
    216#define RIO_MAX_DEVNAME_SZ	20
    217
    218struct rio_rdev_info {
    219	__u16 destid;
    220	__u8 hopcount;
    221	__u8 pad0;
    222	__u32 comptag;
    223	char name[RIO_MAX_DEVNAME_SZ + 1];
    224};
    225
    226/* Driver IOCTL codes */
    227#define RIO_MPORT_DRV_MAGIC           'm'
    228
    229#define RIO_MPORT_MAINT_HDID_SET	\
    230	_IOW(RIO_MPORT_DRV_MAGIC, 1, __u16)
    231#define RIO_MPORT_MAINT_COMPTAG_SET	\
    232	_IOW(RIO_MPORT_DRV_MAGIC, 2, __u32)
    233#define RIO_MPORT_MAINT_PORT_IDX_GET	\
    234	_IOR(RIO_MPORT_DRV_MAGIC, 3, __u32)
    235#define RIO_MPORT_GET_PROPERTIES \
    236	_IOR(RIO_MPORT_DRV_MAGIC, 4, struct rio_mport_properties)
    237#define RIO_MPORT_MAINT_READ_LOCAL \
    238	_IOR(RIO_MPORT_DRV_MAGIC, 5, struct rio_mport_maint_io)
    239#define RIO_MPORT_MAINT_WRITE_LOCAL \
    240	_IOW(RIO_MPORT_DRV_MAGIC, 6, struct rio_mport_maint_io)
    241#define RIO_MPORT_MAINT_READ_REMOTE \
    242	_IOR(RIO_MPORT_DRV_MAGIC, 7, struct rio_mport_maint_io)
    243#define RIO_MPORT_MAINT_WRITE_REMOTE \
    244	_IOW(RIO_MPORT_DRV_MAGIC, 8, struct rio_mport_maint_io)
    245#define RIO_ENABLE_DOORBELL_RANGE	\
    246	_IOW(RIO_MPORT_DRV_MAGIC, 9, struct rio_doorbell_filter)
    247#define RIO_DISABLE_DOORBELL_RANGE	\
    248	_IOW(RIO_MPORT_DRV_MAGIC, 10, struct rio_doorbell_filter)
    249#define RIO_ENABLE_PORTWRITE_RANGE	\
    250	_IOW(RIO_MPORT_DRV_MAGIC, 11, struct rio_pw_filter)
    251#define RIO_DISABLE_PORTWRITE_RANGE	\
    252	_IOW(RIO_MPORT_DRV_MAGIC, 12, struct rio_pw_filter)
    253#define RIO_SET_EVENT_MASK		\
    254	_IOW(RIO_MPORT_DRV_MAGIC, 13, __u32)
    255#define RIO_GET_EVENT_MASK		\
    256	_IOR(RIO_MPORT_DRV_MAGIC, 14, __u32)
    257#define RIO_MAP_OUTBOUND \
    258	_IOWR(RIO_MPORT_DRV_MAGIC, 15, struct rio_mmap)
    259#define RIO_UNMAP_OUTBOUND \
    260	_IOW(RIO_MPORT_DRV_MAGIC, 16, struct rio_mmap)
    261#define RIO_MAP_INBOUND \
    262	_IOWR(RIO_MPORT_DRV_MAGIC, 17, struct rio_mmap)
    263#define RIO_UNMAP_INBOUND \
    264	_IOW(RIO_MPORT_DRV_MAGIC, 18, __u64)
    265#define RIO_ALLOC_DMA \
    266	_IOWR(RIO_MPORT_DRV_MAGIC, 19, struct rio_dma_mem)
    267#define RIO_FREE_DMA \
    268	_IOW(RIO_MPORT_DRV_MAGIC, 20, __u64)
    269#define RIO_TRANSFER \
    270	_IOWR(RIO_MPORT_DRV_MAGIC, 21, struct rio_transaction)
    271#define RIO_WAIT_FOR_ASYNC \
    272	_IOW(RIO_MPORT_DRV_MAGIC, 22, struct rio_async_tx_wait)
    273#define RIO_DEV_ADD \
    274	_IOW(RIO_MPORT_DRV_MAGIC, 23, struct rio_rdev_info)
    275#define RIO_DEV_DEL \
    276	_IOW(RIO_MPORT_DRV_MAGIC, 24, struct rio_rdev_info)
    277
    278#endif /* _RIO_MPORT_CDEV_H_ */