cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bnxt_re-abi.h (3514B)

      1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
      2/*
      3 * Broadcom NetXtreme-E RoCE driver.
      4 *
      5 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
      6 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
      7 *
      8 * This software is available to you under a choice of one of two
      9 * licenses.  You may choose to be licensed under the terms of the GNU
     10 * General Public License (GPL) Version 2, available from the file
     11 * COPYING in the main directory of this source tree, or the
     12 * BSD license below:
     13 *
     14 * Redistribution and use in source and binary forms, with or without
     15 * modification, are permitted provided that the following conditions
     16 * are met:
     17 *
     18 * 1. Redistributions of source code must retain the above copyright
     19 *    notice, this list of conditions and the following disclaimer.
     20 * 2. Redistributions in binary form must reproduce the above copyright
     21 *    notice, this list of conditions and the following disclaimer in
     22 *    the documentation and/or other materials provided with the
     23 *    distribution.
     24 *
     25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
     26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
     29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
     32 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
     34 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
     35 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     36 *
     37 * Description: Uverbs ABI header file
     38 */
     39
     40#ifndef __BNXT_RE_UVERBS_ABI_H__
     41#define __BNXT_RE_UVERBS_ABI_H__
     42
     43#include <linux/types.h>
     44
     45#define BNXT_RE_ABI_VERSION	1
     46
     47#define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT		0x00
     48#define BNXT_RE_CHIP_ID0_CHIP_REV_SFT		0x10
     49#define BNXT_RE_CHIP_ID0_CHIP_MET_SFT		0x18
     50
     51enum {
     52	BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL,
     53	BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL,
     54};
     55
     56enum bnxt_re_wqe_mode {
     57	BNXT_QPLIB_WQE_MODE_STATIC	= 0x00,
     58	BNXT_QPLIB_WQE_MODE_VARIABLE	= 0x01,
     59	BNXT_QPLIB_WQE_MODE_INVALID	= 0x02,
     60};
     61
     62struct bnxt_re_uctx_resp {
     63	__u32 dev_id;
     64	__u32 max_qp;
     65	__u32 pg_size;
     66	__u32 cqe_sz;
     67	__u32 max_cqd;
     68	__u32 rsvd;
     69	__aligned_u64 comp_mask;
     70	__u32 chip_id0;
     71	__u32 chip_id1;
     72	__u32 mode;
     73	__u32 rsvd1; /* padding */
     74};
     75
     76/*
     77 * This struct is placed after the ib_uverbs_alloc_pd_resp struct, which is
     78 * not 8 byted aligned. To avoid undesired padding in various cases we have to
     79 * set this struct to packed.
     80 */
     81struct bnxt_re_pd_resp {
     82	__u32 pdid;
     83	__u32 dpi;
     84	__u64 dbr;
     85} __attribute__((packed, aligned(4)));
     86
     87struct bnxt_re_cq_req {
     88	__aligned_u64 cq_va;
     89	__aligned_u64 cq_handle;
     90};
     91
     92struct bnxt_re_cq_resp {
     93	__u32 cqid;
     94	__u32 tail;
     95	__u32 phase;
     96	__u32 rsvd;
     97};
     98
     99struct bnxt_re_qp_req {
    100	__aligned_u64 qpsva;
    101	__aligned_u64 qprva;
    102	__aligned_u64 qp_handle;
    103};
    104
    105struct bnxt_re_qp_resp {
    106	__u32 qpid;
    107	__u32 rsvd;
    108};
    109
    110struct bnxt_re_srq_req {
    111	__aligned_u64 srqva;
    112	__aligned_u64 srq_handle;
    113};
    114
    115struct bnxt_re_srq_resp {
    116	__u32 srqid;
    117};
    118
    119enum bnxt_re_shpg_offt {
    120	BNXT_RE_BEG_RESV_OFFT	= 0x00,
    121	BNXT_RE_AVID_OFFT	= 0x10,
    122	BNXT_RE_AVID_SIZE	= 0x04,
    123	BNXT_RE_END_RESV_OFFT	= 0xFF0
    124};
    125
    126#endif /* __BNXT_RE_UVERBS_ABI_H__*/