cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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ib_user_verbs.h (28448B)


      1/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
      2/*
      3 * Copyright (c) 2005 Topspin Communications.  All rights reserved.
      4 * Copyright (c) 2005, 2006 Cisco Systems.  All rights reserved.
      5 * Copyright (c) 2005 PathScale, Inc.  All rights reserved.
      6 * Copyright (c) 2006 Mellanox Technologies.  All rights reserved.
      7 *
      8 * This software is available to you under a choice of one of two
      9 * licenses.  You may choose to be licensed under the terms of the GNU
     10 * General Public License (GPL) Version 2, available from the file
     11 * COPYING in the main directory of this source tree, or the
     12 * OpenIB.org BSD license below:
     13 *
     14 *     Redistribution and use in source and binary forms, with or
     15 *     without modification, are permitted provided that the following
     16 *     conditions are met:
     17 *
     18 *      - Redistributions of source code must retain the above
     19 *        copyright notice, this list of conditions and the following
     20 *        disclaimer.
     21 *
     22 *      - Redistributions in binary form must reproduce the above
     23 *        copyright notice, this list of conditions and the following
     24 *        disclaimer in the documentation and/or other materials
     25 *        provided with the distribution.
     26 *
     27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     34 * SOFTWARE.
     35 */
     36
     37#ifndef IB_USER_VERBS_H
     38#define IB_USER_VERBS_H
     39
     40#include <linux/types.h>
     41
     42/*
     43 * Increment this value if any changes that break userspace ABI
     44 * compatibility are made.
     45 */
     46#define IB_USER_VERBS_ABI_VERSION	6
     47#define IB_USER_VERBS_CMD_THRESHOLD    50
     48
     49enum ib_uverbs_write_cmds {
     50	IB_USER_VERBS_CMD_GET_CONTEXT,
     51	IB_USER_VERBS_CMD_QUERY_DEVICE,
     52	IB_USER_VERBS_CMD_QUERY_PORT,
     53	IB_USER_VERBS_CMD_ALLOC_PD,
     54	IB_USER_VERBS_CMD_DEALLOC_PD,
     55	IB_USER_VERBS_CMD_CREATE_AH,
     56	IB_USER_VERBS_CMD_MODIFY_AH,
     57	IB_USER_VERBS_CMD_QUERY_AH,
     58	IB_USER_VERBS_CMD_DESTROY_AH,
     59	IB_USER_VERBS_CMD_REG_MR,
     60	IB_USER_VERBS_CMD_REG_SMR,
     61	IB_USER_VERBS_CMD_REREG_MR,
     62	IB_USER_VERBS_CMD_QUERY_MR,
     63	IB_USER_VERBS_CMD_DEREG_MR,
     64	IB_USER_VERBS_CMD_ALLOC_MW,
     65	IB_USER_VERBS_CMD_BIND_MW,
     66	IB_USER_VERBS_CMD_DEALLOC_MW,
     67	IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
     68	IB_USER_VERBS_CMD_CREATE_CQ,
     69	IB_USER_VERBS_CMD_RESIZE_CQ,
     70	IB_USER_VERBS_CMD_DESTROY_CQ,
     71	IB_USER_VERBS_CMD_POLL_CQ,
     72	IB_USER_VERBS_CMD_PEEK_CQ,
     73	IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,
     74	IB_USER_VERBS_CMD_CREATE_QP,
     75	IB_USER_VERBS_CMD_QUERY_QP,
     76	IB_USER_VERBS_CMD_MODIFY_QP,
     77	IB_USER_VERBS_CMD_DESTROY_QP,
     78	IB_USER_VERBS_CMD_POST_SEND,
     79	IB_USER_VERBS_CMD_POST_RECV,
     80	IB_USER_VERBS_CMD_ATTACH_MCAST,
     81	IB_USER_VERBS_CMD_DETACH_MCAST,
     82	IB_USER_VERBS_CMD_CREATE_SRQ,
     83	IB_USER_VERBS_CMD_MODIFY_SRQ,
     84	IB_USER_VERBS_CMD_QUERY_SRQ,
     85	IB_USER_VERBS_CMD_DESTROY_SRQ,
     86	IB_USER_VERBS_CMD_POST_SRQ_RECV,
     87	IB_USER_VERBS_CMD_OPEN_XRCD,
     88	IB_USER_VERBS_CMD_CLOSE_XRCD,
     89	IB_USER_VERBS_CMD_CREATE_XSRQ,
     90	IB_USER_VERBS_CMD_OPEN_QP,
     91};
     92
     93enum {
     94	IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
     95	IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,
     96	IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,
     97	IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,
     98	IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
     99	IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
    100	IB_USER_VERBS_EX_CMD_CREATE_WQ,
    101	IB_USER_VERBS_EX_CMD_MODIFY_WQ,
    102	IB_USER_VERBS_EX_CMD_DESTROY_WQ,
    103	IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,
    104	IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,
    105	IB_USER_VERBS_EX_CMD_MODIFY_CQ
    106};
    107
    108/*
    109 * Make sure that all structs defined in this file remain laid out so
    110 * that they pack the same way on 32-bit and 64-bit architectures (to
    111 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
    112 * Specifically:
    113 *  - Do not use pointer types -- pass pointers in __u64 instead.
    114 *  - Make sure that any structure larger than 4 bytes is padded to a
    115 *    multiple of 8 bytes.  Otherwise the structure size will be
    116 *    different between 32-bit and 64-bit architectures.
    117 */
    118
    119struct ib_uverbs_async_event_desc {
    120	__aligned_u64 element;
    121	__u32 event_type;	/* enum ib_event_type */
    122	__u32 reserved;
    123};
    124
    125struct ib_uverbs_comp_event_desc {
    126	__aligned_u64 cq_handle;
    127};
    128
    129struct ib_uverbs_cq_moderation_caps {
    130	__u16     max_cq_moderation_count;
    131	__u16     max_cq_moderation_period;
    132	__u32     reserved;
    133};
    134
    135/*
    136 * All commands from userspace should start with a __u32 command field
    137 * followed by __u16 in_words and out_words fields (which give the
    138 * length of the command block and response buffer if any in 32-bit
    139 * words).  The kernel driver will read these fields first and read
    140 * the rest of the command struct based on these value.
    141 */
    142
    143#define IB_USER_VERBS_CMD_COMMAND_MASK 0xff
    144#define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u
    145
    146struct ib_uverbs_cmd_hdr {
    147	__u32 command;
    148	__u16 in_words;
    149	__u16 out_words;
    150};
    151
    152struct ib_uverbs_ex_cmd_hdr {
    153	__aligned_u64 response;
    154	__u16 provider_in_words;
    155	__u16 provider_out_words;
    156	__u32 cmd_hdr_reserved;
    157};
    158
    159struct ib_uverbs_get_context {
    160	__aligned_u64 response;
    161	__aligned_u64 driver_data[0];
    162};
    163
    164struct ib_uverbs_get_context_resp {
    165	__u32 async_fd;
    166	__u32 num_comp_vectors;
    167	__aligned_u64 driver_data[0];
    168};
    169
    170struct ib_uverbs_query_device {
    171	__aligned_u64 response;
    172	__aligned_u64 driver_data[0];
    173};
    174
    175struct ib_uverbs_query_device_resp {
    176	__aligned_u64 fw_ver;
    177	__be64 node_guid;
    178	__be64 sys_image_guid;
    179	__aligned_u64 max_mr_size;
    180	__aligned_u64 page_size_cap;
    181	__u32 vendor_id;
    182	__u32 vendor_part_id;
    183	__u32 hw_ver;
    184	__u32 max_qp;
    185	__u32 max_qp_wr;
    186	__u32 device_cap_flags;
    187	__u32 max_sge;
    188	__u32 max_sge_rd;
    189	__u32 max_cq;
    190	__u32 max_cqe;
    191	__u32 max_mr;
    192	__u32 max_pd;
    193	__u32 max_qp_rd_atom;
    194	__u32 max_ee_rd_atom;
    195	__u32 max_res_rd_atom;
    196	__u32 max_qp_init_rd_atom;
    197	__u32 max_ee_init_rd_atom;
    198	__u32 atomic_cap;
    199	__u32 max_ee;
    200	__u32 max_rdd;
    201	__u32 max_mw;
    202	__u32 max_raw_ipv6_qp;
    203	__u32 max_raw_ethy_qp;
    204	__u32 max_mcast_grp;
    205	__u32 max_mcast_qp_attach;
    206	__u32 max_total_mcast_qp_attach;
    207	__u32 max_ah;
    208	__u32 max_fmr;
    209	__u32 max_map_per_fmr;
    210	__u32 max_srq;
    211	__u32 max_srq_wr;
    212	__u32 max_srq_sge;
    213	__u16 max_pkeys;
    214	__u8  local_ca_ack_delay;
    215	__u8  phys_port_cnt;
    216	__u8  reserved[4];
    217};
    218
    219struct ib_uverbs_ex_query_device {
    220	__u32 comp_mask;
    221	__u32 reserved;
    222};
    223
    224struct ib_uverbs_odp_caps {
    225	__aligned_u64 general_caps;
    226	struct {
    227		__u32 rc_odp_caps;
    228		__u32 uc_odp_caps;
    229		__u32 ud_odp_caps;
    230	} per_transport_caps;
    231	__u32 reserved;
    232};
    233
    234struct ib_uverbs_rss_caps {
    235	/* Corresponding bit will be set if qp type from
    236	 * 'enum ib_qp_type' is supported, e.g.
    237	 * supported_qpts |= 1 << IB_QPT_UD
    238	 */
    239	__u32 supported_qpts;
    240	__u32 max_rwq_indirection_tables;
    241	__u32 max_rwq_indirection_table_size;
    242	__u32 reserved;
    243};
    244
    245struct ib_uverbs_tm_caps {
    246	/* Max size of rendezvous request message */
    247	__u32 max_rndv_hdr_size;
    248	/* Max number of entries in tag matching list */
    249	__u32 max_num_tags;
    250	/* TM flags */
    251	__u32 flags;
    252	/* Max number of outstanding list operations */
    253	__u32 max_ops;
    254	/* Max number of SGE in tag matching entry */
    255	__u32 max_sge;
    256	__u32 reserved;
    257};
    258
    259struct ib_uverbs_ex_query_device_resp {
    260	struct ib_uverbs_query_device_resp base;
    261	__u32 comp_mask;
    262	__u32 response_length;
    263	struct ib_uverbs_odp_caps odp_caps;
    264	__aligned_u64 timestamp_mask;
    265	__aligned_u64 hca_core_clock; /* in KHZ */
    266	__aligned_u64 device_cap_flags_ex;
    267	struct ib_uverbs_rss_caps rss_caps;
    268	__u32  max_wq_type_rq;
    269	__u32 raw_packet_caps;
    270	struct ib_uverbs_tm_caps tm_caps;
    271	struct ib_uverbs_cq_moderation_caps cq_moderation_caps;
    272	__aligned_u64 max_dm_size;
    273	__u32 xrc_odp_caps;
    274	__u32 reserved;
    275};
    276
    277struct ib_uverbs_query_port {
    278	__aligned_u64 response;
    279	__u8  port_num;
    280	__u8  reserved[7];
    281	__aligned_u64 driver_data[0];
    282};
    283
    284struct ib_uverbs_query_port_resp {
    285	__u32 port_cap_flags;		/* see ib_uverbs_query_port_cap_flags */
    286	__u32 max_msg_sz;
    287	__u32 bad_pkey_cntr;
    288	__u32 qkey_viol_cntr;
    289	__u32 gid_tbl_len;
    290	__u16 pkey_tbl_len;
    291	__u16 lid;
    292	__u16 sm_lid;
    293	__u8  state;
    294	__u8  max_mtu;
    295	__u8  active_mtu;
    296	__u8  lmc;
    297	__u8  max_vl_num;
    298	__u8  sm_sl;
    299	__u8  subnet_timeout;
    300	__u8  init_type_reply;
    301	__u8  active_width;
    302	__u8  active_speed;
    303	__u8  phys_state;
    304	__u8  link_layer;
    305	__u8  flags;			/* see ib_uverbs_query_port_flags */
    306	__u8  reserved;
    307};
    308
    309struct ib_uverbs_alloc_pd {
    310	__aligned_u64 response;
    311	__aligned_u64 driver_data[0];
    312};
    313
    314struct ib_uverbs_alloc_pd_resp {
    315	__u32 pd_handle;
    316	__u32 driver_data[0];
    317};
    318
    319struct ib_uverbs_dealloc_pd {
    320	__u32 pd_handle;
    321};
    322
    323struct ib_uverbs_open_xrcd {
    324	__aligned_u64 response;
    325	__u32 fd;
    326	__u32 oflags;
    327	__aligned_u64 driver_data[0];
    328};
    329
    330struct ib_uverbs_open_xrcd_resp {
    331	__u32 xrcd_handle;
    332	__u32 driver_data[0];
    333};
    334
    335struct ib_uverbs_close_xrcd {
    336	__u32 xrcd_handle;
    337};
    338
    339struct ib_uverbs_reg_mr {
    340	__aligned_u64 response;
    341	__aligned_u64 start;
    342	__aligned_u64 length;
    343	__aligned_u64 hca_va;
    344	__u32 pd_handle;
    345	__u32 access_flags;
    346	__aligned_u64 driver_data[0];
    347};
    348
    349struct ib_uverbs_reg_mr_resp {
    350	__u32 mr_handle;
    351	__u32 lkey;
    352	__u32 rkey;
    353	__u32 driver_data[0];
    354};
    355
    356struct ib_uverbs_rereg_mr {
    357	__aligned_u64 response;
    358	__u32 mr_handle;
    359	__u32 flags;
    360	__aligned_u64 start;
    361	__aligned_u64 length;
    362	__aligned_u64 hca_va;
    363	__u32 pd_handle;
    364	__u32 access_flags;
    365	__aligned_u64 driver_data[0];
    366};
    367
    368struct ib_uverbs_rereg_mr_resp {
    369	__u32 lkey;
    370	__u32 rkey;
    371	__aligned_u64 driver_data[0];
    372};
    373
    374struct ib_uverbs_dereg_mr {
    375	__u32 mr_handle;
    376};
    377
    378struct ib_uverbs_alloc_mw {
    379	__aligned_u64 response;
    380	__u32 pd_handle;
    381	__u8  mw_type;
    382	__u8  reserved[3];
    383	__aligned_u64 driver_data[0];
    384};
    385
    386struct ib_uverbs_alloc_mw_resp {
    387	__u32 mw_handle;
    388	__u32 rkey;
    389	__aligned_u64 driver_data[0];
    390};
    391
    392struct ib_uverbs_dealloc_mw {
    393	__u32 mw_handle;
    394};
    395
    396struct ib_uverbs_create_comp_channel {
    397	__aligned_u64 response;
    398};
    399
    400struct ib_uverbs_create_comp_channel_resp {
    401	__u32 fd;
    402};
    403
    404struct ib_uverbs_create_cq {
    405	__aligned_u64 response;
    406	__aligned_u64 user_handle;
    407	__u32 cqe;
    408	__u32 comp_vector;
    409	__s32 comp_channel;
    410	__u32 reserved;
    411	__aligned_u64 driver_data[0];
    412};
    413
    414enum ib_uverbs_ex_create_cq_flags {
    415	IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
    416	IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
    417};
    418
    419struct ib_uverbs_ex_create_cq {
    420	__aligned_u64 user_handle;
    421	__u32 cqe;
    422	__u32 comp_vector;
    423	__s32 comp_channel;
    424	__u32 comp_mask;
    425	__u32 flags;  /* bitmask of ib_uverbs_ex_create_cq_flags */
    426	__u32 reserved;
    427};
    428
    429struct ib_uverbs_create_cq_resp {
    430	__u32 cq_handle;
    431	__u32 cqe;
    432	__aligned_u64 driver_data[0];
    433};
    434
    435struct ib_uverbs_ex_create_cq_resp {
    436	struct ib_uverbs_create_cq_resp base;
    437	__u32 comp_mask;
    438	__u32 response_length;
    439};
    440
    441struct ib_uverbs_resize_cq {
    442	__aligned_u64 response;
    443	__u32 cq_handle;
    444	__u32 cqe;
    445	__aligned_u64 driver_data[0];
    446};
    447
    448struct ib_uverbs_resize_cq_resp {
    449	__u32 cqe;
    450	__u32 reserved;
    451	__aligned_u64 driver_data[0];
    452};
    453
    454struct ib_uverbs_poll_cq {
    455	__aligned_u64 response;
    456	__u32 cq_handle;
    457	__u32 ne;
    458};
    459
    460enum ib_uverbs_wc_opcode {
    461	IB_UVERBS_WC_SEND = 0,
    462	IB_UVERBS_WC_RDMA_WRITE = 1,
    463	IB_UVERBS_WC_RDMA_READ = 2,
    464	IB_UVERBS_WC_COMP_SWAP = 3,
    465	IB_UVERBS_WC_FETCH_ADD = 4,
    466	IB_UVERBS_WC_BIND_MW = 5,
    467	IB_UVERBS_WC_LOCAL_INV = 6,
    468	IB_UVERBS_WC_TSO = 7,
    469};
    470
    471struct ib_uverbs_wc {
    472	__aligned_u64 wr_id;
    473	__u32 status;
    474	__u32 opcode;
    475	__u32 vendor_err;
    476	__u32 byte_len;
    477	union {
    478		__be32 imm_data;
    479		__u32 invalidate_rkey;
    480	} ex;
    481	__u32 qp_num;
    482	__u32 src_qp;
    483	__u32 wc_flags;
    484	__u16 pkey_index;
    485	__u16 slid;
    486	__u8 sl;
    487	__u8 dlid_path_bits;
    488	__u8 port_num;
    489	__u8 reserved;
    490};
    491
    492struct ib_uverbs_poll_cq_resp {
    493	__u32 count;
    494	__u32 reserved;
    495	struct ib_uverbs_wc wc[0];
    496};
    497
    498struct ib_uverbs_req_notify_cq {
    499	__u32 cq_handle;
    500	__u32 solicited_only;
    501};
    502
    503struct ib_uverbs_destroy_cq {
    504	__aligned_u64 response;
    505	__u32 cq_handle;
    506	__u32 reserved;
    507};
    508
    509struct ib_uverbs_destroy_cq_resp {
    510	__u32 comp_events_reported;
    511	__u32 async_events_reported;
    512};
    513
    514struct ib_uverbs_global_route {
    515	__u8  dgid[16];
    516	__u32 flow_label;
    517	__u8  sgid_index;
    518	__u8  hop_limit;
    519	__u8  traffic_class;
    520	__u8  reserved;
    521};
    522
    523struct ib_uverbs_ah_attr {
    524	struct ib_uverbs_global_route grh;
    525	__u16 dlid;
    526	__u8  sl;
    527	__u8  src_path_bits;
    528	__u8  static_rate;
    529	__u8  is_global;
    530	__u8  port_num;
    531	__u8  reserved;
    532};
    533
    534struct ib_uverbs_qp_attr {
    535	__u32	qp_attr_mask;
    536	__u32	qp_state;
    537	__u32	cur_qp_state;
    538	__u32	path_mtu;
    539	__u32	path_mig_state;
    540	__u32	qkey;
    541	__u32	rq_psn;
    542	__u32	sq_psn;
    543	__u32	dest_qp_num;
    544	__u32	qp_access_flags;
    545
    546	struct ib_uverbs_ah_attr ah_attr;
    547	struct ib_uverbs_ah_attr alt_ah_attr;
    548
    549	/* ib_qp_cap */
    550	__u32	max_send_wr;
    551	__u32	max_recv_wr;
    552	__u32	max_send_sge;
    553	__u32	max_recv_sge;
    554	__u32	max_inline_data;
    555
    556	__u16	pkey_index;
    557	__u16	alt_pkey_index;
    558	__u8	en_sqd_async_notify;
    559	__u8	sq_draining;
    560	__u8	max_rd_atomic;
    561	__u8	max_dest_rd_atomic;
    562	__u8	min_rnr_timer;
    563	__u8	port_num;
    564	__u8	timeout;
    565	__u8	retry_cnt;
    566	__u8	rnr_retry;
    567	__u8	alt_port_num;
    568	__u8	alt_timeout;
    569	__u8	reserved[5];
    570};
    571
    572struct ib_uverbs_create_qp {
    573	__aligned_u64 response;
    574	__aligned_u64 user_handle;
    575	__u32 pd_handle;
    576	__u32 send_cq_handle;
    577	__u32 recv_cq_handle;
    578	__u32 srq_handle;
    579	__u32 max_send_wr;
    580	__u32 max_recv_wr;
    581	__u32 max_send_sge;
    582	__u32 max_recv_sge;
    583	__u32 max_inline_data;
    584	__u8  sq_sig_all;
    585	__u8  qp_type;
    586	__u8  is_srq;
    587	__u8  reserved;
    588	__aligned_u64 driver_data[0];
    589};
    590
    591enum ib_uverbs_create_qp_mask {
    592	IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,
    593};
    594
    595enum {
    596	IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
    597};
    598
    599struct ib_uverbs_ex_create_qp {
    600	__aligned_u64 user_handle;
    601	__u32 pd_handle;
    602	__u32 send_cq_handle;
    603	__u32 recv_cq_handle;
    604	__u32 srq_handle;
    605	__u32 max_send_wr;
    606	__u32 max_recv_wr;
    607	__u32 max_send_sge;
    608	__u32 max_recv_sge;
    609	__u32 max_inline_data;
    610	__u8  sq_sig_all;
    611	__u8  qp_type;
    612	__u8  is_srq;
    613	__u8 reserved;
    614	__u32 comp_mask;
    615	__u32 create_flags;
    616	__u32 rwq_ind_tbl_handle;
    617	__u32  source_qpn;
    618};
    619
    620struct ib_uverbs_open_qp {
    621	__aligned_u64 response;
    622	__aligned_u64 user_handle;
    623	__u32 pd_handle;
    624	__u32 qpn;
    625	__u8  qp_type;
    626	__u8  reserved[7];
    627	__aligned_u64 driver_data[0];
    628};
    629
    630/* also used for open response */
    631struct ib_uverbs_create_qp_resp {
    632	__u32 qp_handle;
    633	__u32 qpn;
    634	__u32 max_send_wr;
    635	__u32 max_recv_wr;
    636	__u32 max_send_sge;
    637	__u32 max_recv_sge;
    638	__u32 max_inline_data;
    639	__u32 reserved;
    640	__u32 driver_data[0];
    641};
    642
    643struct ib_uverbs_ex_create_qp_resp {
    644	struct ib_uverbs_create_qp_resp base;
    645	__u32 comp_mask;
    646	__u32 response_length;
    647};
    648
    649/*
    650 * This struct needs to remain a multiple of 8 bytes to keep the
    651 * alignment of the modify QP parameters.
    652 */
    653struct ib_uverbs_qp_dest {
    654	__u8  dgid[16];
    655	__u32 flow_label;
    656	__u16 dlid;
    657	__u16 reserved;
    658	__u8  sgid_index;
    659	__u8  hop_limit;
    660	__u8  traffic_class;
    661	__u8  sl;
    662	__u8  src_path_bits;
    663	__u8  static_rate;
    664	__u8  is_global;
    665	__u8  port_num;
    666};
    667
    668struct ib_uverbs_query_qp {
    669	__aligned_u64 response;
    670	__u32 qp_handle;
    671	__u32 attr_mask;
    672	__aligned_u64 driver_data[0];
    673};
    674
    675struct ib_uverbs_query_qp_resp {
    676	struct ib_uverbs_qp_dest dest;
    677	struct ib_uverbs_qp_dest alt_dest;
    678	__u32 max_send_wr;
    679	__u32 max_recv_wr;
    680	__u32 max_send_sge;
    681	__u32 max_recv_sge;
    682	__u32 max_inline_data;
    683	__u32 qkey;
    684	__u32 rq_psn;
    685	__u32 sq_psn;
    686	__u32 dest_qp_num;
    687	__u32 qp_access_flags;
    688	__u16 pkey_index;
    689	__u16 alt_pkey_index;
    690	__u8  qp_state;
    691	__u8  cur_qp_state;
    692	__u8  path_mtu;
    693	__u8  path_mig_state;
    694	__u8  sq_draining;
    695	__u8  max_rd_atomic;
    696	__u8  max_dest_rd_atomic;
    697	__u8  min_rnr_timer;
    698	__u8  port_num;
    699	__u8  timeout;
    700	__u8  retry_cnt;
    701	__u8  rnr_retry;
    702	__u8  alt_port_num;
    703	__u8  alt_timeout;
    704	__u8  sq_sig_all;
    705	__u8  reserved[5];
    706	__aligned_u64 driver_data[0];
    707};
    708
    709struct ib_uverbs_modify_qp {
    710	struct ib_uverbs_qp_dest dest;
    711	struct ib_uverbs_qp_dest alt_dest;
    712	__u32 qp_handle;
    713	__u32 attr_mask;
    714	__u32 qkey;
    715	__u32 rq_psn;
    716	__u32 sq_psn;
    717	__u32 dest_qp_num;
    718	__u32 qp_access_flags;
    719	__u16 pkey_index;
    720	__u16 alt_pkey_index;
    721	__u8  qp_state;
    722	__u8  cur_qp_state;
    723	__u8  path_mtu;
    724	__u8  path_mig_state;
    725	__u8  en_sqd_async_notify;
    726	__u8  max_rd_atomic;
    727	__u8  max_dest_rd_atomic;
    728	__u8  min_rnr_timer;
    729	__u8  port_num;
    730	__u8  timeout;
    731	__u8  retry_cnt;
    732	__u8  rnr_retry;
    733	__u8  alt_port_num;
    734	__u8  alt_timeout;
    735	__u8  reserved[2];
    736	__aligned_u64 driver_data[0];
    737};
    738
    739struct ib_uverbs_ex_modify_qp {
    740	struct ib_uverbs_modify_qp base;
    741	__u32	rate_limit;
    742	__u32	reserved;
    743};
    744
    745struct ib_uverbs_ex_modify_qp_resp {
    746	__u32  comp_mask;
    747	__u32  response_length;
    748};
    749
    750struct ib_uverbs_destroy_qp {
    751	__aligned_u64 response;
    752	__u32 qp_handle;
    753	__u32 reserved;
    754};
    755
    756struct ib_uverbs_destroy_qp_resp {
    757	__u32 events_reported;
    758};
    759
    760/*
    761 * The ib_uverbs_sge structure isn't used anywhere, since we assume
    762 * the ib_sge structure is packed the same way on 32-bit and 64-bit
    763 * architectures in both kernel and user space.  It's just here to
    764 * document the ABI.
    765 */
    766struct ib_uverbs_sge {
    767	__aligned_u64 addr;
    768	__u32 length;
    769	__u32 lkey;
    770};
    771
    772enum ib_uverbs_wr_opcode {
    773	IB_UVERBS_WR_RDMA_WRITE = 0,
    774	IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1,
    775	IB_UVERBS_WR_SEND = 2,
    776	IB_UVERBS_WR_SEND_WITH_IMM = 3,
    777	IB_UVERBS_WR_RDMA_READ = 4,
    778	IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5,
    779	IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6,
    780	IB_UVERBS_WR_LOCAL_INV = 7,
    781	IB_UVERBS_WR_BIND_MW = 8,
    782	IB_UVERBS_WR_SEND_WITH_INV = 9,
    783	IB_UVERBS_WR_TSO = 10,
    784	IB_UVERBS_WR_RDMA_READ_WITH_INV = 11,
    785	IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12,
    786	IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13,
    787	/* Review enum ib_wr_opcode before modifying this */
    788};
    789
    790struct ib_uverbs_send_wr {
    791	__aligned_u64 wr_id;
    792	__u32 num_sge;
    793	__u32 opcode;		/* see enum ib_uverbs_wr_opcode */
    794	__u32 send_flags;
    795	union {
    796		__be32 imm_data;
    797		__u32 invalidate_rkey;
    798	} ex;
    799	union {
    800		struct {
    801			__aligned_u64 remote_addr;
    802			__u32 rkey;
    803			__u32 reserved;
    804		} rdma;
    805		struct {
    806			__aligned_u64 remote_addr;
    807			__aligned_u64 compare_add;
    808			__aligned_u64 swap;
    809			__u32 rkey;
    810			__u32 reserved;
    811		} atomic;
    812		struct {
    813			__u32 ah;
    814			__u32 remote_qpn;
    815			__u32 remote_qkey;
    816			__u32 reserved;
    817		} ud;
    818	} wr;
    819};
    820
    821struct ib_uverbs_post_send {
    822	__aligned_u64 response;
    823	__u32 qp_handle;
    824	__u32 wr_count;
    825	__u32 sge_count;
    826	__u32 wqe_size;
    827	struct ib_uverbs_send_wr send_wr[0];
    828};
    829
    830struct ib_uverbs_post_send_resp {
    831	__u32 bad_wr;
    832};
    833
    834struct ib_uverbs_recv_wr {
    835	__aligned_u64 wr_id;
    836	__u32 num_sge;
    837	__u32 reserved;
    838};
    839
    840struct ib_uverbs_post_recv {
    841	__aligned_u64 response;
    842	__u32 qp_handle;
    843	__u32 wr_count;
    844	__u32 sge_count;
    845	__u32 wqe_size;
    846	struct ib_uverbs_recv_wr recv_wr[0];
    847};
    848
    849struct ib_uverbs_post_recv_resp {
    850	__u32 bad_wr;
    851};
    852
    853struct ib_uverbs_post_srq_recv {
    854	__aligned_u64 response;
    855	__u32 srq_handle;
    856	__u32 wr_count;
    857	__u32 sge_count;
    858	__u32 wqe_size;
    859	struct ib_uverbs_recv_wr recv[0];
    860};
    861
    862struct ib_uverbs_post_srq_recv_resp {
    863	__u32 bad_wr;
    864};
    865
    866struct ib_uverbs_create_ah {
    867	__aligned_u64 response;
    868	__aligned_u64 user_handle;
    869	__u32 pd_handle;
    870	__u32 reserved;
    871	struct ib_uverbs_ah_attr attr;
    872	__aligned_u64 driver_data[0];
    873};
    874
    875struct ib_uverbs_create_ah_resp {
    876	__u32 ah_handle;
    877	__u32 driver_data[0];
    878};
    879
    880struct ib_uverbs_destroy_ah {
    881	__u32 ah_handle;
    882};
    883
    884struct ib_uverbs_attach_mcast {
    885	__u8  gid[16];
    886	__u32 qp_handle;
    887	__u16 mlid;
    888	__u16 reserved;
    889	__aligned_u64 driver_data[0];
    890};
    891
    892struct ib_uverbs_detach_mcast {
    893	__u8  gid[16];
    894	__u32 qp_handle;
    895	__u16 mlid;
    896	__u16 reserved;
    897	__aligned_u64 driver_data[0];
    898};
    899
    900struct ib_uverbs_flow_spec_hdr {
    901	__u32 type;
    902	__u16 size;
    903	__u16 reserved;
    904	/* followed by flow_spec */
    905	__aligned_u64 flow_spec_data[0];
    906};
    907
    908struct ib_uverbs_flow_eth_filter {
    909	__u8  dst_mac[6];
    910	__u8  src_mac[6];
    911	__be16 ether_type;
    912	__be16 vlan_tag;
    913};
    914
    915struct ib_uverbs_flow_spec_eth {
    916	union {
    917		struct ib_uverbs_flow_spec_hdr hdr;
    918		struct {
    919			__u32 type;
    920			__u16 size;
    921			__u16 reserved;
    922		};
    923	};
    924	struct ib_uverbs_flow_eth_filter val;
    925	struct ib_uverbs_flow_eth_filter mask;
    926};
    927
    928struct ib_uverbs_flow_ipv4_filter {
    929	__be32 src_ip;
    930	__be32 dst_ip;
    931	__u8	proto;
    932	__u8	tos;
    933	__u8	ttl;
    934	__u8	flags;
    935};
    936
    937struct ib_uverbs_flow_spec_ipv4 {
    938	union {
    939		struct ib_uverbs_flow_spec_hdr hdr;
    940		struct {
    941			__u32 type;
    942			__u16 size;
    943			__u16 reserved;
    944		};
    945	};
    946	struct ib_uverbs_flow_ipv4_filter val;
    947	struct ib_uverbs_flow_ipv4_filter mask;
    948};
    949
    950struct ib_uverbs_flow_tcp_udp_filter {
    951	__be16 dst_port;
    952	__be16 src_port;
    953};
    954
    955struct ib_uverbs_flow_spec_tcp_udp {
    956	union {
    957		struct ib_uverbs_flow_spec_hdr hdr;
    958		struct {
    959			__u32 type;
    960			__u16 size;
    961			__u16 reserved;
    962		};
    963	};
    964	struct ib_uverbs_flow_tcp_udp_filter val;
    965	struct ib_uverbs_flow_tcp_udp_filter mask;
    966};
    967
    968struct ib_uverbs_flow_ipv6_filter {
    969	__u8    src_ip[16];
    970	__u8    dst_ip[16];
    971	__be32	flow_label;
    972	__u8	next_hdr;
    973	__u8	traffic_class;
    974	__u8	hop_limit;
    975	__u8	reserved;
    976};
    977
    978struct ib_uverbs_flow_spec_ipv6 {
    979	union {
    980		struct ib_uverbs_flow_spec_hdr hdr;
    981		struct {
    982			__u32 type;
    983			__u16 size;
    984			__u16 reserved;
    985		};
    986	};
    987	struct ib_uverbs_flow_ipv6_filter val;
    988	struct ib_uverbs_flow_ipv6_filter mask;
    989};
    990
    991struct ib_uverbs_flow_spec_action_tag {
    992	union {
    993		struct ib_uverbs_flow_spec_hdr hdr;
    994		struct {
    995			__u32 type;
    996			__u16 size;
    997			__u16 reserved;
    998		};
    999	};
   1000	__u32			      tag_id;
   1001	__u32			      reserved1;
   1002};
   1003
   1004struct ib_uverbs_flow_spec_action_drop {
   1005	union {
   1006		struct ib_uverbs_flow_spec_hdr hdr;
   1007		struct {
   1008			__u32 type;
   1009			__u16 size;
   1010			__u16 reserved;
   1011		};
   1012	};
   1013};
   1014
   1015struct ib_uverbs_flow_spec_action_handle {
   1016	union {
   1017		struct ib_uverbs_flow_spec_hdr hdr;
   1018		struct {
   1019			__u32 type;
   1020			__u16 size;
   1021			__u16 reserved;
   1022		};
   1023	};
   1024	__u32			      handle;
   1025	__u32			      reserved1;
   1026};
   1027
   1028struct ib_uverbs_flow_spec_action_count {
   1029	union {
   1030		struct ib_uverbs_flow_spec_hdr hdr;
   1031		struct {
   1032			__u32 type;
   1033			__u16 size;
   1034			__u16 reserved;
   1035		};
   1036	};
   1037	__u32			      handle;
   1038	__u32			      reserved1;
   1039};
   1040
   1041struct ib_uverbs_flow_tunnel_filter {
   1042	__be32 tunnel_id;
   1043};
   1044
   1045struct ib_uverbs_flow_spec_tunnel {
   1046	union {
   1047		struct ib_uverbs_flow_spec_hdr hdr;
   1048		struct {
   1049			__u32 type;
   1050			__u16 size;
   1051			__u16 reserved;
   1052		};
   1053	};
   1054	struct ib_uverbs_flow_tunnel_filter val;
   1055	struct ib_uverbs_flow_tunnel_filter mask;
   1056};
   1057
   1058struct ib_uverbs_flow_spec_esp_filter {
   1059	__u32 spi;
   1060	__u32 seq;
   1061};
   1062
   1063struct ib_uverbs_flow_spec_esp {
   1064	union {
   1065		struct ib_uverbs_flow_spec_hdr hdr;
   1066		struct {
   1067			__u32 type;
   1068			__u16 size;
   1069			__u16 reserved;
   1070		};
   1071	};
   1072	struct ib_uverbs_flow_spec_esp_filter val;
   1073	struct ib_uverbs_flow_spec_esp_filter mask;
   1074};
   1075
   1076struct ib_uverbs_flow_gre_filter {
   1077	/* c_ks_res0_ver field is bits 0-15 in offset 0 of a standard GRE header:
   1078	 * bit 0 - C - checksum bit.
   1079	 * bit 1 - reserved. set to 0.
   1080	 * bit 2 - key bit.
   1081	 * bit 3 - sequence number bit.
   1082	 * bits 4:12 - reserved. set to 0.
   1083	 * bits 13:15 - GRE version.
   1084	 */
   1085	__be16 c_ks_res0_ver;
   1086	__be16 protocol;
   1087	__be32 key;
   1088};
   1089
   1090struct ib_uverbs_flow_spec_gre {
   1091	union {
   1092		struct ib_uverbs_flow_spec_hdr hdr;
   1093		struct {
   1094			__u32 type;
   1095			__u16 size;
   1096			__u16 reserved;
   1097		};
   1098	};
   1099	struct ib_uverbs_flow_gre_filter     val;
   1100	struct ib_uverbs_flow_gre_filter     mask;
   1101};
   1102
   1103struct ib_uverbs_flow_mpls_filter {
   1104	/* The field includes the entire MPLS label:
   1105	 * bits 0:19 - label field.
   1106	 * bits 20:22 - traffic class field.
   1107	 * bits 23 - bottom of stack bit.
   1108	 * bits 24:31 - ttl field.
   1109	 */
   1110	__be32 label;
   1111};
   1112
   1113struct ib_uverbs_flow_spec_mpls {
   1114	union {
   1115		struct ib_uverbs_flow_spec_hdr hdr;
   1116		struct {
   1117			__u32 type;
   1118			__u16 size;
   1119			__u16 reserved;
   1120		};
   1121	};
   1122	struct ib_uverbs_flow_mpls_filter     val;
   1123	struct ib_uverbs_flow_mpls_filter     mask;
   1124};
   1125
   1126struct ib_uverbs_flow_attr {
   1127	__u32 type;
   1128	__u16 size;
   1129	__u16 priority;
   1130	__u8  num_of_specs;
   1131	__u8  reserved[2];
   1132	__u8  port;
   1133	__u32 flags;
   1134	/* Following are the optional layers according to user request
   1135	 * struct ib_flow_spec_xxx
   1136	 * struct ib_flow_spec_yyy
   1137	 */
   1138	struct ib_uverbs_flow_spec_hdr flow_specs[0];
   1139};
   1140
   1141struct ib_uverbs_create_flow  {
   1142	__u32 comp_mask;
   1143	__u32 qp_handle;
   1144	struct ib_uverbs_flow_attr flow_attr;
   1145};
   1146
   1147struct ib_uverbs_create_flow_resp {
   1148	__u32 comp_mask;
   1149	__u32 flow_handle;
   1150};
   1151
   1152struct ib_uverbs_destroy_flow  {
   1153	__u32 comp_mask;
   1154	__u32 flow_handle;
   1155};
   1156
   1157struct ib_uverbs_create_srq {
   1158	__aligned_u64 response;
   1159	__aligned_u64 user_handle;
   1160	__u32 pd_handle;
   1161	__u32 max_wr;
   1162	__u32 max_sge;
   1163	__u32 srq_limit;
   1164	__aligned_u64 driver_data[0];
   1165};
   1166
   1167struct ib_uverbs_create_xsrq {
   1168	__aligned_u64 response;
   1169	__aligned_u64 user_handle;
   1170	__u32 srq_type;
   1171	__u32 pd_handle;
   1172	__u32 max_wr;
   1173	__u32 max_sge;
   1174	__u32 srq_limit;
   1175	__u32 max_num_tags;
   1176	__u32 xrcd_handle;
   1177	__u32 cq_handle;
   1178	__aligned_u64 driver_data[0];
   1179};
   1180
   1181struct ib_uverbs_create_srq_resp {
   1182	__u32 srq_handle;
   1183	__u32 max_wr;
   1184	__u32 max_sge;
   1185	__u32 srqn;
   1186	__u32 driver_data[0];
   1187};
   1188
   1189struct ib_uverbs_modify_srq {
   1190	__u32 srq_handle;
   1191	__u32 attr_mask;
   1192	__u32 max_wr;
   1193	__u32 srq_limit;
   1194	__aligned_u64 driver_data[0];
   1195};
   1196
   1197struct ib_uverbs_query_srq {
   1198	__aligned_u64 response;
   1199	__u32 srq_handle;
   1200	__u32 reserved;
   1201	__aligned_u64 driver_data[0];
   1202};
   1203
   1204struct ib_uverbs_query_srq_resp {
   1205	__u32 max_wr;
   1206	__u32 max_sge;
   1207	__u32 srq_limit;
   1208	__u32 reserved;
   1209};
   1210
   1211struct ib_uverbs_destroy_srq {
   1212	__aligned_u64 response;
   1213	__u32 srq_handle;
   1214	__u32 reserved;
   1215};
   1216
   1217struct ib_uverbs_destroy_srq_resp {
   1218	__u32 events_reported;
   1219};
   1220
   1221struct ib_uverbs_ex_create_wq  {
   1222	__u32 comp_mask;
   1223	__u32 wq_type;
   1224	__aligned_u64 user_handle;
   1225	__u32 pd_handle;
   1226	__u32 cq_handle;
   1227	__u32 max_wr;
   1228	__u32 max_sge;
   1229	__u32 create_flags; /* Use enum ib_wq_flags */
   1230	__u32 reserved;
   1231};
   1232
   1233struct ib_uverbs_ex_create_wq_resp {
   1234	__u32 comp_mask;
   1235	__u32 response_length;
   1236	__u32 wq_handle;
   1237	__u32 max_wr;
   1238	__u32 max_sge;
   1239	__u32 wqn;
   1240};
   1241
   1242struct ib_uverbs_ex_destroy_wq  {
   1243	__u32 comp_mask;
   1244	__u32 wq_handle;
   1245};
   1246
   1247struct ib_uverbs_ex_destroy_wq_resp {
   1248	__u32 comp_mask;
   1249	__u32 response_length;
   1250	__u32 events_reported;
   1251	__u32 reserved;
   1252};
   1253
   1254struct ib_uverbs_ex_modify_wq  {
   1255	__u32 attr_mask;
   1256	__u32 wq_handle;
   1257	__u32 wq_state;
   1258	__u32 curr_wq_state;
   1259	__u32 flags; /* Use enum ib_wq_flags */
   1260	__u32 flags_mask; /* Use enum ib_wq_flags */
   1261};
   1262
   1263/* Prevent memory allocation rather than max expected size */
   1264#define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d
   1265struct ib_uverbs_ex_create_rwq_ind_table  {
   1266	__u32 comp_mask;
   1267	__u32 log_ind_tbl_size;
   1268	/* Following are the wq handles according to log_ind_tbl_size
   1269	 * wq_handle1
   1270	 * wq_handle2
   1271	 */
   1272	__u32 wq_handles[0];
   1273};
   1274
   1275struct ib_uverbs_ex_create_rwq_ind_table_resp {
   1276	__u32 comp_mask;
   1277	__u32 response_length;
   1278	__u32 ind_tbl_handle;
   1279	__u32 ind_tbl_num;
   1280};
   1281
   1282struct ib_uverbs_ex_destroy_rwq_ind_table  {
   1283	__u32 comp_mask;
   1284	__u32 ind_tbl_handle;
   1285};
   1286
   1287struct ib_uverbs_cq_moderation {
   1288	__u16 cq_count;
   1289	__u16 cq_period;
   1290};
   1291
   1292struct ib_uverbs_ex_modify_cq {
   1293	__u32 cq_handle;
   1294	__u32 attr_mask;
   1295	struct ib_uverbs_cq_moderation attr;
   1296	__u32 reserved;
   1297};
   1298
   1299#define IB_DEVICE_NAME_MAX 64
   1300
   1301/*
   1302 * bits 9, 15, 16, 19, 22, 27, 30, 31, 32, 33, 35 and 37 may be set by old
   1303 * kernels and should not be used.
   1304 */
   1305enum ib_uverbs_device_cap_flags {
   1306	IB_UVERBS_DEVICE_RESIZE_MAX_WR = 1 << 0,
   1307	IB_UVERBS_DEVICE_BAD_PKEY_CNTR = 1 << 1,
   1308	IB_UVERBS_DEVICE_BAD_QKEY_CNTR = 1 << 2,
   1309	IB_UVERBS_DEVICE_RAW_MULTI = 1 << 3,
   1310	IB_UVERBS_DEVICE_AUTO_PATH_MIG = 1 << 4,
   1311	IB_UVERBS_DEVICE_CHANGE_PHY_PORT = 1 << 5,
   1312	IB_UVERBS_DEVICE_UD_AV_PORT_ENFORCE = 1 << 6,
   1313	IB_UVERBS_DEVICE_CURR_QP_STATE_MOD = 1 << 7,
   1314	IB_UVERBS_DEVICE_SHUTDOWN_PORT = 1 << 8,
   1315	/* IB_UVERBS_DEVICE_INIT_TYPE = 1 << 9, (not in use) */
   1316	IB_UVERBS_DEVICE_PORT_ACTIVE_EVENT = 1 << 10,
   1317	IB_UVERBS_DEVICE_SYS_IMAGE_GUID = 1 << 11,
   1318	IB_UVERBS_DEVICE_RC_RNR_NAK_GEN = 1 << 12,
   1319	IB_UVERBS_DEVICE_SRQ_RESIZE = 1 << 13,
   1320	IB_UVERBS_DEVICE_N_NOTIFY_CQ = 1 << 14,
   1321	IB_UVERBS_DEVICE_MEM_WINDOW = 1 << 17,
   1322	IB_UVERBS_DEVICE_UD_IP_CSUM = 1 << 18,
   1323	IB_UVERBS_DEVICE_XRC = 1 << 20,
   1324	IB_UVERBS_DEVICE_MEM_MGT_EXTENSIONS = 1 << 21,
   1325	IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2A = 1 << 23,
   1326	IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2B = 1 << 24,
   1327	IB_UVERBS_DEVICE_RC_IP_CSUM = 1 << 25,
   1328	/* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_IP_CSUM. */
   1329	IB_UVERBS_DEVICE_RAW_IP_CSUM = 1 << 26,
   1330	IB_UVERBS_DEVICE_MANAGED_FLOW_STEERING = 1 << 29,
   1331	/* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS. */
   1332	IB_UVERBS_DEVICE_RAW_SCATTER_FCS = 1ULL << 34,
   1333	IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING = 1ULL << 36,
   1334};
   1335
   1336enum ib_uverbs_raw_packet_caps {
   1337	IB_UVERBS_RAW_PACKET_CAP_CVLAN_STRIPPING = 1 << 0,
   1338	IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS = 1 << 1,
   1339	IB_UVERBS_RAW_PACKET_CAP_IP_CSUM = 1 << 2,
   1340	IB_UVERBS_RAW_PACKET_CAP_DELAY_DROP = 1 << 3,
   1341};
   1342
   1343#endif /* IB_USER_VERBS_H */