cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

irdma-abi.h (2192B)

      1/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB */
      2/*
      3 * Copyright (c) 2006 - 2021 Intel Corporation.  All rights reserved.
      4 * Copyright (c) 2005 Topspin Communications.  All rights reserved.
      5 * Copyright (c) 2005 Cisco Systems.  All rights reserved.
      6 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
      7 */
      8
      9#ifndef IRDMA_ABI_H
     10#define IRDMA_ABI_H
     11
     12#include <linux/types.h>
     13
     14/* irdma must support legacy GEN_1 i40iw kernel
     15 * and user-space whose last ABI ver is 5
     16 */
     17#define IRDMA_ABI_VER 5
     18
     19enum irdma_memreg_type {
     20	IRDMA_MEMREG_TYPE_MEM  = 0,
     21	IRDMA_MEMREG_TYPE_QP   = 1,
     22	IRDMA_MEMREG_TYPE_CQ   = 2,
     23};
     24
     25struct irdma_alloc_ucontext_req {
     26	__u32 rsvd32;
     27	__u8 userspace_ver;
     28	__u8 rsvd8[3];
     29};
     30
     31struct irdma_alloc_ucontext_resp {
     32	__u32 max_pds;
     33	__u32 max_qps;
     34	__u32 wq_size; /* size of the WQs (SQ+RQ) in the mmaped area */
     35	__u8 kernel_ver;
     36	__u8 rsvd[3];
     37	__aligned_u64 feature_flags;
     38	__aligned_u64 db_mmap_key;
     39	__u32 max_hw_wq_frags;
     40	__u32 max_hw_read_sges;
     41	__u32 max_hw_inline;
     42	__u32 max_hw_rq_quanta;
     43	__u32 max_hw_wq_quanta;
     44	__u32 min_hw_cq_size;
     45	__u32 max_hw_cq_size;
     46	__u16 max_hw_sq_chunk;
     47	__u8 hw_rev;
     48	__u8 rsvd2;
     49};
     50
     51struct irdma_alloc_pd_resp {
     52	__u32 pd_id;
     53	__u8 rsvd[4];
     54};
     55
     56struct irdma_resize_cq_req {
     57	__aligned_u64 user_cq_buffer;
     58};
     59
     60struct irdma_create_cq_req {
     61	__aligned_u64 user_cq_buf;
     62	__aligned_u64 user_shadow_area;
     63};
     64
     65struct irdma_create_qp_req {
     66	__aligned_u64 user_wqe_bufs;
     67	__aligned_u64 user_compl_ctx;
     68};
     69
     70struct irdma_mem_reg_req {
     71	__u16 reg_type; /* enum irdma_memreg_type */
     72	__u16 cq_pages;
     73	__u16 rq_pages;
     74	__u16 sq_pages;
     75};
     76
     77struct irdma_modify_qp_req {
     78	__u8 sq_flush;
     79	__u8 rq_flush;
     80	__u8 rsvd[6];
     81};
     82
     83struct irdma_create_cq_resp {
     84	__u32 cq_id;
     85	__u32 cq_size;
     86};
     87
     88struct irdma_create_qp_resp {
     89	__u32 qp_id;
     90	__u32 actual_sq_size;
     91	__u32 actual_rq_size;
     92	__u32 irdma_drv_opt;
     93	__u16 push_idx;
     94	__u8 lsmm;
     95	__u8 rsvd;
     96	__u32 qp_caps;
     97};
     98
     99struct irdma_modify_qp_resp {
    100	__aligned_u64 push_wqe_mmap_key;
    101	__aligned_u64 push_db_mmap_key;
    102	__u16 push_offset;
    103	__u8 push_valid;
    104	__u8 rsvd[5];
    105};
    106
    107struct irdma_create_ah_resp {
    108	__u32 ah_id;
    109	__u8 rsvd[4];
    110};
    111#endif /* IRDMA_ABI_H */