cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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siw-abi.h (3426B)

      1/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) or BSD-3-Clause */
      2
      3/* Authors: Bernard Metzler <bmt@zurich.ibm.com> */
      4/* Copyright (c) 2008-2019, IBM Corporation */
      5
      6#ifndef _SIW_USER_H
      7#define _SIW_USER_H
      8
      9#include <linux/types.h>
     10
     11#define SIW_NODE_DESC_COMMON "Software iWARP stack"
     12#define SIW_ABI_VERSION 1
     13#define SIW_MAX_SGE 6
     14#define SIW_UOBJ_MAX_KEY 0x08FFFF
     15#define SIW_INVAL_UOBJ_KEY (SIW_UOBJ_MAX_KEY + 1)
     16
     17struct siw_uresp_create_cq {
     18	__u32 cq_id;
     19	__u32 num_cqe;
     20	__aligned_u64 cq_key;
     21};
     22
     23struct siw_uresp_create_qp {
     24	__u32 qp_id;
     25	__u32 num_sqe;
     26	__u32 num_rqe;
     27	__u32 pad;
     28	__aligned_u64 sq_key;
     29	__aligned_u64 rq_key;
     30};
     31
     32struct siw_ureq_reg_mr {
     33	__u8 stag_key;
     34	__u8 reserved[3];
     35	__u32 pad;
     36};
     37
     38struct siw_uresp_reg_mr {
     39	__u32 stag;
     40	__u32 pad;
     41};
     42
     43struct siw_uresp_create_srq {
     44	__u32 num_rqe;
     45	__u32 pad;
     46	__aligned_u64 srq_key;
     47};
     48
     49struct siw_uresp_alloc_ctx {
     50	__u32 dev_id;
     51	__u32 pad;
     52};
     53
     54enum siw_opcode {
     55	SIW_OP_WRITE,
     56	SIW_OP_READ,
     57	SIW_OP_READ_LOCAL_INV,
     58	SIW_OP_SEND,
     59	SIW_OP_SEND_WITH_IMM,
     60	SIW_OP_SEND_REMOTE_INV,
     61
     62	/* Unsupported */
     63	SIW_OP_FETCH_AND_ADD,
     64	SIW_OP_COMP_AND_SWAP,
     65
     66	SIW_OP_RECEIVE,
     67	/* provider internal SQE */
     68	SIW_OP_READ_RESPONSE,
     69	/*
     70	 * below opcodes valid for
     71	 * in-kernel clients only
     72	 */
     73	SIW_OP_INVAL_STAG,
     74	SIW_OP_REG_MR,
     75	SIW_NUM_OPCODES
     76};
     77
     78/* Keep it same as ibv_sge to allow for memcpy */
     79struct siw_sge {
     80	__aligned_u64 laddr;
     81	__u32 length;
     82	__u32 lkey;
     83};
     84
     85/*
     86 * Inline data are kept within the work request itself occupying
     87 * the space of sge[1] .. sge[n]. Therefore, inline data cannot be
     88 * supported if SIW_MAX_SGE is below 2 elements.
     89 */
     90#define SIW_MAX_INLINE (sizeof(struct siw_sge) * (SIW_MAX_SGE - 1))
     91
     92#if SIW_MAX_SGE < 2
     93#error "SIW_MAX_SGE must be at least 2"
     94#endif
     95
     96enum siw_wqe_flags {
     97	SIW_WQE_VALID = 1,
     98	SIW_WQE_INLINE = (1 << 1),
     99	SIW_WQE_SIGNALLED = (1 << 2),
    100	SIW_WQE_SOLICITED = (1 << 3),
    101	SIW_WQE_READ_FENCE = (1 << 4),
    102	SIW_WQE_REM_INVAL = (1 << 5),
    103	SIW_WQE_COMPLETED = (1 << 6)
    104};
    105
    106/* Send Queue Element */
    107struct siw_sqe {
    108	__aligned_u64 id;
    109	__u16 flags;
    110	__u8 num_sge;
    111	/* Contains enum siw_opcode values */
    112	__u8 opcode;
    113	__u32 rkey;
    114	union {
    115		__aligned_u64 raddr;
    116		__aligned_u64 base_mr;
    117	};
    118	union {
    119		struct siw_sge sge[SIW_MAX_SGE];
    120		__aligned_u64 access;
    121	};
    122};
    123
    124/* Receive Queue Element */
    125struct siw_rqe {
    126	__aligned_u64 id;
    127	__u16 flags;
    128	__u8 num_sge;
    129	/*
    130	 * only used by kernel driver,
    131	 * ignored if set by user
    132	 */
    133	__u8 opcode;
    134	__u32 unused;
    135	struct siw_sge sge[SIW_MAX_SGE];
    136};
    137
    138enum siw_notify_flags {
    139	SIW_NOTIFY_NOT = (0),
    140	SIW_NOTIFY_SOLICITED = (1 << 0),
    141	SIW_NOTIFY_NEXT_COMPLETION = (1 << 1),
    142	SIW_NOTIFY_MISSED_EVENTS = (1 << 2),
    143	SIW_NOTIFY_ALL = SIW_NOTIFY_SOLICITED | SIW_NOTIFY_NEXT_COMPLETION |
    144			 SIW_NOTIFY_MISSED_EVENTS
    145};
    146
    147enum siw_wc_status {
    148	SIW_WC_SUCCESS,
    149	SIW_WC_LOC_LEN_ERR,
    150	SIW_WC_LOC_PROT_ERR,
    151	SIW_WC_LOC_QP_OP_ERR,
    152	SIW_WC_WR_FLUSH_ERR,
    153	SIW_WC_BAD_RESP_ERR,
    154	SIW_WC_LOC_ACCESS_ERR,
    155	SIW_WC_REM_ACCESS_ERR,
    156	SIW_WC_REM_INV_REQ_ERR,
    157	SIW_WC_GENERAL_ERR,
    158	SIW_NUM_WC_STATUS
    159};
    160
    161struct siw_cqe {
    162	__aligned_u64 id;
    163	__u8 flags;
    164	__u8 opcode;
    165	__u16 status;
    166	__u32 bytes;
    167	union {
    168		__aligned_u64 imm_data;
    169		__u32 inval_stag;
    170	};
    171	/* QP number or QP pointer */
    172	union {
    173		struct ib_qp *base_qp;
    174		__aligned_u64 qp_id;
    175	};
    176};
    177
    178/*
    179 * Shared structure between user and kernel
    180 * to control CQ arming.
    181 */
    182struct siw_cq_ctrl {
    183	__u32 flags;
    184	__u32 pad;
    185};
    186#endif