cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nmi.h (1542B)

      1/* SPDX-License-Identifier: MIT */
      2/******************************************************************************
      3 * nmi.h
      4 *
      5 * NMI callback registration and reason codes.
      6 *
      7 * Copyright (c) 2005, Keir Fraser <keir@xensource.com>
      8 */
      9
     10#ifndef __XEN_PUBLIC_NMI_H__
     11#define __XEN_PUBLIC_NMI_H__
     12
     13#include <xen/interface/xen.h>
     14
     15/*
     16 * NMI reason codes:
     17 * Currently these are x86-specific, stored in arch_shared_info.nmi_reason.
     18 */
     19 /* I/O-check error reported via ISA port 0x61, bit 6. */
     20#define _XEN_NMIREASON_io_error     0
     21#define XEN_NMIREASON_io_error      (1UL << _XEN_NMIREASON_io_error)
     22 /* PCI SERR reported via ISA port 0x61, bit 7. */
     23#define _XEN_NMIREASON_pci_serr     1
     24#define XEN_NMIREASON_pci_serr      (1UL << _XEN_NMIREASON_pci_serr)
     25 /* Unknown hardware-generated NMI. */
     26#define _XEN_NMIREASON_unknown      2
     27#define XEN_NMIREASON_unknown       (1UL << _XEN_NMIREASON_unknown)
     28
     29/*
     30 * long nmi_op(unsigned int cmd, void *arg)
     31 * NB. All ops return zero on success, else a negative error code.
     32 */
     33
     34/*
     35 * Register NMI callback for this (calling) VCPU. Currently this only makes
     36 * sense for domain 0, vcpu 0. All other callers will be returned EINVAL.
     37 * arg == pointer to xennmi_callback structure.
     38 */
     39#define XENNMI_register_callback   0
     40struct xennmi_callback {
     41    unsigned long handler_address;
     42    unsigned long pad;
     43};
     44DEFINE_GUEST_HANDLE_STRUCT(xennmi_callback);
     45
     46/*
     47 * Deregister NMI callback for this (calling) VCPU.
     48 * arg == NULL.
     49 */
     50#define XENNMI_unregister_callback 1
     51
     52#endif /* __XEN_PUBLIC_NMI_H__ */