cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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xenpmu.h (2528B)

      1/* SPDX-License-Identifier: MIT */
      2#ifndef __XEN_PUBLIC_XENPMU_H__
      3#define __XEN_PUBLIC_XENPMU_H__
      4
      5#include "xen.h"
      6
      7#define XENPMU_VER_MAJ    0
      8#define XENPMU_VER_MIN    1
      9
     10/*
     11 * ` enum neg_errnoval
     12 * ` HYPERVISOR_xenpmu_op(enum xenpmu_op cmd, struct xenpmu_params *args);
     13 *
     14 * @cmd  == XENPMU_* (PMU operation)
     15 * @args == struct xenpmu_params
     16 */
     17/* ` enum xenpmu_op { */
     18#define XENPMU_mode_get        0 /* Also used for getting PMU version */
     19#define XENPMU_mode_set        1
     20#define XENPMU_feature_get     2
     21#define XENPMU_feature_set     3
     22#define XENPMU_init            4
     23#define XENPMU_finish          5
     24#define XENPMU_lvtpc_set       6
     25#define XENPMU_flush           7
     26
     27/* ` } */
     28
     29/* Parameters structure for HYPERVISOR_xenpmu_op call */
     30struct xen_pmu_params {
     31	/* IN/OUT parameters */
     32	struct {
     33		uint32_t maj;
     34		uint32_t min;
     35	} version;
     36	uint64_t val;
     37
     38	/* IN parameters */
     39	uint32_t vcpu;
     40	uint32_t pad;
     41};
     42
     43/* PMU modes:
     44 * - XENPMU_MODE_OFF:   No PMU virtualization
     45 * - XENPMU_MODE_SELF:  Guests can profile themselves
     46 * - XENPMU_MODE_HV:    Guests can profile themselves, dom0 profiles
     47 *                      itself and Xen
     48 * - XENPMU_MODE_ALL:   Only dom0 has access to VPMU and it profiles
     49 *                      everyone: itself, the hypervisor and the guests.
     50 */
     51#define XENPMU_MODE_OFF           0
     52#define XENPMU_MODE_SELF          (1<<0)
     53#define XENPMU_MODE_HV            (1<<1)
     54#define XENPMU_MODE_ALL           (1<<2)
     55
     56/*
     57 * PMU features:
     58 * - XENPMU_FEATURE_INTEL_BTS: Intel BTS support (ignored on AMD)
     59 */
     60#define XENPMU_FEATURE_INTEL_BTS  1
     61
     62/*
     63 * Shared PMU data between hypervisor and PV(H) domains.
     64 *
     65 * The hypervisor fills out this structure during PMU interrupt and sends an
     66 * interrupt to appropriate VCPU.
     67 * Architecture-independent fields of xen_pmu_data are WO for the hypervisor
     68 * and RO for the guest but some fields in xen_pmu_arch can be writable
     69 * by both the hypervisor and the guest (see arch-$arch/pmu.h).
     70 */
     71struct xen_pmu_data {
     72	/* Interrupted VCPU */
     73	uint32_t vcpu_id;
     74
     75	/*
     76	 * Physical processor on which the interrupt occurred. On non-privileged
     77	 * guests set to vcpu_id;
     78	 */
     79	uint32_t pcpu_id;
     80
     81	/*
     82	 * Domain that was interrupted. On non-privileged guests set to
     83	 * DOMID_SELF.
     84	 * On privileged guests can be DOMID_SELF, DOMID_XEN, or, when in
     85	 * XENPMU_MODE_ALL mode, domain ID of another domain.
     86	 */
     87	domid_t  domain_id;
     88
     89	uint8_t pad[6];
     90
     91	/* Architecture-specific information */
     92	struct xen_pmu_arch pmu;
     93};
     94
     95#endif /* __XEN_PUBLIC_XENPMU_H__ */