cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dsp_spos.c (54292B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 */
      4
      5/*
      6 * 2002-07 Benny Sjostrand benny@hostmobility.com
      7 */
      8
      9
     10#include <linux/io.h>
     11#include <linux/delay.h>
     12#include <linux/pm.h>
     13#include <linux/init.h>
     14#include <linux/slab.h>
     15#include <linux/vmalloc.h>
     16#include <linux/mutex.h>
     17
     18#include <sound/core.h>
     19#include <sound/control.h>
     20#include <sound/info.h>
     21#include <sound/asoundef.h>
     22#include "cs46xx.h"
     23
     24#include "cs46xx_lib.h"
     25#include "dsp_spos.h"
     26
     27static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
     28				  struct dsp_scb_descriptor * fg_entry);
     29
     30static const enum wide_opcode wide_opcodes[] = {
     31	WIDE_FOR_BEGIN_LOOP,
     32	WIDE_FOR_BEGIN_LOOP2,
     33	WIDE_COND_GOTO_ADDR,
     34	WIDE_COND_GOTO_CALL,
     35	WIDE_TBEQ_COND_GOTO_ADDR,
     36	WIDE_TBEQ_COND_CALL_ADDR,
     37	WIDE_TBEQ_NCOND_GOTO_ADDR,
     38	WIDE_TBEQ_NCOND_CALL_ADDR,
     39	WIDE_TBEQ_COND_GOTO1_ADDR,
     40	WIDE_TBEQ_COND_CALL1_ADDR,
     41	WIDE_TBEQ_NCOND_GOTOI_ADDR,
     42	WIDE_TBEQ_NCOND_CALL1_ADDR
     43};
     44
     45static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
     46				       u32 overlay_begin_address)
     47{
     48	unsigned int i = 0, j, nreallocated = 0;
     49	u32 hival,loval,address;
     50	u32 mop_operands,mop_type,wide_op;
     51	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
     52
     53	if (snd_BUG_ON(size %2))
     54		return -EINVAL;
     55  
     56	while (i < size) {
     57		loval = data[i++];
     58		hival = data[i++];
     59
     60		if (ins->code.offset > 0) {
     61			mop_operands = (hival >> 6) & 0x03fff;
     62			mop_type = mop_operands >> 10;
     63      
     64			/* check for wide type instruction */
     65			if (mop_type == 0 &&
     66			    (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
     67			    (mop_operands & WIDE_INSTR_MASK) != 0) {
     68				wide_op = loval & 0x7f;
     69				for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
     70					if (wide_opcodes[j] == wide_op) {
     71						/* need to reallocate instruction */
     72						address  = (hival & 0x00FFF) << 5;
     73						address |=  loval >> 15;
     74            
     75						dev_dbg(chip->card->dev,
     76							"handle_wideop[1]: %05x:%05x addr %04x\n",
     77							hival, loval, address);
     78            
     79						if ( !(address & 0x8000) ) {
     80							address += (ins->code.offset / 2) - overlay_begin_address;
     81						} else {
     82							dev_dbg(chip->card->dev,
     83								"handle_wideop[1]: ROM symbol not reallocated\n");
     84						}
     85            
     86						hival &= 0xFF000;
     87						loval &= 0x07FFF;
     88            
     89						hival |= ( (address >> 5)  & 0x00FFF);
     90						loval |= ( (address << 15) & 0xF8000);
     91            
     92						address  = (hival & 0x00FFF) << 5;
     93						address |=  loval >> 15;
     94            
     95						dev_dbg(chip->card->dev,
     96							"handle_wideop:[2] %05x:%05x addr %04x\n",
     97							hival, loval, address);
     98						nreallocated++;
     99					} /* wide_opcodes[j] == wide_op */
    100				} /* for */
    101			} /* mod_type == 0 ... */
    102		} /* ins->code.offset > 0 */
    103
    104		ins->code.data[ins->code.size++] = loval;
    105		ins->code.data[ins->code.size++] = hival;
    106	}
    107
    108	dev_dbg(chip->card->dev,
    109		"dsp_spos: %d instructions reallocated\n", nreallocated);
    110	return nreallocated;
    111}
    112
    113static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
    114{
    115	int i;
    116	for (i = 0;i < module->nsegments; ++i) {
    117		if (module->segments[i].segment_type == seg_type) {
    118			return (module->segments + i);
    119		}
    120	}
    121
    122	return NULL;
    123};
    124
    125static int find_free_symbol_index (struct dsp_spos_instance * ins)
    126{
    127	int index = ins->symbol_table.nsymbols,i;
    128
    129	for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
    130		if (ins->symbol_table.symbols[i].deleted) {
    131			index = i;
    132			break;
    133		}
    134	}
    135
    136	return index;
    137}
    138
    139static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
    140{
    141	int i;
    142	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    143
    144	if (module->symbol_table.nsymbols > 0) {
    145		if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
    146		    module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
    147			module->overlay_begin_address = module->symbol_table.symbols[0].address;
    148		}
    149	}
    150
    151	for (i = 0;i < module->symbol_table.nsymbols; ++i) {
    152		if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
    153			dev_err(chip->card->dev,
    154				"dsp_spos: symbol table is full\n");
    155			return -ENOMEM;
    156		}
    157
    158
    159		if (cs46xx_dsp_lookup_symbol(chip,
    160					     module->symbol_table.symbols[i].symbol_name,
    161					     module->symbol_table.symbols[i].symbol_type) == NULL) {
    162
    163			ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
    164			ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
    165			ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
    166			ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
    167
    168			if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) 
    169				ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
    170
    171			ins->symbol_table.nsymbols++;
    172		} else {
    173#if 0
    174			dev_dbg(chip->card->dev,
    175				"dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
    176				module->symbol_table.symbols[i].symbol_name); */
    177#endif
    178		}
    179	}
    180
    181	return 0;
    182}
    183
    184static struct dsp_symbol_entry *
    185add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
    186{
    187	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    188	struct dsp_symbol_entry * symbol = NULL;
    189	int index;
    190
    191	if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
    192		dev_err(chip->card->dev, "dsp_spos: symbol table is full\n");
    193		return NULL;
    194	}
    195  
    196	if (cs46xx_dsp_lookup_symbol(chip,
    197				     symbol_name,
    198				     type) != NULL) {
    199		dev_err(chip->card->dev,
    200			"dsp_spos: symbol <%s> duplicated\n", symbol_name);
    201		return NULL;
    202	}
    203
    204	index = find_free_symbol_index (ins);
    205
    206	strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
    207	ins->symbol_table.symbols[index].address = address;
    208	ins->symbol_table.symbols[index].symbol_type = type;
    209	ins->symbol_table.symbols[index].module = NULL;
    210	ins->symbol_table.symbols[index].deleted = 0;
    211	symbol = (ins->symbol_table.symbols + index);
    212
    213	if (index > ins->symbol_table.highest_frag_index) 
    214		ins->symbol_table.highest_frag_index = index;
    215
    216	if (index == ins->symbol_table.nsymbols)
    217		ins->symbol_table.nsymbols++; /* no frag. in list */
    218
    219	return symbol;
    220}
    221
    222struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
    223{
    224	struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
    225
    226	if (ins == NULL)
    227		return NULL;
    228
    229	/* better to use vmalloc for this big table */
    230	ins->symbol_table.symbols =
    231		vmalloc(array_size(DSP_MAX_SYMBOLS,
    232				   sizeof(struct dsp_symbol_entry)));
    233	ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
    234	ins->modules = kmalloc_array(DSP_MAX_MODULES,
    235				     sizeof(struct dsp_module_desc),
    236				     GFP_KERNEL);
    237	if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) {
    238		cs46xx_dsp_spos_destroy(chip);
    239		goto error;
    240	}
    241	ins->symbol_table.nsymbols = 0;
    242	ins->symbol_table.highest_frag_index = 0;
    243	ins->code.offset = 0;
    244	ins->code.size = 0;
    245	ins->nscb = 0;
    246	ins->ntask = 0;
    247	ins->nmodules = 0;
    248
    249	/* default SPDIF input sample rate
    250	   to 48000 khz */
    251	ins->spdif_in_sample_rate = 48000;
    252
    253	/* maximize volume */
    254	ins->dac_volume_right = 0x8000;
    255	ins->dac_volume_left = 0x8000;
    256	ins->spdif_input_volume_right = 0x8000;
    257	ins->spdif_input_volume_left = 0x8000;
    258
    259	/* set left and right validity bits and
    260	   default channel status */
    261	ins->spdif_csuv_default =
    262		ins->spdif_csuv_stream =
    263	 /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
    264	 /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
    265	 /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
    266	 /* left and right validity bits */ (1 << 13) | (1 << 12);
    267
    268	return ins;
    269
    270error:
    271	kfree(ins->modules);
    272	kfree(ins->code.data);
    273	vfree(ins->symbol_table.symbols);
    274	kfree(ins);
    275	return NULL;
    276}
    277
    278void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
    279{
    280	int i;
    281	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    282
    283	if (snd_BUG_ON(!ins))
    284		return;
    285
    286	mutex_lock(&chip->spos_mutex);
    287	for (i = 0; i < ins->nscb; ++i) {
    288		if (ins->scbs[i].deleted) continue;
    289
    290		cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
    291#ifdef CONFIG_PM_SLEEP
    292		kfree(ins->scbs[i].data);
    293#endif
    294	}
    295
    296	kfree(ins->code.data);
    297	vfree(ins->symbol_table.symbols);
    298	kfree(ins->modules);
    299	kfree(ins);
    300	mutex_unlock(&chip->spos_mutex);
    301}
    302
    303static int dsp_load_parameter(struct snd_cs46xx *chip,
    304			      struct dsp_segment_desc *parameter)
    305{
    306	u32 doffset, dsize;
    307
    308	if (!parameter) {
    309		dev_dbg(chip->card->dev,
    310			"dsp_spos: module got no parameter segment\n");
    311		return 0;
    312	}
    313
    314	doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
    315	dsize   = parameter->size * 4;
    316
    317	dev_dbg(chip->card->dev,
    318		"dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
    319		    doffset,doffset + dsize);
    320	if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
    321		dev_err(chip->card->dev,
    322			"dsp_spos: failed to download parameter data to DSP\n");
    323		return -EINVAL;
    324	}
    325	return 0;
    326}
    327
    328static int dsp_load_sample(struct snd_cs46xx *chip,
    329			   struct dsp_segment_desc *sample)
    330{
    331	u32 doffset, dsize;
    332
    333	if (!sample) {
    334		dev_dbg(chip->card->dev,
    335			"dsp_spos: module got no sample segment\n");
    336		return 0;
    337	}
    338
    339	doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
    340	dsize   =  sample->size * 4;
    341
    342	dev_dbg(chip->card->dev,
    343		"dsp_spos: downloading sample data to chip (%08x-%08x)\n",
    344		    doffset,doffset + dsize);
    345
    346	if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
    347		dev_err(chip->card->dev,
    348			"dsp_spos: failed to sample data to DSP\n");
    349		return -EINVAL;
    350	}
    351	return 0;
    352}
    353
    354int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
    355{
    356	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    357	struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
    358	u32 doffset, dsize;
    359	int err;
    360
    361	if (ins->nmodules == DSP_MAX_MODULES - 1) {
    362		dev_err(chip->card->dev,
    363			"dsp_spos: to many modules loaded into DSP\n");
    364		return -ENOMEM;
    365	}
    366
    367	dev_dbg(chip->card->dev,
    368		"dsp_spos: loading module %s into DSP\n", module->module_name);
    369  
    370	if (ins->nmodules == 0) {
    371		dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n");
    372		snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
    373	}
    374  
    375	err = dsp_load_parameter(chip, get_segment_desc(module,
    376							SEGTYPE_SP_PARAMETER));
    377	if (err < 0)
    378		return err;
    379
    380	if (ins->nmodules == 0) {
    381		dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n");
    382		snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
    383	}
    384
    385	err = dsp_load_sample(chip, get_segment_desc(module,
    386						     SEGTYPE_SP_SAMPLE));
    387	if (err < 0)
    388		return err;
    389
    390	if (ins->nmodules == 0) {
    391		dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n");
    392		snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
    393	}
    394
    395	if (code == NULL) {
    396		dev_dbg(chip->card->dev,
    397			"dsp_spos: module got no code segment\n");
    398	} else {
    399		if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
    400			dev_err(chip->card->dev,
    401				"dsp_spos: no space available in DSP\n");
    402			return -ENOMEM;
    403		}
    404
    405		module->load_address = ins->code.offset;
    406		module->overlay_begin_address = 0x000;
    407
    408		/* if module has a code segment it must have
    409		   symbol table */
    410		if (snd_BUG_ON(!module->symbol_table.symbols))
    411			return -ENOMEM;
    412		if (add_symbols(chip,module)) {
    413			dev_err(chip->card->dev,
    414				"dsp_spos: failed to load symbol table\n");
    415			return -ENOMEM;
    416		}
    417    
    418		doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
    419		dsize   = code->size * 4;
    420		dev_dbg(chip->card->dev,
    421			"dsp_spos: downloading code to chip (%08x-%08x)\n",
    422			    doffset,doffset + dsize);   
    423
    424		module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
    425
    426		if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
    427			dev_err(chip->card->dev,
    428				"dsp_spos: failed to download code to DSP\n");
    429			return -EINVAL;
    430		}
    431
    432		ins->code.offset += code->size;
    433	}
    434
    435	/* NOTE: module segments and symbol table must be
    436	   statically allocated. Case that module data is
    437	   not generated by the ospparser */
    438	ins->modules[ins->nmodules] = *module;
    439	ins->nmodules++;
    440
    441	return 0;
    442}
    443
    444struct dsp_symbol_entry *
    445cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
    446{
    447	int i;
    448	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    449
    450	for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
    451
    452		if (ins->symbol_table.symbols[i].deleted)
    453			continue;
    454
    455		if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
    456		    ins->symbol_table.symbols[i].symbol_type == symbol_type) {
    457			return (ins->symbol_table.symbols + i);
    458		}
    459	}
    460
    461#if 0
    462	dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n",
    463		symbol_name,symbol_type);
    464#endif
    465
    466	return NULL;
    467}
    468
    469
    470#ifdef CONFIG_SND_PROC_FS
    471static struct dsp_symbol_entry *
    472cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
    473{
    474	int i;
    475	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    476
    477	for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
    478
    479		if (ins->symbol_table.symbols[i].deleted)
    480			continue;
    481
    482		if (ins->symbol_table.symbols[i].address == address &&
    483		    ins->symbol_table.symbols[i].symbol_type == symbol_type) {
    484			return (ins->symbol_table.symbols + i);
    485		}
    486	}
    487
    488
    489	return NULL;
    490}
    491
    492
    493static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
    494					       struct snd_info_buffer *buffer)
    495{
    496	struct snd_cs46xx *chip = entry->private_data;
    497	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    498	int i;
    499
    500	snd_iprintf(buffer, "SYMBOLS:\n");
    501	for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
    502		char *module_str = "system";
    503
    504		if (ins->symbol_table.symbols[i].deleted)
    505			continue;
    506
    507		if (ins->symbol_table.symbols[i].module != NULL) {
    508			module_str = ins->symbol_table.symbols[i].module->module_name;
    509		}
    510
    511    
    512		snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
    513			    ins->symbol_table.symbols[i].address,
    514			    ins->symbol_table.symbols[i].symbol_type,
    515			    ins->symbol_table.symbols[i].symbol_name,
    516			    module_str);    
    517	}
    518}
    519
    520
    521static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
    522					  struct snd_info_buffer *buffer)
    523{
    524	struct snd_cs46xx *chip = entry->private_data;
    525	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    526	int i,j;
    527
    528	mutex_lock(&chip->spos_mutex);
    529	snd_iprintf(buffer, "MODULES:\n");
    530	for ( i = 0; i < ins->nmodules; ++i ) {
    531		snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
    532		snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
    533		snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
    534
    535		for (j = 0; j < ins->modules[i].nsegments; ++ j) {
    536			struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
    537			snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
    538				    desc->segment_type,desc->offset, desc->size);
    539		}
    540	}
    541	mutex_unlock(&chip->spos_mutex);
    542}
    543
    544static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
    545					    struct snd_info_buffer *buffer)
    546{
    547	struct snd_cs46xx *chip = entry->private_data;
    548	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    549	int i, j, col;
    550	void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
    551
    552	mutex_lock(&chip->spos_mutex);
    553	snd_iprintf(buffer, "TASK TREES:\n");
    554	for ( i = 0; i < ins->ntask; ++i) {
    555		snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
    556
    557		for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
    558			u32 val;
    559			if (col == 4) {
    560				snd_iprintf(buffer,"\n");
    561				col = 0;
    562			}
    563			val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
    564			snd_iprintf(buffer,"%08x ",val);
    565		}
    566	}
    567
    568	snd_iprintf(buffer,"\n");  
    569	mutex_unlock(&chip->spos_mutex);
    570}
    571
    572static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
    573				      struct snd_info_buffer *buffer)
    574{
    575	struct snd_cs46xx *chip = entry->private_data;
    576	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    577	int i;
    578
    579	mutex_lock(&chip->spos_mutex);
    580	snd_iprintf(buffer, "SCB's:\n");
    581	for ( i = 0; i < ins->nscb; ++i) {
    582		if (ins->scbs[i].deleted)
    583			continue;
    584		snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
    585
    586		if (ins->scbs[i].parent_scb_ptr != NULL) {
    587			snd_iprintf(buffer,"parent [%s:%04x] ", 
    588				    ins->scbs[i].parent_scb_ptr->scb_name,
    589				    ins->scbs[i].parent_scb_ptr->address);
    590		} else snd_iprintf(buffer,"parent [none] ");
    591
    592		snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
    593			    ins->scbs[i].sub_list_ptr->scb_name,
    594			    ins->scbs[i].sub_list_ptr->address,
    595			    ins->scbs[i].next_scb_ptr->scb_name,
    596			    ins->scbs[i].next_scb_ptr->address,
    597			    ins->scbs[i].task_entry->symbol_name,
    598			    ins->scbs[i].task_entry->address);
    599	}
    600
    601	snd_iprintf(buffer,"\n");
    602	mutex_unlock(&chip->spos_mutex);
    603}
    604
    605static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
    606						 struct snd_info_buffer *buffer)
    607{
    608	struct snd_cs46xx *chip = entry->private_data;
    609	/*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
    610	unsigned int i, col = 0;
    611	void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
    612	struct dsp_symbol_entry * symbol; 
    613
    614	for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
    615		if (col == 4) {
    616			snd_iprintf(buffer,"\n");
    617			col = 0;
    618		}
    619
    620		symbol = cs46xx_dsp_lookup_symbol_addr(chip, i / sizeof(u32), SYMBOL_PARAMETER);
    621		if (symbol) {
    622			col = 0;
    623			snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
    624		}
    625
    626		if (col == 0) {
    627			snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
    628		}
    629
    630		snd_iprintf(buffer,"%08X ",readl(dst + i));
    631	}
    632}
    633
    634static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
    635					      struct snd_info_buffer *buffer)
    636{
    637	struct snd_cs46xx *chip = entry->private_data;
    638	int i,col = 0;
    639	void __iomem *dst = chip->region.idx[2].remap_addr;
    640
    641	snd_iprintf(buffer,"PCMREADER:\n");
    642	for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
    643		if (col == 4) {
    644			snd_iprintf(buffer,"\n");
    645			col = 0;
    646		}
    647
    648		if (col == 0) {
    649			snd_iprintf(buffer, "%04X ",i);
    650		}
    651
    652		snd_iprintf(buffer,"%08X ",readl(dst + i));
    653	}
    654
    655	snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
    656
    657	col = 0;
    658	for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
    659		if (col == 4) {
    660			snd_iprintf(buffer,"\n");
    661			col = 0;
    662		}
    663
    664		if (col == 0) {
    665			snd_iprintf(buffer, "%04X ",i);
    666		}
    667
    668		snd_iprintf(buffer,"%08X ",readl(dst + i));
    669	}
    670
    671	snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
    672	col = 0;
    673	for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
    674		if (col == 4) {
    675			snd_iprintf(buffer,"\n");
    676			col = 0;
    677		}
    678		
    679		if (col == 0) {
    680			snd_iprintf(buffer, "%04X ",i);
    681		}
    682
    683		snd_iprintf(buffer,"%08X ",readl(dst + i));
    684	}
    685
    686
    687	snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
    688	col = 0;
    689	for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
    690		if (col == 4) {
    691			snd_iprintf(buffer,"\n");
    692			col = 0;
    693		}
    694
    695		if (col == 0) {
    696			snd_iprintf(buffer, "%04X ",i);
    697		}
    698
    699		snd_iprintf(buffer,"%08X ",readl(dst + i));
    700	}
    701
    702	snd_iprintf(buffer,"\n...\n");
    703	col = 0;
    704
    705	for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
    706		if (col == 4) {
    707			snd_iprintf(buffer,"\n");
    708			col = 0;
    709		}
    710
    711		if (col == 0) {
    712			snd_iprintf(buffer, "%04X ",i);
    713		}
    714
    715		snd_iprintf(buffer,"%08X ",readl(dst + i));
    716	}
    717
    718
    719	snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
    720	col = 0;
    721	for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
    722		if (col == 4) {
    723			snd_iprintf(buffer,"\n");
    724			col = 0;
    725		}
    726
    727		if (col == 0) {
    728			snd_iprintf(buffer, "%04X ",i);
    729		}
    730
    731		snd_iprintf(buffer,"%08X ",readl(dst + i));
    732	}
    733
    734	snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
    735	col = 0;
    736	for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
    737		if (col == 4) {
    738			snd_iprintf(buffer,"\n");
    739			col = 0;
    740		}
    741
    742		if (col == 0) {
    743			snd_iprintf(buffer, "%04X ",i);
    744		}
    745
    746		snd_iprintf(buffer,"%08X ",readl(dst + i));
    747	}
    748#if 0
    749	snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
    750	col = 0;
    751	for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
    752		if (col == 4) {
    753			snd_iprintf(buffer,"\n");
    754			col = 0;
    755		}
    756
    757		if (col == 0) {
    758			snd_iprintf(buffer, "%04X ",i);
    759		}
    760
    761		snd_iprintf(buffer,"%08X ",readl(dst + i));
    762	}
    763#endif
    764
    765	snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
    766	col = 0;
    767	for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
    768		if (col == 4) {
    769			snd_iprintf(buffer,"\n");
    770			col = 0;
    771		}
    772
    773		if (col == 0) {
    774			snd_iprintf(buffer, "%04X ",i);
    775		}
    776		
    777		snd_iprintf(buffer,"%08X ",readl(dst + i));
    778	}
    779	snd_iprintf(buffer,"\n");
    780}
    781
    782int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
    783{
    784	struct snd_info_entry *entry;
    785	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    786	int i;
    787
    788	ins->snd_card = card;
    789
    790	entry = snd_info_create_card_entry(card, "dsp", card->proc_root);
    791	if (entry)
    792		entry->mode = S_IFDIR | 0555;
    793	ins->proc_dsp_dir = entry;
    794
    795	if (!ins->proc_dsp_dir)
    796		return -ENOMEM;
    797
    798	entry = snd_info_create_card_entry(card, "spos_symbols",
    799					   ins->proc_dsp_dir);
    800	if (entry)
    801		snd_info_set_text_ops(entry, chip,
    802				      cs46xx_dsp_proc_symbol_table_read);
    803    
    804	entry = snd_info_create_card_entry(card, "spos_modules",
    805					   ins->proc_dsp_dir);
    806	if (entry)
    807		snd_info_set_text_ops(entry, chip,
    808				      cs46xx_dsp_proc_modules_read);
    809
    810	entry = snd_info_create_card_entry(card, "parameter",
    811					   ins->proc_dsp_dir);
    812	if (entry)
    813		snd_info_set_text_ops(entry, chip,
    814				      cs46xx_dsp_proc_parameter_dump_read);
    815
    816	entry = snd_info_create_card_entry(card, "sample",
    817					   ins->proc_dsp_dir);
    818	if (entry)
    819		snd_info_set_text_ops(entry, chip,
    820				      cs46xx_dsp_proc_sample_dump_read);
    821
    822	entry = snd_info_create_card_entry(card, "task_tree",
    823					   ins->proc_dsp_dir);
    824	if (entry)
    825		snd_info_set_text_ops(entry, chip,
    826				      cs46xx_dsp_proc_task_tree_read);
    827
    828	entry = snd_info_create_card_entry(card, "scb_info",
    829					   ins->proc_dsp_dir);
    830	if (entry)
    831		snd_info_set_text_ops(entry, chip,
    832				      cs46xx_dsp_proc_scb_read);
    833
    834	mutex_lock(&chip->spos_mutex);
    835	/* register/update SCB's entries on proc */
    836	for (i = 0; i < ins->nscb; ++i) {
    837		if (ins->scbs[i].deleted) continue;
    838
    839		cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
    840	}
    841	mutex_unlock(&chip->spos_mutex);
    842
    843	return 0;
    844}
    845
    846int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
    847{
    848	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    849	int i;
    850
    851	if (!ins)
    852		return 0;
    853
    854	mutex_lock(&chip->spos_mutex);
    855	for (i = 0; i < ins->nscb; ++i) {
    856		if (ins->scbs[i].deleted) continue;
    857		cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
    858	}
    859	mutex_unlock(&chip->spos_mutex);
    860
    861	snd_info_free_entry(ins->proc_dsp_dir);
    862	ins->proc_dsp_dir = NULL;
    863
    864	return 0;
    865}
    866#endif /* CONFIG_SND_PROC_FS */
    867
    868static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
    869				   u32  dest, int size)
    870{
    871	void __iomem *spdst = chip->region.idx[1].remap_addr + 
    872		DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
    873	int i;
    874
    875	for (i = 0; i < size; ++i) {
    876		dev_dbg(chip->card->dev, "addr %p, val %08x\n",
    877			spdst, task_data[i]);
    878		writel(task_data[i],spdst);
    879		spdst += sizeof(u32);
    880	}
    881}
    882
    883static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
    884{
    885	void __iomem *spdst = chip->region.idx[1].remap_addr + 
    886		DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
    887	int i;
    888
    889	for (i = 0; i < 0x10; ++i) {
    890		dev_dbg(chip->card->dev, "addr %p, val %08x\n",
    891			spdst, scb_data[i]);
    892		writel(scb_data[i],spdst);
    893		spdst += sizeof(u32);
    894	}
    895}
    896
    897static int find_free_scb_index (struct dsp_spos_instance * ins)
    898{
    899	int index = ins->nscb, i;
    900
    901	for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
    902		if (ins->scbs[i].deleted) {
    903			index = i;
    904			break;
    905		}
    906	}
    907
    908	return index;
    909}
    910
    911static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
    912{
    913	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    914	struct dsp_scb_descriptor * desc = NULL;
    915	int index;
    916
    917	if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
    918		dev_err(chip->card->dev,
    919			"dsp_spos: got no place for other SCB\n");
    920		return NULL;
    921	}
    922
    923	index = find_free_scb_index (ins);
    924
    925	memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
    926	strcpy(ins->scbs[index].scb_name, name);
    927	ins->scbs[index].address = dest;
    928	ins->scbs[index].index = index;
    929	ins->scbs[index].ref_count = 1;
    930
    931	desc = (ins->scbs + index);
    932	ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
    933
    934	if (index > ins->scb_highest_frag_index)
    935		ins->scb_highest_frag_index = index;
    936
    937	if (index == ins->nscb)
    938		ins->nscb++;
    939
    940	return desc;
    941}
    942
    943static struct dsp_task_descriptor *
    944_map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
    945{
    946	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
    947	struct dsp_task_descriptor * desc = NULL;
    948
    949	if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
    950		dev_err(chip->card->dev,
    951			"dsp_spos: got no place for other TASK\n");
    952		return NULL;
    953	}
    954
    955	if (name)
    956		strcpy(ins->tasks[ins->ntask].task_name, name);
    957	else
    958		strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
    959	ins->tasks[ins->ntask].address = dest;
    960	ins->tasks[ins->ntask].size = size;
    961
    962	/* quick find in list */
    963	ins->tasks[ins->ntask].index = ins->ntask;
    964	desc = (ins->tasks + ins->ntask);
    965	ins->ntask++;
    966
    967	if (name)
    968		add_symbol (chip,name,dest,SYMBOL_PARAMETER);
    969	return desc;
    970}
    971
    972#define SCB_BYTES	(0x10 * 4)
    973
    974struct dsp_scb_descriptor *
    975cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
    976{
    977	struct dsp_scb_descriptor * desc;
    978
    979#ifdef CONFIG_PM_SLEEP
    980	/* copy the data for resume */
    981	scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
    982	if (!scb_data)
    983		return NULL;
    984#endif
    985
    986	desc = _map_scb (chip,name,dest);
    987	if (desc) {
    988		desc->data = scb_data;
    989		_dsp_create_scb(chip,scb_data,dest);
    990	} else {
    991		dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n");
    992#ifdef CONFIG_PM_SLEEP
    993		kfree(scb_data);
    994#endif
    995	}
    996
    997	return desc;
    998}
    999
   1000
   1001static struct dsp_task_descriptor *
   1002cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
   1003			     u32 dest, int size)
   1004{
   1005	struct dsp_task_descriptor * desc;
   1006
   1007	desc = _map_task_tree (chip,name,dest,size);
   1008	if (desc) {
   1009		desc->data = task_data;
   1010		_dsp_create_task_tree(chip,task_data,dest,size);
   1011	} else {
   1012		dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n");
   1013	}
   1014
   1015	return desc;
   1016}
   1017
   1018int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
   1019{
   1020	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1021	struct dsp_symbol_entry * fg_task_tree_header_code;
   1022	struct dsp_symbol_entry * task_tree_header_code;
   1023	struct dsp_symbol_entry * task_tree_thread;
   1024	struct dsp_symbol_entry * null_algorithm;
   1025	struct dsp_symbol_entry * magic_snoop_task;
   1026
   1027	struct dsp_scb_descriptor * timing_master_scb;
   1028	struct dsp_scb_descriptor * codec_out_scb;
   1029	struct dsp_scb_descriptor * codec_in_scb;
   1030	struct dsp_scb_descriptor * src_task_scb;
   1031	struct dsp_scb_descriptor * master_mix_scb;
   1032	struct dsp_scb_descriptor * rear_mix_scb;
   1033	struct dsp_scb_descriptor * record_mix_scb;
   1034	struct dsp_scb_descriptor * write_back_scb;
   1035	struct dsp_scb_descriptor * vari_decimate_scb;
   1036	struct dsp_scb_descriptor * rear_codec_out_scb;
   1037	struct dsp_scb_descriptor * clfe_codec_out_scb;
   1038	struct dsp_scb_descriptor * magic_snoop_scb;
   1039	
   1040	int fifo_addr, fifo_span, valid_slots;
   1041
   1042	static const struct dsp_spos_control_block sposcb = {
   1043		/* 0 */ HFG_TREE_SCB,HFG_STACK,
   1044		/* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
   1045		/* 2 */ DSP_SPOS_DC,0,
   1046		/* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
   1047		/* 4 */ 0,0,
   1048		/* 5 */ DSP_SPOS_UU,0,
   1049		/* 6 */ FG_TASK_HEADER_ADDR,0,
   1050		/* 7 */ 0,0,
   1051		/* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
   1052		/* 9 */ 0,
   1053		/* A */ 0,HFG_FIRST_EXECUTE_MODE,
   1054		/* B */ DSP_SPOS_UU,DSP_SPOS_UU,
   1055		/* C */ DSP_SPOS_DC_DC,
   1056		/* D */ DSP_SPOS_DC_DC,
   1057		/* E */ DSP_SPOS_DC_DC,
   1058		/* F */ DSP_SPOS_DC_DC
   1059	};
   1060
   1061	cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
   1062
   1063	null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
   1064	if (null_algorithm == NULL) {
   1065		dev_err(chip->card->dev,
   1066			"dsp_spos: symbol NULLALGORITHM not found\n");
   1067		return -EIO;
   1068	}
   1069
   1070	fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);  
   1071	if (fg_task_tree_header_code == NULL) {
   1072		dev_err(chip->card->dev,
   1073			"dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
   1074		return -EIO;
   1075	}
   1076
   1077	task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);  
   1078	if (task_tree_header_code == NULL) {
   1079		dev_err(chip->card->dev,
   1080			"dsp_spos: symbol TASKTREEHEADERCODE not found\n");
   1081		return -EIO;
   1082	}
   1083  
   1084	task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
   1085	if (task_tree_thread == NULL) {
   1086		dev_err(chip->card->dev,
   1087			"dsp_spos: symbol TASKTREETHREAD not found\n");
   1088		return -EIO;
   1089	}
   1090
   1091	magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
   1092	if (magic_snoop_task == NULL) {
   1093		dev_err(chip->card->dev,
   1094			"dsp_spos: symbol MAGICSNOOPTASK not found\n");
   1095		return -EIO;
   1096	}
   1097  
   1098	{
   1099		/* create the null SCB */
   1100		static struct dsp_generic_scb null_scb = {
   1101			{ 0, 0, 0, 0 },
   1102			{ 0, 0, 0, 0, 0 },
   1103			NULL_SCB_ADDR, NULL_SCB_ADDR,
   1104			0, 0, 0, 0, 0,
   1105			{
   1106				0,0,
   1107				0,0,
   1108			}
   1109		};
   1110
   1111		null_scb.entry_point = null_algorithm->address;
   1112		ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
   1113		ins->the_null_scb->task_entry = null_algorithm;
   1114		ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
   1115		ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
   1116		ins->the_null_scb->parent_scb_ptr = NULL;
   1117		cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
   1118	}
   1119
   1120	{
   1121		/* setup foreground task tree */
   1122		static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
   1123			{ FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
   1124			  DSP_SPOS_DC_DC,
   1125			  DSP_SPOS_DC_DC,
   1126			  0x0000,DSP_SPOS_DC,
   1127			  DSP_SPOS_DC, DSP_SPOS_DC,
   1128			  DSP_SPOS_DC_DC,
   1129			  DSP_SPOS_DC_DC,
   1130			  DSP_SPOS_DC_DC,
   1131			  DSP_SPOS_DC,DSP_SPOS_DC },
   1132    
   1133			{
   1134				BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, 
   1135				0,
   1136				FG_TASK_HEADER_ADDR + TCBData,                  
   1137			},
   1138
   1139			{    
   1140				4,0,
   1141				1,0,
   1142				2,SPOSCB_ADDR + HFGFlags,
   1143				0,0,
   1144				FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
   1145			},
   1146
   1147			{
   1148				DSP_SPOS_DC,0,
   1149				DSP_SPOS_DC,DSP_SPOS_DC,
   1150				DSP_SPOS_DC,DSP_SPOS_DC,
   1151				DSP_SPOS_DC,DSP_SPOS_DC,
   1152				DSP_SPOS_DC,DSP_SPOS_DC,
   1153				DSP_SPOS_DCDC,
   1154				DSP_SPOS_UU,1,
   1155				DSP_SPOS_DCDC,
   1156				DSP_SPOS_DCDC,
   1157				DSP_SPOS_DCDC,
   1158				DSP_SPOS_DCDC,
   1159				DSP_SPOS_DCDC,
   1160				DSP_SPOS_DCDC,
   1161				DSP_SPOS_DCDC,
   1162				DSP_SPOS_DCDC,
   1163				DSP_SPOS_DCDC,
   1164				DSP_SPOS_DCDC,
   1165				DSP_SPOS_DCDC,
   1166				DSP_SPOS_DCDC,
   1167				DSP_SPOS_DCDC,
   1168				DSP_SPOS_DCDC,
   1169				DSP_SPOS_DCDC,
   1170				DSP_SPOS_DCDC,
   1171				DSP_SPOS_DCDC,
   1172				DSP_SPOS_DCDC,
   1173				DSP_SPOS_DCDC,
   1174				DSP_SPOS_DCDC,
   1175				DSP_SPOS_DCDC,
   1176				DSP_SPOS_DCDC,
   1177				DSP_SPOS_DCDC,
   1178				DSP_SPOS_DCDC,
   1179				DSP_SPOS_DCDC,
   1180				DSP_SPOS_DCDC,
   1181				DSP_SPOS_DCDC,
   1182				DSP_SPOS_DCDC 
   1183			},                                               
   1184			{ 
   1185				FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
   1186				0,0
   1187			}
   1188		};
   1189
   1190		fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
   1191		fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
   1192		cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
   1193	}
   1194
   1195
   1196	{
   1197		/* setup foreground task tree */
   1198		static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
   1199			{ DSP_SPOS_DC_DC,
   1200			  DSP_SPOS_DC_DC,
   1201			  DSP_SPOS_DC_DC,
   1202			  DSP_SPOS_DC, DSP_SPOS_DC,
   1203			  DSP_SPOS_DC, DSP_SPOS_DC,
   1204			  DSP_SPOS_DC_DC,
   1205			  DSP_SPOS_DC_DC,
   1206			  DSP_SPOS_DC_DC,
   1207			  DSP_SPOS_DC,DSP_SPOS_DC },
   1208    
   1209			{
   1210				NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
   1211				0,
   1212				BG_TREE_SCB_ADDR + TCBData,
   1213			},
   1214
   1215			{    
   1216				9999,0,
   1217				0,1,
   1218				0,SPOSCB_ADDR + HFGFlags,
   1219				0,0,
   1220				BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
   1221			},
   1222
   1223			{
   1224				DSP_SPOS_DC,0,
   1225				DSP_SPOS_DC,DSP_SPOS_DC,
   1226				DSP_SPOS_DC,DSP_SPOS_DC,
   1227				DSP_SPOS_DC,DSP_SPOS_DC,
   1228				DSP_SPOS_DC,DSP_SPOS_DC,
   1229				DSP_SPOS_DCDC,
   1230				DSP_SPOS_UU,1,
   1231				DSP_SPOS_DCDC,
   1232				DSP_SPOS_DCDC,
   1233				DSP_SPOS_DCDC,
   1234				DSP_SPOS_DCDC,
   1235				DSP_SPOS_DCDC,
   1236				DSP_SPOS_DCDC,
   1237				DSP_SPOS_DCDC,
   1238				DSP_SPOS_DCDC,
   1239				DSP_SPOS_DCDC,
   1240				DSP_SPOS_DCDC,
   1241				DSP_SPOS_DCDC,
   1242				DSP_SPOS_DCDC,
   1243				DSP_SPOS_DCDC,
   1244				DSP_SPOS_DCDC,
   1245				DSP_SPOS_DCDC,
   1246				DSP_SPOS_DCDC,
   1247				DSP_SPOS_DCDC,
   1248				DSP_SPOS_DCDC,
   1249				DSP_SPOS_DCDC,
   1250				DSP_SPOS_DCDC,
   1251				DSP_SPOS_DCDC,
   1252				DSP_SPOS_DCDC,
   1253				DSP_SPOS_DCDC,
   1254				DSP_SPOS_DCDC,
   1255				DSP_SPOS_DCDC,
   1256				DSP_SPOS_DCDC,
   1257				DSP_SPOS_DCDC,
   1258				DSP_SPOS_DCDC 
   1259			},                                               
   1260			{ 
   1261				BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
   1262				0,0
   1263			}
   1264		};
   1265
   1266		bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
   1267		bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
   1268		cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
   1269	}
   1270
   1271	/* create timing master SCB */
   1272	timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
   1273
   1274	/* create the CODEC output task */
   1275	codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
   1276							MASTERMIX_SCB_ADDR,
   1277							CODECOUT_SCB_ADDR,timing_master_scb,
   1278							SCB_ON_PARENT_SUBLIST_SCB);
   1279
   1280	if (!codec_out_scb) goto _fail_end;
   1281	/* create the master mix SCB */
   1282	master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
   1283							MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
   1284							codec_out_scb,
   1285							SCB_ON_PARENT_SUBLIST_SCB);
   1286	ins->master_mix_scb = master_mix_scb;
   1287
   1288	if (!master_mix_scb) goto _fail_end;
   1289
   1290	/* create codec in */
   1291	codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
   1292						      CODEC_INPUT_BUF1,
   1293						      CODECIN_SCB_ADDR,codec_out_scb,
   1294						      SCB_ON_PARENT_NEXT_SCB);
   1295	if (!codec_in_scb) goto _fail_end;
   1296	ins->codec_in_scb = codec_in_scb;
   1297
   1298	/* create write back scb */
   1299	write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
   1300							      WRITE_BACK_BUF1,WRITE_BACK_SPB,
   1301							      WRITEBACK_SCB_ADDR,
   1302							      timing_master_scb,
   1303							      SCB_ON_PARENT_NEXT_SCB);
   1304	if (!write_back_scb) goto _fail_end;
   1305
   1306	{
   1307		static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
   1308			0x00020000,
   1309			0x0000ffff
   1310		};
   1311    
   1312		if (!cs46xx_dsp_create_task_tree(chip, NULL,
   1313						 (u32 *)&mix2_ostream_spb,
   1314						 WRITE_BACK_SPB, 2))
   1315			goto _fail_end;
   1316	}
   1317
   1318	/* input sample converter */
   1319	vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
   1320								VARI_DECIMATE_BUF0,
   1321								VARI_DECIMATE_BUF1,
   1322								VARIDECIMATE_SCB_ADDR,
   1323								write_back_scb,
   1324								SCB_ON_PARENT_SUBLIST_SCB);
   1325	if (!vari_decimate_scb) goto _fail_end;
   1326
   1327	/* create the record mixer SCB */
   1328	record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
   1329							MIX_SAMPLE_BUF2,
   1330							RECORD_MIXER_SCB_ADDR,
   1331							vari_decimate_scb,
   1332							SCB_ON_PARENT_SUBLIST_SCB);
   1333	ins->record_mixer_scb = record_mix_scb;
   1334
   1335	if (!record_mix_scb) goto _fail_end;
   1336
   1337	valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
   1338
   1339	if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
   1340		goto _fail_end;
   1341
   1342	if (chip->nr_ac97_codecs == 1) {
   1343		/* output on slot 5 and 11 
   1344		   on primary CODEC */
   1345		fifo_addr = 0x20;
   1346		fifo_span = 0x60;
   1347
   1348		/* enable slot 5 and 11 */
   1349		valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
   1350	} else {
   1351		/* output on slot 7 and 8 
   1352		   on secondary CODEC */
   1353		fifo_addr = 0x40;
   1354		fifo_span = 0x10;
   1355
   1356		/* enable slot 7 and 8 */
   1357		valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
   1358	}
   1359	/* create CODEC tasklet for rear speakers output*/
   1360	rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
   1361							     REAR_MIXER_SCB_ADDR,
   1362							     REAR_CODECOUT_SCB_ADDR,codec_in_scb,
   1363							     SCB_ON_PARENT_NEXT_SCB);
   1364	if (!rear_codec_out_scb) goto _fail_end;
   1365	
   1366	
   1367	/* create the rear PCM channel  mixer SCB */
   1368	rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
   1369						      MIX_SAMPLE_BUF3,
   1370						      REAR_MIXER_SCB_ADDR,
   1371						      rear_codec_out_scb,
   1372						      SCB_ON_PARENT_SUBLIST_SCB);
   1373	ins->rear_mix_scb = rear_mix_scb;
   1374	if (!rear_mix_scb) goto _fail_end;
   1375	
   1376	if (chip->nr_ac97_codecs == 2) {
   1377		/* create CODEC tasklet for rear Center/LFE output 
   1378		   slot 6 and 9 on secondary CODEC */
   1379		clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
   1380								     CLFE_MIXER_SCB_ADDR,
   1381								     CLFE_CODEC_SCB_ADDR,
   1382								     rear_codec_out_scb,
   1383								     SCB_ON_PARENT_NEXT_SCB);
   1384		if (!clfe_codec_out_scb) goto _fail_end;
   1385		
   1386		
   1387		/* create the rear PCM channel  mixer SCB */
   1388		ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
   1389									 MIX_SAMPLE_BUF4,
   1390									 CLFE_MIXER_SCB_ADDR,
   1391									 clfe_codec_out_scb,
   1392									 SCB_ON_PARENT_SUBLIST_SCB);
   1393		if (!ins->center_lfe_mix_scb) goto _fail_end;
   1394
   1395		/* enable slot 6 and 9 */
   1396		valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
   1397	} else {
   1398		clfe_codec_out_scb = rear_codec_out_scb;
   1399		ins->center_lfe_mix_scb = rear_mix_scb;
   1400	}
   1401
   1402	/* enable slots depending on CODEC configuration */
   1403	snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
   1404
   1405	/* the magic snooper */
   1406	magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
   1407							     OUTPUT_SNOOP_BUFFER,
   1408							     codec_out_scb,
   1409							     clfe_codec_out_scb,
   1410							     SCB_ON_PARENT_NEXT_SCB);
   1411
   1412    
   1413	if (!magic_snoop_scb) goto _fail_end;
   1414	ins->ref_snoop_scb = magic_snoop_scb;
   1415
   1416	/* SP IO access */
   1417	if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
   1418					      magic_snoop_scb,
   1419					      SCB_ON_PARENT_NEXT_SCB))
   1420		goto _fail_end;
   1421
   1422	/* SPDIF input sampel rate converter */
   1423	src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
   1424						      ins->spdif_in_sample_rate,
   1425						      SRC_OUTPUT_BUF1,
   1426						      SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
   1427						      master_mix_scb,
   1428						      SCB_ON_PARENT_SUBLIST_SCB,1);
   1429
   1430	if (!src_task_scb) goto _fail_end;
   1431	cs46xx_src_unlink(chip,src_task_scb);
   1432
   1433	/* NOTE: when we now how to detect the SPDIF input
   1434	   sample rate we will use this SRC to adjust it */
   1435	ins->spdif_in_src = src_task_scb;
   1436
   1437	cs46xx_dsp_async_init(chip,timing_master_scb);
   1438	return 0;
   1439
   1440 _fail_end:
   1441	dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n");
   1442	return -EINVAL;
   1443}
   1444
   1445static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
   1446				  struct dsp_scb_descriptor * fg_entry)
   1447{
   1448	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1449	struct dsp_symbol_entry * s16_async_codec_input_task;
   1450	struct dsp_symbol_entry * spdifo_task;
   1451	struct dsp_symbol_entry * spdifi_task;
   1452	struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
   1453
   1454	s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
   1455	if (s16_async_codec_input_task == NULL) {
   1456		dev_err(chip->card->dev,
   1457			"dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
   1458		return -EIO;
   1459	}
   1460	spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
   1461	if (spdifo_task == NULL) {
   1462		dev_err(chip->card->dev,
   1463			"dsp_spos: symbol SPDIFOTASK not found\n");
   1464		return -EIO;
   1465	}
   1466
   1467	spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
   1468	if (spdifi_task == NULL) {
   1469		dev_err(chip->card->dev,
   1470			"dsp_spos: symbol SPDIFITASK not found\n");
   1471		return -EIO;
   1472	}
   1473
   1474	{
   1475		/* 0xBC0 */
   1476		struct dsp_spdifoscb spdifo_scb = {
   1477			/* 0 */ DSP_SPOS_UUUU,
   1478			{
   1479				/* 1 */ 0xb0, 
   1480				/* 2 */ 0, 
   1481				/* 3 */ 0, 
   1482				/* 4 */ 0, 
   1483			},
   1484			/* NOTE: the SPDIF output task read samples in mono
   1485			   format, the AsynchFGTxSCB task writes to buffer
   1486			   in stereo format
   1487			*/
   1488			/* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
   1489			/* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
   1490			/* 7 */ 0,0, 
   1491			/* 8 */ 0, 
   1492			/* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, 
   1493			/* A */ spdifo_task->address,
   1494			SPDIFO_SCB_INST + SPDIFOFIFOPointer,
   1495			{
   1496				/* B */ 0x0040, /*DSP_SPOS_UUUU,*/
   1497				/* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
   1498			},
   1499			/* D */ 0x804c,0,							  /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
   1500			/* E */ 0x0108,0x0001,					  /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
   1501			/* F */ DSP_SPOS_UUUU	  			          /* SPDIFOFree; */
   1502		};
   1503
   1504		/* 0xBB0 */
   1505		struct dsp_spdifiscb spdifi_scb = {
   1506			/* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
   1507			/* 1 */ 0,
   1508			/* 2 */ 0,
   1509			/* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */ 
   1510			/* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
   1511			/* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
   1512			/* 6 */ DSP_SPOS_UUUU,  /* Free3 */
   1513			/* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
   1514			/* 8 */ DSP_SPOS_UUUU,	/* TempStatus */
   1515			/* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
   1516			/* A */ spdifi_task->address,
   1517			SPDIFI_SCB_INST + SPDIFIFIFOPointer,
   1518			/* NOTE: The SPDIF input task write the sample in mono
   1519			   format from the HW FIFO, the AsynchFGRxSCB task  reads 
   1520			   them in stereo 
   1521			*/
   1522			/* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
   1523			/* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
   1524			/* D */ 0x8048,0,
   1525			/* E */ 0x01f0,0x0001,
   1526			/* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
   1527		};
   1528
   1529		/* 0xBA0 */
   1530		struct dsp_async_codec_input_scb async_codec_input_scb = {
   1531			/* 0 */ DSP_SPOS_UUUU,
   1532			/* 1 */ 0,
   1533			/* 2 */ 0,
   1534			/* 3 */ 1,4000,
   1535			/* 4 */ 0x0118,0x0001,
   1536			/* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
   1537			/* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
   1538			/* 7 */ DSP_SPOS_UU,0x3,
   1539			/* 8 */ DSP_SPOS_UUUU,
   1540			/* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
   1541			/* A */ s16_async_codec_input_task->address,
   1542			HFG_TREE_SCB + AsyncCIOFIFOPointer,
   1543              
   1544			/* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
   1545			/* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
   1546      
   1547#ifdef UseASER1Input
   1548			/* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;	       
   1549			   Init. 0000:8042: for ASER1
   1550			   0000:8044: for ASER2 */
   1551			/* D */ 0x8042,0,
   1552      
   1553			/* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
   1554			   Init 1 stero:8050 ASER1
   1555			   Init 0  mono:8070 ASER2
   1556			   Init 1 Stereo : 0100 ASER1 (Set by script) */
   1557			/* E */ 0x0100,0x0001,
   1558      
   1559#endif
   1560      
   1561#ifdef UseASER2Input
   1562			/* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
   1563			   Init. 0000:8042: for ASER1
   1564			   0000:8044: for ASER2 */
   1565			/* D */ 0x8044,0,
   1566      
   1567			/* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
   1568			   Init 1 stero:8050 ASER1
   1569			   Init 0  mono:8070 ASER2
   1570			   Init 1 Stereo : 0100 ASER1 (Set by script) */
   1571			/* E */ 0x0110,0x0001,
   1572      
   1573#endif
   1574      
   1575			/* short AsyncCIOutputBufModulo:AsyncCIFree;
   1576			   AsyncCIOutputBufModulo: The modulo size for   
   1577			   the output buffer of this task */
   1578			/* F */ 0, /* DSP_SPOS_UUUU */
   1579		};
   1580
   1581		spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
   1582
   1583		if (snd_BUG_ON(!spdifo_scb_desc))
   1584			return -EIO;
   1585		spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
   1586		if (snd_BUG_ON(!spdifi_scb_desc))
   1587			return -EIO;
   1588		async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
   1589		if (snd_BUG_ON(!async_codec_scb_desc))
   1590			return -EIO;
   1591
   1592		async_codec_scb_desc->parent_scb_ptr = NULL;
   1593		async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
   1594		async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
   1595		async_codec_scb_desc->task_entry = s16_async_codec_input_task;
   1596
   1597		spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
   1598		spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
   1599		spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
   1600		spdifi_scb_desc->task_entry = spdifi_task;
   1601
   1602		spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
   1603		spdifo_scb_desc->next_scb_ptr = fg_entry;
   1604		spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
   1605		spdifo_scb_desc->task_entry = spdifo_task;
   1606
   1607		/* this one is faked, as the parnet of SPDIFO task
   1608		   is the FG task tree */
   1609		fg_entry->parent_scb_ptr = spdifo_scb_desc;
   1610
   1611		/* for proc fs */
   1612		cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
   1613		cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
   1614		cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
   1615
   1616		/* Async MASTER ENABLE, affects both SPDIF input and output */
   1617		snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
   1618	}
   1619
   1620	return 0;
   1621}
   1622
   1623static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
   1624{
   1625	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1626
   1627	/* set SPDIF output FIFO slot */
   1628	snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
   1629
   1630	/* SPDIF output MASTER ENABLE */
   1631	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
   1632
   1633	/* right and left validate bit */
   1634	/*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
   1635	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
   1636
   1637	/* clear fifo pointer */
   1638	cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
   1639
   1640	/* monitor state */
   1641	ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
   1642}
   1643
   1644int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
   1645{
   1646	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1647
   1648	/* if hw-ctrl already enabled, turn off to reset logic ... */
   1649	cs46xx_dsp_disable_spdif_hw (chip);
   1650	udelay(50);
   1651
   1652	/* set SPDIF output FIFO slot */
   1653	snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
   1654
   1655	/* SPDIF output MASTER ENABLE */
   1656	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
   1657
   1658	/* right and left validate bit */
   1659	cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
   1660
   1661	/* monitor state */
   1662	ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
   1663
   1664	return 0;
   1665}
   1666
   1667int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
   1668{
   1669	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1670
   1671	/* turn on amplifier */
   1672	chip->active_ctrl(chip, 1);
   1673	chip->amplifier_ctrl(chip, 1);
   1674
   1675	if (snd_BUG_ON(ins->asynch_rx_scb))
   1676		return -EINVAL;
   1677	if (snd_BUG_ON(!ins->spdif_in_src))
   1678		return -EINVAL;
   1679
   1680	mutex_lock(&chip->spos_mutex);
   1681
   1682	if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
   1683		/* time countdown enable */
   1684		cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
   1685		/* NOTE: 80000005 value is just magic. With all values
   1686		   that I've tested this one seem to give the best result.
   1687		   Got no explication why. (Benny) */
   1688
   1689		/* SPDIF input MASTER ENABLE */
   1690		cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
   1691
   1692		ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
   1693	}
   1694
   1695	/* create and start the asynchronous receiver SCB */
   1696	ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
   1697								ASYNCRX_SCB_ADDR,
   1698								SPDIFI_SCB_INST,
   1699								SPDIFI_IP_OUTPUT_BUFFER1,
   1700								ins->spdif_in_src,
   1701								SCB_ON_PARENT_SUBLIST_SCB);
   1702
   1703	spin_lock_irq(&chip->reg_lock);
   1704
   1705	/* reset SPDIF input sample buffer pointer */
   1706	/*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
   1707	  (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
   1708
   1709	/* reset FIFO ptr */
   1710	/*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
   1711	cs46xx_src_link(chip,ins->spdif_in_src);
   1712
   1713	/* unmute SRC volume */
   1714	cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
   1715
   1716	spin_unlock_irq(&chip->reg_lock);
   1717
   1718	/* set SPDIF input sample rate and unmute
   1719	   NOTE: only 48khz support for SPDIF input this time */
   1720	/* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
   1721
   1722	/* monitor state */
   1723	ins->spdif_status_in = 1;
   1724	mutex_unlock(&chip->spos_mutex);
   1725
   1726	return 0;
   1727}
   1728
   1729int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
   1730{
   1731	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1732
   1733	if (snd_BUG_ON(!ins->asynch_rx_scb))
   1734		return -EINVAL;
   1735	if (snd_BUG_ON(!ins->spdif_in_src))
   1736		return -EINVAL;
   1737
   1738	mutex_lock(&chip->spos_mutex);
   1739
   1740	/* Remove the asynchronous receiver SCB */
   1741	cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
   1742	ins->asynch_rx_scb = NULL;
   1743
   1744	cs46xx_src_unlink(chip,ins->spdif_in_src);
   1745
   1746	/* monitor state */
   1747	ins->spdif_status_in = 0;
   1748	mutex_unlock(&chip->spos_mutex);
   1749
   1750	/* restore amplifier */
   1751	chip->active_ctrl(chip, -1);
   1752	chip->amplifier_ctrl(chip, -1);
   1753
   1754	return 0;
   1755}
   1756
   1757int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
   1758{
   1759	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1760
   1761	if (snd_BUG_ON(ins->pcm_input))
   1762		return -EINVAL;
   1763	if (snd_BUG_ON(!ins->ref_snoop_scb))
   1764		return -EINVAL;
   1765
   1766	mutex_lock(&chip->spos_mutex);
   1767	ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
   1768                                                  "PCMSerialInput_Wave");
   1769	mutex_unlock(&chip->spos_mutex);
   1770
   1771	return 0;
   1772}
   1773
   1774int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
   1775{
   1776	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1777
   1778	if (snd_BUG_ON(!ins->pcm_input))
   1779		return -EINVAL;
   1780
   1781	mutex_lock(&chip->spos_mutex);
   1782	cs46xx_dsp_remove_scb (chip,ins->pcm_input);
   1783	ins->pcm_input = NULL;
   1784	mutex_unlock(&chip->spos_mutex);
   1785
   1786	return 0;
   1787}
   1788
   1789int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
   1790{
   1791	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1792
   1793	if (snd_BUG_ON(ins->adc_input))
   1794		return -EINVAL;
   1795	if (snd_BUG_ON(!ins->codec_in_scb))
   1796		return -EINVAL;
   1797
   1798	mutex_lock(&chip->spos_mutex);
   1799	ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
   1800						  "PCMSerialInput_ADC");
   1801	mutex_unlock(&chip->spos_mutex);
   1802
   1803	return 0;
   1804}
   1805
   1806int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
   1807{
   1808	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1809
   1810	if (snd_BUG_ON(!ins->adc_input))
   1811		return -EINVAL;
   1812
   1813	mutex_lock(&chip->spos_mutex);
   1814	cs46xx_dsp_remove_scb (chip,ins->adc_input);
   1815	ins->adc_input = NULL;
   1816	mutex_unlock(&chip->spos_mutex);
   1817
   1818	return 0;
   1819}
   1820
   1821int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
   1822{
   1823	u32 temp;
   1824	int  i;
   1825
   1826	/* santiy check the parameters.  (These numbers are not 100% correct.  They are
   1827	   a rough guess from looking at the controller spec.) */
   1828	if (address < 0x8000 || address >= 0x9000)
   1829		return -EINVAL;
   1830        
   1831	/* initialize the SP_IO_WRITE SCB with the data. */
   1832	temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
   1833
   1834	snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
   1835	snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
   1836	snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
   1837    
   1838	/* Poke this location to tell the task to start */
   1839	snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
   1840
   1841	/* Verify that the task ran */
   1842	for (i=0; i<25; i++) {
   1843		udelay(125);
   1844
   1845		temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
   1846		if (temp == 0x00000000)
   1847			break;
   1848	}
   1849
   1850	if (i == 25) {
   1851		dev_err(chip->card->dev,
   1852			"dsp_spos: SPIOWriteTask not responding\n");
   1853		return -EBUSY;
   1854	}
   1855
   1856	return 0;
   1857}
   1858
   1859int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
   1860{
   1861	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1862	struct dsp_scb_descriptor * scb; 
   1863
   1864	mutex_lock(&chip->spos_mutex);
   1865	
   1866	/* main output */
   1867	scb = ins->master_mix_scb->sub_list_ptr;
   1868	while (scb != ins->the_null_scb) {
   1869		cs46xx_dsp_scb_set_volume (chip,scb,left,right);
   1870		scb = scb->next_scb_ptr;
   1871	}
   1872
   1873	/* rear output */
   1874	scb = ins->rear_mix_scb->sub_list_ptr;
   1875	while (scb != ins->the_null_scb) {
   1876		cs46xx_dsp_scb_set_volume (chip,scb,left,right);
   1877		scb = scb->next_scb_ptr;
   1878	}
   1879
   1880	ins->dac_volume_left = left;
   1881	ins->dac_volume_right = right;
   1882
   1883	mutex_unlock(&chip->spos_mutex);
   1884
   1885	return 0;
   1886}
   1887
   1888int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
   1889{
   1890	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1891
   1892	mutex_lock(&chip->spos_mutex);
   1893
   1894	if (ins->asynch_rx_scb != NULL)
   1895		cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
   1896					   left,right);
   1897
   1898	ins->spdif_input_volume_left = left;
   1899	ins->spdif_input_volume_right = right;
   1900
   1901	mutex_unlock(&chip->spos_mutex);
   1902
   1903	return 0;
   1904}
   1905
   1906#ifdef CONFIG_PM_SLEEP
   1907int cs46xx_dsp_resume(struct snd_cs46xx * chip)
   1908{
   1909	struct dsp_spos_instance * ins = chip->dsp_spos_instance;
   1910	int i, err;
   1911
   1912	/* clear parameter, sample and code areas */
   1913	snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
   1914			     DSP_PARAMETER_BYTE_SIZE);
   1915	snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
   1916			     DSP_SAMPLE_BYTE_SIZE);
   1917	snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
   1918
   1919	for (i = 0; i < ins->nmodules; i++) {
   1920		struct dsp_module_desc *module = &ins->modules[i];
   1921		struct dsp_segment_desc *seg;
   1922		u32 doffset, dsize;
   1923
   1924		seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
   1925		err = dsp_load_parameter(chip, seg);
   1926		if (err < 0)
   1927			return err;
   1928
   1929		seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
   1930		err = dsp_load_sample(chip, seg);
   1931		if (err < 0)
   1932			return err;
   1933
   1934		seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
   1935		if (!seg)
   1936			continue;
   1937
   1938		doffset = seg->offset * 4 + module->load_address * 4
   1939			+ DSP_CODE_BYTE_OFFSET;
   1940		dsize   = seg->size * 4;
   1941		err = snd_cs46xx_download(chip,
   1942					  ins->code.data + module->load_address,
   1943					  doffset, dsize);
   1944		if (err < 0)
   1945			return err;
   1946	}
   1947
   1948	for (i = 0; i < ins->ntask; i++) {
   1949		struct dsp_task_descriptor *t = &ins->tasks[i];
   1950		_dsp_create_task_tree(chip, t->data, t->address, t->size);
   1951	}
   1952
   1953	for (i = 0; i < ins->nscb; i++) {
   1954		struct dsp_scb_descriptor *s = &ins->scbs[i];
   1955		if (s->deleted)
   1956			continue;
   1957		_dsp_create_scb(chip, s->data, s->address);
   1958	}
   1959	for (i = 0; i < ins->nscb; i++) {
   1960		struct dsp_scb_descriptor *s = &ins->scbs[i];
   1961		if (s->deleted)
   1962			continue;
   1963		if (s->updated)
   1964			cs46xx_dsp_spos_update_scb(chip, s);
   1965		if (s->volume_set)
   1966			cs46xx_dsp_scb_set_volume(chip, s,
   1967						  s->volume[0], s->volume[1]);
   1968	}
   1969	if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
   1970		cs46xx_dsp_enable_spdif_hw(chip);
   1971		snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
   1972				(OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
   1973		if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
   1974			cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
   1975					    ins->spdif_csuv_stream);
   1976	}
   1977	if (chip->dsp_spos_instance->spdif_status_in) {
   1978		cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
   1979		cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
   1980	}
   1981	return 0;
   1982}
   1983#endif