cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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ice1712.c (81505B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 *   ALSA driver for ICEnsemble ICE1712 (Envy24)
      4 *
      5 *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
      6 */
      7
      8/*
      9  NOTES:
     10  - spdif nonaudio consumer mode does not work (at least with my
     11    Sony STR-DB830)
     12*/
     13
     14/*
     15 * Changes:
     16 *
     17 *  2002.09.09	Takashi Iwai <tiwai@suse.de>
     18 *	split the code to several files.  each low-level routine
     19 *	is stored in the local file and called from registration
     20 *	function from card_info struct.
     21 *
     22 *  2002.11.26	James Stafford <jstafford@ampltd.com>
     23 *	Added support for VT1724 (Envy24HT)
     24 *	I have left out support for 176.4 and 192 KHz for the moment.
     25 *  I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
     26 *
     27 *  2003.02.20  Taksahi Iwai <tiwai@suse.de>
     28 *	Split vt1724 part to an independent driver.
     29 *	The GPIO is accessed through the callback functions now.
     30 *
     31 * 2004.03.31 Doug McLain <nostar@comcast.net>
     32 *    Added support for Event Electronics EZ8 card to hoontech.c.
     33 */
     34
     35
     36#include <linux/delay.h>
     37#include <linux/interrupt.h>
     38#include <linux/init.h>
     39#include <linux/pci.h>
     40#include <linux/dma-mapping.h>
     41#include <linux/slab.h>
     42#include <linux/module.h>
     43#include <linux/mutex.h>
     44
     45#include <sound/core.h>
     46#include <sound/cs8427.h>
     47#include <sound/info.h>
     48#include <sound/initval.h>
     49#include <sound/tlv.h>
     50
     51#include <sound/asoundef.h>
     52
     53#include "ice1712.h"
     54
     55/* lowlevel routines */
     56#include "delta.h"
     57#include "ews.h"
     58#include "hoontech.h"
     59
     60MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
     61MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
     62MODULE_LICENSE("GPL");
     63
     64static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
     65static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
     66static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
     67static char *model[SNDRV_CARDS];
     68static bool omni[SNDRV_CARDS];				/* Delta44 & 66 Omni I/O support */
     69static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
     70static int dxr_enable[SNDRV_CARDS];			/* DXR enable for DMX6FIRE */
     71
     72module_param_array(index, int, NULL, 0444);
     73MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
     74module_param_array(id, charp, NULL, 0444);
     75MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
     76module_param_array(enable, bool, NULL, 0444);
     77MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
     78module_param_array(omni, bool, NULL, 0444);
     79MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
     80module_param_array(cs8427_timeout, int, NULL, 0444);
     81MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
     82module_param_array(model, charp, NULL, 0444);
     83MODULE_PARM_DESC(model, "Use the given board model.");
     84module_param_array(dxr_enable, int, NULL, 0444);
     85MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
     86
     87
     88static const struct pci_device_id snd_ice1712_ids[] = {
     89	{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 },   /* ICE1712 */
     90	{ 0, }
     91};
     92
     93MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
     94
     95static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
     96static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
     97
     98static int PRO_RATE_LOCKED;
     99static int PRO_RATE_RESET = 1;
    100static unsigned int PRO_RATE_DEFAULT = 44100;
    101
    102/*
    103 *  Basic I/O
    104 */
    105
    106/* check whether the clock mode is spdif-in */
    107static inline int is_spdif_master(struct snd_ice1712 *ice)
    108{
    109	return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
    110}
    111
    112static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
    113{
    114	return is_spdif_master(ice) || PRO_RATE_LOCKED;
    115}
    116
    117static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
    118{
    119	outb((channel << 4) | addr, ICEDS(ice, INDEX));
    120	outl(data, ICEDS(ice, DATA));
    121}
    122
    123static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
    124{
    125	outb((channel << 4) | addr, ICEDS(ice, INDEX));
    126	return inl(ICEDS(ice, DATA));
    127}
    128
    129static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
    130				   unsigned short reg,
    131				   unsigned short val)
    132{
    133	struct snd_ice1712 *ice = ac97->private_data;
    134	int tm;
    135	unsigned char old_cmd = 0;
    136
    137	for (tm = 0; tm < 0x10000; tm++) {
    138		old_cmd = inb(ICEREG(ice, AC97_CMD));
    139		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
    140			continue;
    141		if (!(old_cmd & ICE1712_AC97_READY))
    142			continue;
    143		break;
    144	}
    145	outb(reg, ICEREG(ice, AC97_INDEX));
    146	outw(val, ICEREG(ice, AC97_DATA));
    147	old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
    148	outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
    149	for (tm = 0; tm < 0x10000; tm++)
    150		if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
    151			break;
    152}
    153
    154static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
    155					    unsigned short reg)
    156{
    157	struct snd_ice1712 *ice = ac97->private_data;
    158	int tm;
    159	unsigned char old_cmd = 0;
    160
    161	for (tm = 0; tm < 0x10000; tm++) {
    162		old_cmd = inb(ICEREG(ice, AC97_CMD));
    163		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
    164			continue;
    165		if (!(old_cmd & ICE1712_AC97_READY))
    166			continue;
    167		break;
    168	}
    169	outb(reg, ICEREG(ice, AC97_INDEX));
    170	outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
    171	for (tm = 0; tm < 0x10000; tm++)
    172		if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
    173			break;
    174	if (tm >= 0x10000)		/* timeout */
    175		return ~0;
    176	return inw(ICEREG(ice, AC97_DATA));
    177}
    178
    179/*
    180 * pro ac97 section
    181 */
    182
    183static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
    184				       unsigned short reg,
    185				       unsigned short val)
    186{
    187	struct snd_ice1712 *ice = ac97->private_data;
    188	int tm;
    189	unsigned char old_cmd = 0;
    190
    191	for (tm = 0; tm < 0x10000; tm++) {
    192		old_cmd = inb(ICEMT(ice, AC97_CMD));
    193		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
    194			continue;
    195		if (!(old_cmd & ICE1712_AC97_READY))
    196			continue;
    197		break;
    198	}
    199	outb(reg, ICEMT(ice, AC97_INDEX));
    200	outw(val, ICEMT(ice, AC97_DATA));
    201	old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
    202	outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
    203	for (tm = 0; tm < 0x10000; tm++)
    204		if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
    205			break;
    206}
    207
    208
    209static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
    210						unsigned short reg)
    211{
    212	struct snd_ice1712 *ice = ac97->private_data;
    213	int tm;
    214	unsigned char old_cmd = 0;
    215
    216	for (tm = 0; tm < 0x10000; tm++) {
    217		old_cmd = inb(ICEMT(ice, AC97_CMD));
    218		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
    219			continue;
    220		if (!(old_cmd & ICE1712_AC97_READY))
    221			continue;
    222		break;
    223	}
    224	outb(reg, ICEMT(ice, AC97_INDEX));
    225	outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
    226	for (tm = 0; tm < 0x10000; tm++)
    227		if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
    228			break;
    229	if (tm >= 0x10000)		/* timeout */
    230		return ~0;
    231	return inw(ICEMT(ice, AC97_DATA));
    232}
    233
    234/*
    235 * consumer ac97 digital mix
    236 */
    237#define snd_ice1712_digmix_route_ac97_info	snd_ctl_boolean_mono_info
    238
    239static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
    240{
    241	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
    242
    243	ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
    244	return 0;
    245}
    246
    247static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
    248{
    249	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
    250	unsigned char val, nval;
    251
    252	spin_lock_irq(&ice->reg_lock);
    253	val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
    254	nval = val & ~ICE1712_ROUTE_AC97;
    255	if (ucontrol->value.integer.value[0])
    256		nval |= ICE1712_ROUTE_AC97;
    257	outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
    258	spin_unlock_irq(&ice->reg_lock);
    259	return val != nval;
    260}
    261
    262static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
    263	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
    264	.name = "Digital Mixer To AC97",
    265	.info = snd_ice1712_digmix_route_ac97_info,
    266	.get = snd_ice1712_digmix_route_ac97_get,
    267	.put = snd_ice1712_digmix_route_ac97_put,
    268};
    269
    270
    271/*
    272 * gpio operations
    273 */
    274static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
    275{
    276	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
    277	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
    278}
    279
    280static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
    281{
    282	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
    283}
    284
    285static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
    286{
    287	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
    288}
    289
    290static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
    291{
    292	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
    293	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
    294}
    295
    296static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
    297{
    298	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
    299}
    300
    301static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
    302{
    303	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
    304	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
    305}
    306
    307/*
    308 *
    309 * CS8427 interface
    310 *
    311 */
    312
    313/*
    314 * change the input clock selection
    315 * spdif_clock = 1 - IEC958 input, 0 - Envy24
    316 */
    317static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
    318{
    319	unsigned char reg[2] = { 0x80 | 4, 0 };   /* CS8427 auto increment | register number 4 + data */
    320	unsigned char val, nval;
    321	int res = 0;
    322
    323	snd_i2c_lock(ice->i2c);
    324	if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
    325		snd_i2c_unlock(ice->i2c);
    326		return -EIO;
    327	}
    328	if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
    329		snd_i2c_unlock(ice->i2c);
    330		return -EIO;
    331	}
    332	nval = val & 0xf0;
    333	if (spdif_clock)
    334		nval |= 0x01;
    335	else
    336		nval |= 0x04;
    337	if (val != nval) {
    338		reg[1] = nval;
    339		if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
    340			res = -EIO;
    341		} else {
    342			res++;
    343		}
    344	}
    345	snd_i2c_unlock(ice->i2c);
    346	return res;
    347}
    348
    349/*
    350 * spdif callbacks
    351 */
    352static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
    353{
    354	snd_cs8427_iec958_active(ice->cs8427, 1);
    355}
    356
    357static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
    358{
    359	snd_cs8427_iec958_active(ice->cs8427, 0);
    360}
    361
    362static void setup_cs8427(struct snd_ice1712 *ice, int rate)
    363{
    364	snd_cs8427_iec958_pcm(ice->cs8427, rate);
    365}
    366
    367/*
    368 * create and initialize callbacks for cs8427 interface
    369 */
    370int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
    371{
    372	int err;
    373
    374	err = snd_cs8427_create(ice->i2c, addr,
    375		(ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
    376	if (err < 0) {
    377		dev_err(ice->card->dev, "CS8427 initialization failed\n");
    378		return err;
    379	}
    380	ice->spdif.ops.open = open_cs8427;
    381	ice->spdif.ops.close = close_cs8427;
    382	ice->spdif.ops.setup_rate = setup_cs8427;
    383	return 0;
    384}
    385
    386static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
    387{
    388	/* change CS8427 clock source too */
    389	if (ice->cs8427)
    390		snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
    391	/* notify ak4524 chip as well */
    392	if (spdif_is_master) {
    393		unsigned int i;
    394		for (i = 0; i < ice->akm_codecs; i++) {
    395			if (ice->akm[i].ops.set_rate_val)
    396				ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
    397		}
    398	}
    399}
    400
    401/*
    402 *  Interrupt handler
    403 */
    404
    405static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
    406{
    407	struct snd_ice1712 *ice = dev_id;
    408	unsigned char status;
    409	int handled = 0;
    410
    411	while (1) {
    412		status = inb(ICEREG(ice, IRQSTAT));
    413		if (status == 0)
    414			break;
    415		handled = 1;
    416		if (status & ICE1712_IRQ_MPU1) {
    417			if (ice->rmidi[0])
    418				snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
    419			outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
    420			status &= ~ICE1712_IRQ_MPU1;
    421		}
    422		if (status & ICE1712_IRQ_TIMER)
    423			outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
    424		if (status & ICE1712_IRQ_MPU2) {
    425			if (ice->rmidi[1])
    426				snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
    427			outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
    428			status &= ~ICE1712_IRQ_MPU2;
    429		}
    430		if (status & ICE1712_IRQ_PROPCM) {
    431			unsigned char mtstat = inb(ICEMT(ice, IRQ));
    432			if (mtstat & ICE1712_MULTI_PBKSTATUS) {
    433				if (ice->playback_pro_substream)
    434					snd_pcm_period_elapsed(ice->playback_pro_substream);
    435				outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
    436			}
    437			if (mtstat & ICE1712_MULTI_CAPSTATUS) {
    438				if (ice->capture_pro_substream)
    439					snd_pcm_period_elapsed(ice->capture_pro_substream);
    440				outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
    441			}
    442		}
    443		if (status & ICE1712_IRQ_FM)
    444			outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
    445		if (status & ICE1712_IRQ_PBKDS) {
    446			u32 idx;
    447			u16 pbkstatus;
    448			struct snd_pcm_substream *substream;
    449			pbkstatus = inw(ICEDS(ice, INTSTAT));
    450			/* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
    451			for (idx = 0; idx < 6; idx++) {
    452				if ((pbkstatus & (3 << (idx * 2))) == 0)
    453					continue;
    454				substream = ice->playback_con_substream_ds[idx];
    455				if (substream != NULL)
    456					snd_pcm_period_elapsed(substream);
    457				outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
    458			}
    459			outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
    460		}
    461		if (status & ICE1712_IRQ_CONCAP) {
    462			if (ice->capture_con_substream)
    463				snd_pcm_period_elapsed(ice->capture_con_substream);
    464			outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
    465		}
    466		if (status & ICE1712_IRQ_CONPBK) {
    467			if (ice->playback_con_substream)
    468				snd_pcm_period_elapsed(ice->playback_con_substream);
    469			outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
    470		}
    471	}
    472	return IRQ_RETVAL(handled);
    473}
    474
    475
    476/*
    477 *  PCM part - consumer I/O
    478 */
    479
    480static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
    481					int cmd)
    482{
    483	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    484	int result = 0;
    485	u32 tmp;
    486
    487	spin_lock(&ice->reg_lock);
    488	tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
    489	if (cmd == SNDRV_PCM_TRIGGER_START) {
    490		tmp |= 1;
    491	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
    492		tmp &= ~1;
    493	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
    494		tmp |= 2;
    495	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
    496		tmp &= ~2;
    497	} else {
    498		result = -EINVAL;
    499	}
    500	snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
    501	spin_unlock(&ice->reg_lock);
    502	return result;
    503}
    504
    505static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
    506					   int cmd)
    507{
    508	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    509	int result = 0;
    510	u32 tmp;
    511
    512	spin_lock(&ice->reg_lock);
    513	tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
    514	if (cmd == SNDRV_PCM_TRIGGER_START) {
    515		tmp |= 1;
    516	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
    517		tmp &= ~1;
    518	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
    519		tmp |= 2;
    520	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
    521		tmp &= ~2;
    522	} else {
    523		result = -EINVAL;
    524	}
    525	snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
    526	spin_unlock(&ice->reg_lock);
    527	return result;
    528}
    529
    530static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
    531				       int cmd)
    532{
    533	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    534	int result = 0;
    535	u8 tmp;
    536
    537	spin_lock(&ice->reg_lock);
    538	tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
    539	if (cmd == SNDRV_PCM_TRIGGER_START) {
    540		tmp |= 1;
    541	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
    542		tmp &= ~1;
    543	} else {
    544		result = -EINVAL;
    545	}
    546	snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
    547	spin_unlock(&ice->reg_lock);
    548	return result;
    549}
    550
    551static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
    552{
    553	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    554	struct snd_pcm_runtime *runtime = substream->runtime;
    555	u32 period_size, buf_size, rate, tmp;
    556
    557	period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
    558	buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
    559	tmp = 0x0000;
    560	if (snd_pcm_format_width(runtime->format) == 16)
    561		tmp |= 0x10;
    562	if (runtime->channels == 2)
    563		tmp |= 0x08;
    564	rate = (runtime->rate * 8192) / 375;
    565	if (rate > 0x000fffff)
    566		rate = 0x000fffff;
    567	spin_lock_irq(&ice->reg_lock);
    568	outb(0, ice->ddma_port + 15);
    569	outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
    570	outl(runtime->dma_addr, ice->ddma_port + 0);
    571	outw(buf_size, ice->ddma_port + 4);
    572	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
    573	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
    574	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
    575	snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
    576	snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
    577	snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
    578	snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
    579	snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
    580	spin_unlock_irq(&ice->reg_lock);
    581	return 0;
    582}
    583
    584static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
    585{
    586	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    587	struct snd_pcm_runtime *runtime = substream->runtime;
    588	u32 period_size, rate, tmp, chn;
    589
    590	period_size = snd_pcm_lib_period_bytes(substream) - 1;
    591	tmp = 0x0064;
    592	if (snd_pcm_format_width(runtime->format) == 16)
    593		tmp &= ~0x04;
    594	if (runtime->channels == 2)
    595		tmp |= 0x08;
    596	rate = (runtime->rate * 8192) / 375;
    597	if (rate > 0x000fffff)
    598		rate = 0x000fffff;
    599	ice->playback_con_active_buf[substream->number] = 0;
    600	ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
    601	chn = substream->number * 2;
    602	spin_lock_irq(&ice->reg_lock);
    603	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
    604	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
    605	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
    606	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
    607	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
    608	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
    609	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
    610	if (runtime->channels == 2) {
    611		snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
    612		snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
    613	}
    614	spin_unlock_irq(&ice->reg_lock);
    615	return 0;
    616}
    617
    618static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
    619{
    620	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    621	struct snd_pcm_runtime *runtime = substream->runtime;
    622	u32 period_size, buf_size;
    623	u8 tmp;
    624
    625	period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
    626	buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
    627	tmp = 0x06;
    628	if (snd_pcm_format_width(runtime->format) == 16)
    629		tmp &= ~0x04;
    630	if (runtime->channels == 2)
    631		tmp &= ~0x02;
    632	spin_lock_irq(&ice->reg_lock);
    633	outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
    634	outw(buf_size, ICEREG(ice, CONCAP_COUNT));
    635	snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
    636	snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
    637	snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
    638	spin_unlock_irq(&ice->reg_lock);
    639	snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
    640	return 0;
    641}
    642
    643static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
    644{
    645	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    646	struct snd_pcm_runtime *runtime = substream->runtime;
    647	size_t ptr;
    648
    649	if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
    650		return 0;
    651	ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
    652	ptr = bytes_to_frames(substream->runtime, ptr);
    653	if (ptr == runtime->buffer_size)
    654		ptr = 0;
    655	return ptr;
    656}
    657
    658static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
    659{
    660	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    661	u8 addr;
    662	size_t ptr;
    663
    664	if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
    665		return 0;
    666	if (ice->playback_con_active_buf[substream->number])
    667		addr = ICE1712_DSC_ADDR1;
    668	else
    669		addr = ICE1712_DSC_ADDR0;
    670	ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
    671		ice->playback_con_virt_addr[substream->number];
    672	ptr = bytes_to_frames(substream->runtime, ptr);
    673	if (ptr == substream->runtime->buffer_size)
    674		ptr = 0;
    675	return ptr;
    676}
    677
    678static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
    679{
    680	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    681	size_t ptr;
    682
    683	if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
    684		return 0;
    685	ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
    686	ptr = bytes_to_frames(substream->runtime, ptr);
    687	if (ptr == substream->runtime->buffer_size)
    688		ptr = 0;
    689	return ptr;
    690}
    691
    692static const struct snd_pcm_hardware snd_ice1712_playback = {
    693	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
    694				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
    695				 SNDRV_PCM_INFO_MMAP_VALID |
    696				 SNDRV_PCM_INFO_PAUSE),
    697	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
    698	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
    699	.rate_min =		4000,
    700	.rate_max =		48000,
    701	.channels_min =		1,
    702	.channels_max =		2,
    703	.buffer_bytes_max =	(64*1024),
    704	.period_bytes_min =	64,
    705	.period_bytes_max =	(64*1024),
    706	.periods_min =		1,
    707	.periods_max =		1024,
    708	.fifo_size =		0,
    709};
    710
    711static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
    712	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
    713				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
    714				 SNDRV_PCM_INFO_MMAP_VALID |
    715				 SNDRV_PCM_INFO_PAUSE),
    716	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
    717	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
    718	.rate_min =		4000,
    719	.rate_max =		48000,
    720	.channels_min =		1,
    721	.channels_max =		2,
    722	.buffer_bytes_max =	(128*1024),
    723	.period_bytes_min =	64,
    724	.period_bytes_max =	(128*1024),
    725	.periods_min =		2,
    726	.periods_max =		2,
    727	.fifo_size =		0,
    728};
    729
    730static const struct snd_pcm_hardware snd_ice1712_capture = {
    731	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
    732				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
    733				 SNDRV_PCM_INFO_MMAP_VALID),
    734	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
    735	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
    736	.rate_min =		4000,
    737	.rate_max =		48000,
    738	.channels_min =		1,
    739	.channels_max =		2,
    740	.buffer_bytes_max =	(64*1024),
    741	.period_bytes_min =	64,
    742	.period_bytes_max =	(64*1024),
    743	.periods_min =		1,
    744	.periods_max =		1024,
    745	.fifo_size =		0,
    746};
    747
    748static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
    749{
    750	struct snd_pcm_runtime *runtime = substream->runtime;
    751	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    752
    753	ice->playback_con_substream = substream;
    754	runtime->hw = snd_ice1712_playback;
    755	return 0;
    756}
    757
    758static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
    759{
    760	struct snd_pcm_runtime *runtime = substream->runtime;
    761	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    762	u32 tmp;
    763
    764	ice->playback_con_substream_ds[substream->number] = substream;
    765	runtime->hw = snd_ice1712_playback_ds;
    766	spin_lock_irq(&ice->reg_lock);
    767	tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
    768	outw(tmp, ICEDS(ice, INTMASK));
    769	spin_unlock_irq(&ice->reg_lock);
    770	return 0;
    771}
    772
    773static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
    774{
    775	struct snd_pcm_runtime *runtime = substream->runtime;
    776	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    777
    778	ice->capture_con_substream = substream;
    779	runtime->hw = snd_ice1712_capture;
    780	runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
    781	if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
    782		runtime->hw.rate_min = 48000;
    783	return 0;
    784}
    785
    786static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
    787{
    788	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    789
    790	ice->playback_con_substream = NULL;
    791	return 0;
    792}
    793
    794static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
    795{
    796	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    797	u32 tmp;
    798
    799	spin_lock_irq(&ice->reg_lock);
    800	tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
    801	outw(tmp, ICEDS(ice, INTMASK));
    802	spin_unlock_irq(&ice->reg_lock);
    803	ice->playback_con_substream_ds[substream->number] = NULL;
    804	return 0;
    805}
    806
    807static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
    808{
    809	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    810
    811	ice->capture_con_substream = NULL;
    812	return 0;
    813}
    814
    815static const struct snd_pcm_ops snd_ice1712_playback_ops = {
    816	.open =		snd_ice1712_playback_open,
    817	.close =	snd_ice1712_playback_close,
    818	.prepare =	snd_ice1712_playback_prepare,
    819	.trigger =	snd_ice1712_playback_trigger,
    820	.pointer =	snd_ice1712_playback_pointer,
    821};
    822
    823static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
    824	.open =		snd_ice1712_playback_ds_open,
    825	.close =	snd_ice1712_playback_ds_close,
    826	.prepare =	snd_ice1712_playback_ds_prepare,
    827	.trigger =	snd_ice1712_playback_ds_trigger,
    828	.pointer =	snd_ice1712_playback_ds_pointer,
    829};
    830
    831static const struct snd_pcm_ops snd_ice1712_capture_ops = {
    832	.open =		snd_ice1712_capture_open,
    833	.close =	snd_ice1712_capture_close,
    834	.prepare =	snd_ice1712_capture_prepare,
    835	.trigger =	snd_ice1712_capture_trigger,
    836	.pointer =	snd_ice1712_capture_pointer,
    837};
    838
    839static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device)
    840{
    841	struct snd_pcm *pcm;
    842	int err;
    843
    844	err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
    845	if (err < 0)
    846		return err;
    847
    848	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
    849	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
    850
    851	pcm->private_data = ice;
    852	pcm->info_flags = 0;
    853	strcpy(pcm->name, "ICE1712 consumer");
    854	ice->pcm = pcm;
    855
    856	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
    857				       &ice->pci->dev, 64*1024, 64*1024);
    858
    859	dev_warn(ice->card->dev,
    860		 "Consumer PCM code does not work well at the moment --jk\n");
    861
    862	return 0;
    863}
    864
    865static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device)
    866{
    867	struct snd_pcm *pcm;
    868	int err;
    869
    870	err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
    871	if (err < 0)
    872		return err;
    873
    874	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
    875
    876	pcm->private_data = ice;
    877	pcm->info_flags = 0;
    878	strcpy(pcm->name, "ICE1712 consumer (DS)");
    879	ice->pcm_ds = pcm;
    880
    881	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
    882				       &ice->pci->dev, 64*1024, 128*1024);
    883
    884	return 0;
    885}
    886
    887/*
    888 *  PCM code - professional part (multitrack)
    889 */
    890
    891static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
    892				32000, 44100, 48000, 64000, 88200, 96000 };
    893
    894static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
    895	.count = ARRAY_SIZE(rates),
    896	.list = rates,
    897	.mask = 0,
    898};
    899
    900static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
    901				   int cmd)
    902{
    903	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
    904	switch (cmd) {
    905	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
    906	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
    907	{
    908		unsigned int what;
    909		unsigned int old;
    910		if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
    911			return -EINVAL;
    912		what = ICE1712_PLAYBACK_PAUSE;
    913		snd_pcm_trigger_done(substream, substream);
    914		spin_lock(&ice->reg_lock);
    915		old = inl(ICEMT(ice, PLAYBACK_CONTROL));
    916		if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
    917			old |= what;
    918		else
    919			old &= ~what;
    920		outl(old, ICEMT(ice, PLAYBACK_CONTROL));
    921		spin_unlock(&ice->reg_lock);
    922		break;
    923	}
    924	case SNDRV_PCM_TRIGGER_START:
    925	case SNDRV_PCM_TRIGGER_STOP:
    926	{
    927		unsigned int what = 0;
    928		unsigned int old;
    929		struct snd_pcm_substream *s;
    930
    931		snd_pcm_group_for_each_entry(s, substream) {
    932			if (s == ice->playback_pro_substream) {
    933				what |= ICE1712_PLAYBACK_START;
    934				snd_pcm_trigger_done(s, substream);
    935			} else if (s == ice->capture_pro_substream) {
    936				what |= ICE1712_CAPTURE_START_SHADOW;
    937				snd_pcm_trigger_done(s, substream);
    938			}
    939		}
    940		spin_lock(&ice->reg_lock);
    941		old = inl(ICEMT(ice, PLAYBACK_CONTROL));
    942		if (cmd == SNDRV_PCM_TRIGGER_START)
    943			old |= what;
    944		else
    945			old &= ~what;
    946		outl(old, ICEMT(ice, PLAYBACK_CONTROL));
    947		spin_unlock(&ice->reg_lock);
    948		break;
    949	}
    950	default:
    951		return -EINVAL;
    952	}
    953	return 0;
    954}
    955
    956/*
    957 */
    958static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
    959{
    960	unsigned long flags;
    961	unsigned char val, old;
    962	unsigned int i;
    963
    964	switch (rate) {
    965	case 8000: val = 6; break;
    966	case 9600: val = 3; break;
    967	case 11025: val = 10; break;
    968	case 12000: val = 2; break;
    969	case 16000: val = 5; break;
    970	case 22050: val = 9; break;
    971	case 24000: val = 1; break;
    972	case 32000: val = 4; break;
    973	case 44100: val = 8; break;
    974	case 48000: val = 0; break;
    975	case 64000: val = 15; break;
    976	case 88200: val = 11; break;
    977	case 96000: val = 7; break;
    978	default:
    979		snd_BUG();
    980		val = 0;
    981		rate = 48000;
    982		break;
    983	}
    984
    985	spin_lock_irqsave(&ice->reg_lock, flags);
    986	if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
    987						 ICE1712_PLAYBACK_PAUSE|
    988						 ICE1712_PLAYBACK_START)) {
    989__out:
    990		spin_unlock_irqrestore(&ice->reg_lock, flags);
    991		return;
    992	}
    993	if (!force && is_pro_rate_locked(ice))
    994		goto __out;
    995
    996	old = inb(ICEMT(ice, RATE));
    997	if (!force && old == val)
    998		goto __out;
    999
   1000	ice->cur_rate = rate;
   1001	outb(val, ICEMT(ice, RATE));
   1002	spin_unlock_irqrestore(&ice->reg_lock, flags);
   1003
   1004	if (ice->gpio.set_pro_rate)
   1005		ice->gpio.set_pro_rate(ice, rate);
   1006	for (i = 0; i < ice->akm_codecs; i++) {
   1007		if (ice->akm[i].ops.set_rate_val)
   1008			ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
   1009	}
   1010	if (ice->spdif.ops.setup_rate)
   1011		ice->spdif.ops.setup_rate(ice, rate);
   1012}
   1013
   1014static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
   1015{
   1016	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1017
   1018	ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
   1019	spin_lock_irq(&ice->reg_lock);
   1020	outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
   1021	outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
   1022	outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
   1023	spin_unlock_irq(&ice->reg_lock);
   1024
   1025	return 0;
   1026}
   1027
   1028static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
   1029					      struct snd_pcm_hw_params *hw_params)
   1030{
   1031	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1032
   1033	snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
   1034	return 0;
   1035}
   1036
   1037static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
   1038{
   1039	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1040
   1041	ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
   1042	spin_lock_irq(&ice->reg_lock);
   1043	outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
   1044	outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
   1045	outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
   1046	spin_unlock_irq(&ice->reg_lock);
   1047	return 0;
   1048}
   1049
   1050static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
   1051					     struct snd_pcm_hw_params *hw_params)
   1052{
   1053	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1054
   1055	snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
   1056	return 0;
   1057}
   1058
   1059static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
   1060{
   1061	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1062	size_t ptr;
   1063
   1064	if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
   1065		return 0;
   1066	ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
   1067	ptr = bytes_to_frames(substream->runtime, ptr);
   1068	if (ptr == substream->runtime->buffer_size)
   1069		ptr = 0;
   1070	return ptr;
   1071}
   1072
   1073static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
   1074{
   1075	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1076	size_t ptr;
   1077
   1078	if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
   1079		return 0;
   1080	ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
   1081	ptr = bytes_to_frames(substream->runtime, ptr);
   1082	if (ptr == substream->runtime->buffer_size)
   1083		ptr = 0;
   1084	return ptr;
   1085}
   1086
   1087static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
   1088	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
   1089				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
   1090				 SNDRV_PCM_INFO_MMAP_VALID |
   1091				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
   1092	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
   1093	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
   1094	.rate_min =		4000,
   1095	.rate_max =		96000,
   1096	.channels_min =		10,
   1097	.channels_max =		10,
   1098	.buffer_bytes_max =	(256*1024),
   1099	.period_bytes_min =	10 * 4 * 2,
   1100	.period_bytes_max =	131040,
   1101	.periods_min =		1,
   1102	.periods_max =		1024,
   1103	.fifo_size =		0,
   1104};
   1105
   1106static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
   1107	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
   1108				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
   1109				 SNDRV_PCM_INFO_MMAP_VALID |
   1110				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
   1111	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
   1112	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
   1113	.rate_min =		4000,
   1114	.rate_max =		96000,
   1115	.channels_min =		12,
   1116	.channels_max =		12,
   1117	.buffer_bytes_max =	(256*1024),
   1118	.period_bytes_min =	12 * 4 * 2,
   1119	.period_bytes_max =	131040,
   1120	.periods_min =		1,
   1121	.periods_max =		1024,
   1122	.fifo_size =		0,
   1123};
   1124
   1125static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
   1126{
   1127	struct snd_pcm_runtime *runtime = substream->runtime;
   1128	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1129
   1130	ice->playback_pro_substream = substream;
   1131	runtime->hw = snd_ice1712_playback_pro;
   1132	snd_pcm_set_sync(substream);
   1133	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
   1134	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
   1135	if (is_pro_rate_locked(ice)) {
   1136		runtime->hw.rate_min = PRO_RATE_DEFAULT;
   1137		runtime->hw.rate_max = PRO_RATE_DEFAULT;
   1138	}
   1139
   1140	if (ice->spdif.ops.open)
   1141		ice->spdif.ops.open(ice, substream);
   1142
   1143	return 0;
   1144}
   1145
   1146static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
   1147{
   1148	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1149	struct snd_pcm_runtime *runtime = substream->runtime;
   1150
   1151	ice->capture_pro_substream = substream;
   1152	runtime->hw = snd_ice1712_capture_pro;
   1153	snd_pcm_set_sync(substream);
   1154	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
   1155	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
   1156	if (is_pro_rate_locked(ice)) {
   1157		runtime->hw.rate_min = PRO_RATE_DEFAULT;
   1158		runtime->hw.rate_max = PRO_RATE_DEFAULT;
   1159	}
   1160
   1161	return 0;
   1162}
   1163
   1164static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
   1165{
   1166	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1167
   1168	if (PRO_RATE_RESET)
   1169		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
   1170	ice->playback_pro_substream = NULL;
   1171	if (ice->spdif.ops.close)
   1172		ice->spdif.ops.close(ice, substream);
   1173
   1174	return 0;
   1175}
   1176
   1177static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
   1178{
   1179	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
   1180
   1181	if (PRO_RATE_RESET)
   1182		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
   1183	ice->capture_pro_substream = NULL;
   1184	return 0;
   1185}
   1186
   1187static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
   1188	.open =		snd_ice1712_playback_pro_open,
   1189	.close =	snd_ice1712_playback_pro_close,
   1190	.hw_params =	snd_ice1712_playback_pro_hw_params,
   1191	.prepare =	snd_ice1712_playback_pro_prepare,
   1192	.trigger =	snd_ice1712_pro_trigger,
   1193	.pointer =	snd_ice1712_playback_pro_pointer,
   1194};
   1195
   1196static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
   1197	.open =		snd_ice1712_capture_pro_open,
   1198	.close =	snd_ice1712_capture_pro_close,
   1199	.hw_params =	snd_ice1712_capture_pro_hw_params,
   1200	.prepare =	snd_ice1712_capture_pro_prepare,
   1201	.trigger =	snd_ice1712_pro_trigger,
   1202	.pointer =	snd_ice1712_capture_pro_pointer,
   1203};
   1204
   1205static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device)
   1206{
   1207	struct snd_pcm *pcm;
   1208	int err;
   1209
   1210	err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
   1211	if (err < 0)
   1212		return err;
   1213
   1214	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
   1215	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
   1216
   1217	pcm->private_data = ice;
   1218	pcm->info_flags = 0;
   1219	strcpy(pcm->name, "ICE1712 multi");
   1220
   1221	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
   1222				       &ice->pci->dev, 256*1024, 256*1024);
   1223
   1224	ice->pcm_pro = pcm;
   1225
   1226	if (ice->cs8427) {
   1227		/* assign channels to iec958 */
   1228		err = snd_cs8427_iec958_build(ice->cs8427,
   1229					      pcm->streams[0].substream,
   1230					      pcm->streams[1].substream);
   1231		if (err < 0)
   1232			return err;
   1233	}
   1234
   1235	return snd_ice1712_build_pro_mixer(ice);
   1236}
   1237
   1238/*
   1239 *  Mixer section
   1240 */
   1241
   1242static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
   1243{
   1244	unsigned int vol = ice->pro_volumes[index];
   1245	unsigned short val = 0;
   1246
   1247	val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
   1248	val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
   1249	outb(index, ICEMT(ice, MONITOR_INDEX));
   1250	outw(val, ICEMT(ice, MONITOR_VOLUME));
   1251}
   1252
   1253#define snd_ice1712_pro_mixer_switch_info	snd_ctl_boolean_stereo_info
   1254
   1255static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
   1256{
   1257	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1258	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
   1259		kcontrol->private_value;
   1260
   1261	spin_lock_irq(&ice->reg_lock);
   1262	ucontrol->value.integer.value[0] =
   1263		!((ice->pro_volumes[priv_idx] >> 15) & 1);
   1264	ucontrol->value.integer.value[1] =
   1265		!((ice->pro_volumes[priv_idx] >> 31) & 1);
   1266	spin_unlock_irq(&ice->reg_lock);
   1267	return 0;
   1268}
   1269
   1270static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
   1271{
   1272	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1273	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
   1274		kcontrol->private_value;
   1275	unsigned int nval, change;
   1276
   1277	nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
   1278	       (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
   1279	spin_lock_irq(&ice->reg_lock);
   1280	nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
   1281	change = nval != ice->pro_volumes[priv_idx];
   1282	ice->pro_volumes[priv_idx] = nval;
   1283	snd_ice1712_update_volume(ice, priv_idx);
   1284	spin_unlock_irq(&ice->reg_lock);
   1285	return change;
   1286}
   1287
   1288static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
   1289{
   1290	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
   1291	uinfo->count = 2;
   1292	uinfo->value.integer.min = 0;
   1293	uinfo->value.integer.max = 96;
   1294	return 0;
   1295}
   1296
   1297static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
   1298{
   1299	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1300	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
   1301		kcontrol->private_value;
   1302
   1303	spin_lock_irq(&ice->reg_lock);
   1304	ucontrol->value.integer.value[0] =
   1305		(ice->pro_volumes[priv_idx] >> 0) & 127;
   1306	ucontrol->value.integer.value[1] =
   1307		(ice->pro_volumes[priv_idx] >> 16) & 127;
   1308	spin_unlock_irq(&ice->reg_lock);
   1309	return 0;
   1310}
   1311
   1312static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
   1313{
   1314	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1315	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
   1316		kcontrol->private_value;
   1317	unsigned int nval, change;
   1318
   1319	nval = (ucontrol->value.integer.value[0] & 127) |
   1320	       ((ucontrol->value.integer.value[1] & 127) << 16);
   1321	spin_lock_irq(&ice->reg_lock);
   1322	nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
   1323	change = nval != ice->pro_volumes[priv_idx];
   1324	ice->pro_volumes[priv_idx] = nval;
   1325	snd_ice1712_update_volume(ice, priv_idx);
   1326	spin_unlock_irq(&ice->reg_lock);
   1327	return change;
   1328}
   1329
   1330static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
   1331
   1332static const struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
   1333	{
   1334		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1335		.name = "Multi Playback Switch",
   1336		.info = snd_ice1712_pro_mixer_switch_info,
   1337		.get = snd_ice1712_pro_mixer_switch_get,
   1338		.put = snd_ice1712_pro_mixer_switch_put,
   1339		.private_value = 0,
   1340		.count = 10,
   1341	},
   1342	{
   1343		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1344		.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
   1345			   SNDRV_CTL_ELEM_ACCESS_TLV_READ),
   1346		.name = "Multi Playback Volume",
   1347		.info = snd_ice1712_pro_mixer_volume_info,
   1348		.get = snd_ice1712_pro_mixer_volume_get,
   1349		.put = snd_ice1712_pro_mixer_volume_put,
   1350		.private_value = 0,
   1351		.count = 10,
   1352		.tlv = { .p = db_scale_playback }
   1353	},
   1354};
   1355
   1356static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
   1357	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1358	.name = "H/W Multi Capture Switch",
   1359	.info = snd_ice1712_pro_mixer_switch_info,
   1360	.get = snd_ice1712_pro_mixer_switch_get,
   1361	.put = snd_ice1712_pro_mixer_switch_put,
   1362	.private_value = 10,
   1363};
   1364
   1365static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
   1366	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1367	.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
   1368	.info = snd_ice1712_pro_mixer_switch_info,
   1369	.get = snd_ice1712_pro_mixer_switch_get,
   1370	.put = snd_ice1712_pro_mixer_switch_put,
   1371	.private_value = 18,
   1372	.count = 2,
   1373};
   1374
   1375static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
   1376	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1377	.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
   1378		   SNDRV_CTL_ELEM_ACCESS_TLV_READ),
   1379	.name = "H/W Multi Capture Volume",
   1380	.info = snd_ice1712_pro_mixer_volume_info,
   1381	.get = snd_ice1712_pro_mixer_volume_get,
   1382	.put = snd_ice1712_pro_mixer_volume_put,
   1383	.private_value = 10,
   1384	.tlv = { .p = db_scale_playback }
   1385};
   1386
   1387static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
   1388	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1389	.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
   1390	.info = snd_ice1712_pro_mixer_volume_info,
   1391	.get = snd_ice1712_pro_mixer_volume_get,
   1392	.put = snd_ice1712_pro_mixer_volume_put,
   1393	.private_value = 18,
   1394	.count = 2,
   1395};
   1396
   1397static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
   1398{
   1399	struct snd_card *card = ice->card;
   1400	unsigned int idx;
   1401	int err;
   1402
   1403	/* multi-channel mixer */
   1404	for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
   1405		err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
   1406		if (err < 0)
   1407			return err;
   1408	}
   1409
   1410	if (ice->num_total_adcs > 0) {
   1411		struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
   1412		tmp.count = ice->num_total_adcs;
   1413		err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
   1414		if (err < 0)
   1415			return err;
   1416	}
   1417
   1418	err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
   1419	if (err < 0)
   1420		return err;
   1421
   1422	if (ice->num_total_adcs > 0) {
   1423		struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
   1424		tmp.count = ice->num_total_adcs;
   1425		err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
   1426		if (err < 0)
   1427			return err;
   1428	}
   1429
   1430	err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
   1431	if (err < 0)
   1432		return err;
   1433
   1434	/* initialize volumes */
   1435	for (idx = 0; idx < 10; idx++) {
   1436		ice->pro_volumes[idx] = 0x80008000;	/* mute */
   1437		snd_ice1712_update_volume(ice, idx);
   1438	}
   1439	for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
   1440		ice->pro_volumes[idx] = 0x80008000;	/* mute */
   1441		snd_ice1712_update_volume(ice, idx);
   1442	}
   1443	for (idx = 18; idx < 20; idx++) {
   1444		ice->pro_volumes[idx] = 0x80008000;	/* mute */
   1445		snd_ice1712_update_volume(ice, idx);
   1446	}
   1447	return 0;
   1448}
   1449
   1450static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
   1451{
   1452	struct snd_ice1712 *ice = ac97->private_data;
   1453	ice->ac97 = NULL;
   1454}
   1455
   1456static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
   1457{
   1458	int err, bus_num = 0;
   1459	struct snd_ac97_template ac97;
   1460	struct snd_ac97_bus *pbus;
   1461	static const struct snd_ac97_bus_ops con_ops = {
   1462		.write = snd_ice1712_ac97_write,
   1463		.read = snd_ice1712_ac97_read,
   1464	};
   1465	static const struct snd_ac97_bus_ops pro_ops = {
   1466		.write = snd_ice1712_pro_ac97_write,
   1467		.read = snd_ice1712_pro_ac97_read,
   1468	};
   1469
   1470	if (ice_has_con_ac97(ice)) {
   1471		err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
   1472		if (err < 0)
   1473			return err;
   1474		memset(&ac97, 0, sizeof(ac97));
   1475		ac97.private_data = ice;
   1476		ac97.private_free = snd_ice1712_mixer_free_ac97;
   1477		err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
   1478		if (err < 0)
   1479			dev_warn(ice->card->dev,
   1480				 "cannot initialize ac97 for consumer, skipped\n");
   1481		else {
   1482			return snd_ctl_add(ice->card,
   1483			snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97,
   1484				     ice));
   1485		}
   1486	}
   1487
   1488	if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
   1489		err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
   1490		if (err < 0)
   1491			return err;
   1492		memset(&ac97, 0, sizeof(ac97));
   1493		ac97.private_data = ice;
   1494		ac97.private_free = snd_ice1712_mixer_free_ac97;
   1495		err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
   1496		if (err < 0)
   1497			dev_warn(ice->card->dev,
   1498				 "cannot initialize pro ac97, skipped\n");
   1499		else
   1500			return 0;
   1501	}
   1502	/* I2S mixer only */
   1503	strcat(ice->card->mixername, "ICE1712 - multitrack");
   1504	return 0;
   1505}
   1506
   1507/*
   1508 *
   1509 */
   1510
   1511static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
   1512{
   1513	return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
   1514}
   1515
   1516static void snd_ice1712_proc_read(struct snd_info_entry *entry,
   1517				  struct snd_info_buffer *buffer)
   1518{
   1519	struct snd_ice1712 *ice = entry->private_data;
   1520	unsigned int idx;
   1521
   1522	snd_iprintf(buffer, "%s\n\n", ice->card->longname);
   1523	snd_iprintf(buffer, "EEPROM:\n");
   1524
   1525	snd_iprintf(buffer, "  Subvendor        : 0x%x\n", ice->eeprom.subvendor);
   1526	snd_iprintf(buffer, "  Size             : %i bytes\n", ice->eeprom.size);
   1527	snd_iprintf(buffer, "  Version          : %i\n", ice->eeprom.version);
   1528	snd_iprintf(buffer, "  Codec            : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
   1529	snd_iprintf(buffer, "  ACLink           : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
   1530	snd_iprintf(buffer, "  I2S ID           : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
   1531	snd_iprintf(buffer, "  S/PDIF           : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
   1532	snd_iprintf(buffer, "  GPIO mask        : 0x%x\n", ice->eeprom.gpiomask);
   1533	snd_iprintf(buffer, "  GPIO state       : 0x%x\n", ice->eeprom.gpiostate);
   1534	snd_iprintf(buffer, "  GPIO direction   : 0x%x\n", ice->eeprom.gpiodir);
   1535	snd_iprintf(buffer, "  AC'97 main       : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
   1536	snd_iprintf(buffer, "  AC'97 pcm        : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
   1537	snd_iprintf(buffer, "  AC'97 record     : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
   1538	snd_iprintf(buffer, "  AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
   1539	for (idx = 0; idx < 4; idx++)
   1540		snd_iprintf(buffer, "  DAC ID #%i        : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
   1541	for (idx = 0; idx < 4; idx++)
   1542		snd_iprintf(buffer, "  ADC ID #%i        : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
   1543	for (idx = 0x1c; idx < ice->eeprom.size; idx++)
   1544		snd_iprintf(buffer, "  Extra #%02i        : 0x%x\n", idx, ice->eeprom.data[idx]);
   1545
   1546	snd_iprintf(buffer, "\nRegisters:\n");
   1547	snd_iprintf(buffer, "  PSDOUT03         : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
   1548	snd_iprintf(buffer, "  CAPTURE          : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
   1549	snd_iprintf(buffer, "  SPDOUT           : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
   1550	snd_iprintf(buffer, "  RATE             : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
   1551	snd_iprintf(buffer, "  GPIO_DATA        : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
   1552	snd_iprintf(buffer, "  GPIO_WRITE_MASK  : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
   1553	snd_iprintf(buffer, "  GPIO_DIRECTION   : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
   1554}
   1555
   1556static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
   1557{
   1558	snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read);
   1559}
   1560
   1561/*
   1562 *
   1563 */
   1564
   1565static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
   1566				   struct snd_ctl_elem_info *uinfo)
   1567{
   1568	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
   1569	uinfo->count = sizeof(struct snd_ice1712_eeprom);
   1570	return 0;
   1571}
   1572
   1573static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
   1574				  struct snd_ctl_elem_value *ucontrol)
   1575{
   1576	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1577
   1578	memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
   1579	return 0;
   1580}
   1581
   1582static const struct snd_kcontrol_new snd_ice1712_eeprom = {
   1583	.iface = SNDRV_CTL_ELEM_IFACE_CARD,
   1584	.name = "ICE1712 EEPROM",
   1585	.access = SNDRV_CTL_ELEM_ACCESS_READ,
   1586	.info = snd_ice1712_eeprom_info,
   1587	.get = snd_ice1712_eeprom_get
   1588};
   1589
   1590/*
   1591 */
   1592static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
   1593				  struct snd_ctl_elem_info *uinfo)
   1594{
   1595	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
   1596	uinfo->count = 1;
   1597	return 0;
   1598}
   1599
   1600static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
   1601					 struct snd_ctl_elem_value *ucontrol)
   1602{
   1603	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1604	if (ice->spdif.ops.default_get)
   1605		ice->spdif.ops.default_get(ice, ucontrol);
   1606	return 0;
   1607}
   1608
   1609static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
   1610					 struct snd_ctl_elem_value *ucontrol)
   1611{
   1612	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1613	if (ice->spdif.ops.default_put)
   1614		return ice->spdif.ops.default_put(ice, ucontrol);
   1615	return 0;
   1616}
   1617
   1618static const struct snd_kcontrol_new snd_ice1712_spdif_default =
   1619{
   1620	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
   1621	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
   1622	.info =		snd_ice1712_spdif_info,
   1623	.get =		snd_ice1712_spdif_default_get,
   1624	.put =		snd_ice1712_spdif_default_put
   1625};
   1626
   1627static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
   1628				       struct snd_ctl_elem_value *ucontrol)
   1629{
   1630	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1631	if (ice->spdif.ops.default_get) {
   1632		ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
   1633						     IEC958_AES0_PROFESSIONAL |
   1634						     IEC958_AES0_CON_NOT_COPYRIGHT |
   1635						     IEC958_AES0_CON_EMPHASIS;
   1636		ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
   1637						     IEC958_AES1_CON_CATEGORY;
   1638		ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
   1639	} else {
   1640		ucontrol->value.iec958.status[0] = 0xff;
   1641		ucontrol->value.iec958.status[1] = 0xff;
   1642		ucontrol->value.iec958.status[2] = 0xff;
   1643		ucontrol->value.iec958.status[3] = 0xff;
   1644		ucontrol->value.iec958.status[4] = 0xff;
   1645	}
   1646	return 0;
   1647}
   1648
   1649static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
   1650				       struct snd_ctl_elem_value *ucontrol)
   1651{
   1652	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1653	if (ice->spdif.ops.default_get) {
   1654		ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
   1655						     IEC958_AES0_PROFESSIONAL |
   1656						     IEC958_AES0_PRO_FS |
   1657						     IEC958_AES0_PRO_EMPHASIS;
   1658		ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
   1659	} else {
   1660		ucontrol->value.iec958.status[0] = 0xff;
   1661		ucontrol->value.iec958.status[1] = 0xff;
   1662		ucontrol->value.iec958.status[2] = 0xff;
   1663		ucontrol->value.iec958.status[3] = 0xff;
   1664		ucontrol->value.iec958.status[4] = 0xff;
   1665	}
   1666	return 0;
   1667}
   1668
   1669static const struct snd_kcontrol_new snd_ice1712_spdif_maskc =
   1670{
   1671	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
   1672	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
   1673	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
   1674	.info =		snd_ice1712_spdif_info,
   1675	.get =		snd_ice1712_spdif_maskc_get,
   1676};
   1677
   1678static const struct snd_kcontrol_new snd_ice1712_spdif_maskp =
   1679{
   1680	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
   1681	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
   1682	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
   1683	.info =		snd_ice1712_spdif_info,
   1684	.get =		snd_ice1712_spdif_maskp_get,
   1685};
   1686
   1687static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
   1688					struct snd_ctl_elem_value *ucontrol)
   1689{
   1690	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1691	if (ice->spdif.ops.stream_get)
   1692		ice->spdif.ops.stream_get(ice, ucontrol);
   1693	return 0;
   1694}
   1695
   1696static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
   1697					struct snd_ctl_elem_value *ucontrol)
   1698{
   1699	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1700	if (ice->spdif.ops.stream_put)
   1701		return ice->spdif.ops.stream_put(ice, ucontrol);
   1702	return 0;
   1703}
   1704
   1705static const struct snd_kcontrol_new snd_ice1712_spdif_stream =
   1706{
   1707	.access =	(SNDRV_CTL_ELEM_ACCESS_READWRITE |
   1708			 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
   1709	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
   1710	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
   1711	.info =		snd_ice1712_spdif_info,
   1712	.get =		snd_ice1712_spdif_stream_get,
   1713	.put =		snd_ice1712_spdif_stream_put
   1714};
   1715
   1716int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
   1717			 struct snd_ctl_elem_value *ucontrol)
   1718{
   1719	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1720	unsigned char mask = kcontrol->private_value & 0xff;
   1721	int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
   1722
   1723	snd_ice1712_save_gpio_status(ice);
   1724	ucontrol->value.integer.value[0] =
   1725		(snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
   1726	snd_ice1712_restore_gpio_status(ice);
   1727	return 0;
   1728}
   1729
   1730int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
   1731			 struct snd_ctl_elem_value *ucontrol)
   1732{
   1733	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1734	unsigned char mask = kcontrol->private_value & 0xff;
   1735	int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
   1736	unsigned int val, nval;
   1737
   1738	if (kcontrol->private_value & (1 << 31))
   1739		return -EPERM;
   1740	nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
   1741	snd_ice1712_save_gpio_status(ice);
   1742	val = snd_ice1712_gpio_read(ice);
   1743	nval |= val & ~mask;
   1744	if (val != nval)
   1745		snd_ice1712_gpio_write(ice, nval);
   1746	snd_ice1712_restore_gpio_status(ice);
   1747	return val != nval;
   1748}
   1749
   1750/*
   1751 *  rate
   1752 */
   1753static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
   1754					       struct snd_ctl_elem_info *uinfo)
   1755{
   1756	static const char * const texts[] = {
   1757		"8000",		/* 0: 6 */
   1758		"9600",		/* 1: 3 */
   1759		"11025",	/* 2: 10 */
   1760		"12000",	/* 3: 2 */
   1761		"16000",	/* 4: 5 */
   1762		"22050",	/* 5: 9 */
   1763		"24000",	/* 6: 1 */
   1764		"32000",	/* 7: 4 */
   1765		"44100",	/* 8: 8 */
   1766		"48000",	/* 9: 0 */
   1767		"64000",	/* 10: 15 */
   1768		"88200",	/* 11: 11 */
   1769		"96000",	/* 12: 7 */
   1770		"IEC958 Input",	/* 13: -- */
   1771	};
   1772	return snd_ctl_enum_info(uinfo, 1, 14, texts);
   1773}
   1774
   1775static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
   1776					      struct snd_ctl_elem_value *ucontrol)
   1777{
   1778	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1779	static const unsigned char xlate[16] = {
   1780		9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
   1781	};
   1782	unsigned char val;
   1783
   1784	spin_lock_irq(&ice->reg_lock);
   1785	if (is_spdif_master(ice)) {
   1786		ucontrol->value.enumerated.item[0] = 13;
   1787	} else {
   1788		val = xlate[inb(ICEMT(ice, RATE)) & 15];
   1789		if (val == 255) {
   1790			snd_BUG();
   1791			val = 0;
   1792		}
   1793		ucontrol->value.enumerated.item[0] = val;
   1794	}
   1795	spin_unlock_irq(&ice->reg_lock);
   1796	return 0;
   1797}
   1798
   1799static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
   1800					      struct snd_ctl_elem_value *ucontrol)
   1801{
   1802	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1803	static const unsigned int xrate[13] = {
   1804		8000, 9600, 11025, 12000, 16000, 22050, 24000,
   1805		32000, 44100, 48000, 64000, 88200, 96000
   1806	};
   1807	unsigned char oval;
   1808	int change = 0;
   1809
   1810	spin_lock_irq(&ice->reg_lock);
   1811	oval = inb(ICEMT(ice, RATE));
   1812	if (ucontrol->value.enumerated.item[0] == 13) {
   1813		outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
   1814	} else {
   1815		PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
   1816		spin_unlock_irq(&ice->reg_lock);
   1817		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
   1818		spin_lock_irq(&ice->reg_lock);
   1819	}
   1820	change = inb(ICEMT(ice, RATE)) != oval;
   1821	spin_unlock_irq(&ice->reg_lock);
   1822
   1823	if ((oval & ICE1712_SPDIF_MASTER) !=
   1824	    (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
   1825		snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
   1826
   1827	return change;
   1828}
   1829
   1830static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
   1831	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1832	.name = "Multi Track Internal Clock",
   1833	.info = snd_ice1712_pro_internal_clock_info,
   1834	.get = snd_ice1712_pro_internal_clock_get,
   1835	.put = snd_ice1712_pro_internal_clock_put
   1836};
   1837
   1838static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
   1839						       struct snd_ctl_elem_info *uinfo)
   1840{
   1841	static const char * const texts[] = {
   1842		"8000",		/* 0: 6 */
   1843		"9600",		/* 1: 3 */
   1844		"11025",	/* 2: 10 */
   1845		"12000",	/* 3: 2 */
   1846		"16000",	/* 4: 5 */
   1847		"22050",	/* 5: 9 */
   1848		"24000",	/* 6: 1 */
   1849		"32000",	/* 7: 4 */
   1850		"44100",	/* 8: 8 */
   1851		"48000",	/* 9: 0 */
   1852		"64000",	/* 10: 15 */
   1853		"88200",	/* 11: 11 */
   1854		"96000",	/* 12: 7 */
   1855		/* "IEC958 Input",	13: -- */
   1856	};
   1857	return snd_ctl_enum_info(uinfo, 1, 13, texts);
   1858}
   1859
   1860static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
   1861						      struct snd_ctl_elem_value *ucontrol)
   1862{
   1863	int val;
   1864	static const unsigned int xrate[13] = {
   1865		8000, 9600, 11025, 12000, 16000, 22050, 24000,
   1866		32000, 44100, 48000, 64000, 88200, 96000
   1867	};
   1868
   1869	for (val = 0; val < 13; val++) {
   1870		if (xrate[val] == PRO_RATE_DEFAULT)
   1871			break;
   1872	}
   1873
   1874	ucontrol->value.enumerated.item[0] = val;
   1875	return 0;
   1876}
   1877
   1878static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
   1879						      struct snd_ctl_elem_value *ucontrol)
   1880{
   1881	static const unsigned int xrate[13] = {
   1882		8000, 9600, 11025, 12000, 16000, 22050, 24000,
   1883		32000, 44100, 48000, 64000, 88200, 96000
   1884	};
   1885	unsigned char oval;
   1886	int change = 0;
   1887
   1888	oval = PRO_RATE_DEFAULT;
   1889	PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
   1890	change = PRO_RATE_DEFAULT != oval;
   1891
   1892	return change;
   1893}
   1894
   1895static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
   1896	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1897	.name = "Multi Track Internal Clock Default",
   1898	.info = snd_ice1712_pro_internal_clock_default_info,
   1899	.get = snd_ice1712_pro_internal_clock_default_get,
   1900	.put = snd_ice1712_pro_internal_clock_default_put
   1901};
   1902
   1903#define snd_ice1712_pro_rate_locking_info	snd_ctl_boolean_mono_info
   1904
   1905static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
   1906					    struct snd_ctl_elem_value *ucontrol)
   1907{
   1908	ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
   1909	return 0;
   1910}
   1911
   1912static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
   1913					    struct snd_ctl_elem_value *ucontrol)
   1914{
   1915	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1916	int change = 0, nval;
   1917
   1918	nval = ucontrol->value.integer.value[0] ? 1 : 0;
   1919	spin_lock_irq(&ice->reg_lock);
   1920	change = PRO_RATE_LOCKED != nval;
   1921	PRO_RATE_LOCKED = nval;
   1922	spin_unlock_irq(&ice->reg_lock);
   1923	return change;
   1924}
   1925
   1926static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
   1927	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1928	.name = "Multi Track Rate Locking",
   1929	.info = snd_ice1712_pro_rate_locking_info,
   1930	.get = snd_ice1712_pro_rate_locking_get,
   1931	.put = snd_ice1712_pro_rate_locking_put
   1932};
   1933
   1934#define snd_ice1712_pro_rate_reset_info		snd_ctl_boolean_mono_info
   1935
   1936static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
   1937					  struct snd_ctl_elem_value *ucontrol)
   1938{
   1939	ucontrol->value.integer.value[0] = PRO_RATE_RESET;
   1940	return 0;
   1941}
   1942
   1943static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
   1944					  struct snd_ctl_elem_value *ucontrol)
   1945{
   1946	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1947	int change = 0, nval;
   1948
   1949	nval = ucontrol->value.integer.value[0] ? 1 : 0;
   1950	spin_lock_irq(&ice->reg_lock);
   1951	change = PRO_RATE_RESET != nval;
   1952	PRO_RATE_RESET = nval;
   1953	spin_unlock_irq(&ice->reg_lock);
   1954	return change;
   1955}
   1956
   1957static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
   1958	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   1959	.name = "Multi Track Rate Reset",
   1960	.info = snd_ice1712_pro_rate_reset_info,
   1961	.get = snd_ice1712_pro_rate_reset_get,
   1962	.put = snd_ice1712_pro_rate_reset_put
   1963};
   1964
   1965/*
   1966 * routing
   1967 */
   1968static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
   1969				      struct snd_ctl_elem_info *uinfo)
   1970{
   1971	static const char * const texts[] = {
   1972		"PCM Out", /* 0 */
   1973		"H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
   1974		"H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
   1975		"IEC958 In L", "IEC958 In R", /* 9-10 */
   1976		"Digital Mixer", /* 11 - optional */
   1977	};
   1978	int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
   1979	return snd_ctl_enum_info(uinfo, 1, num_items, texts);
   1980}
   1981
   1982static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
   1983					    struct snd_ctl_elem_value *ucontrol)
   1984{
   1985	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   1986	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
   1987	unsigned int val, cval;
   1988
   1989	spin_lock_irq(&ice->reg_lock);
   1990	val = inw(ICEMT(ice, ROUTE_PSDOUT03));
   1991	cval = inl(ICEMT(ice, ROUTE_CAPTURE));
   1992	spin_unlock_irq(&ice->reg_lock);
   1993
   1994	val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
   1995	val &= 3;
   1996	cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
   1997	if (val == 1 && idx < 2)
   1998		ucontrol->value.enumerated.item[0] = 11;
   1999	else if (val == 2)
   2000		ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
   2001	else if (val == 3)
   2002		ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
   2003	else
   2004		ucontrol->value.enumerated.item[0] = 0;
   2005	return 0;
   2006}
   2007
   2008static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
   2009					    struct snd_ctl_elem_value *ucontrol)
   2010{
   2011	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2012	int change, shift;
   2013	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
   2014	unsigned int val, old_val, nval;
   2015
   2016	/* update PSDOUT */
   2017	if (ucontrol->value.enumerated.item[0] >= 11)
   2018		nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
   2019	else if (ucontrol->value.enumerated.item[0] >= 9)
   2020		nval = 3; /* spdif in */
   2021	else if (ucontrol->value.enumerated.item[0] >= 1)
   2022		nval = 2; /* analog in */
   2023	else
   2024		nval = 0; /* pcm */
   2025	shift = ((idx % 2) * 8) + ((idx / 2) * 2);
   2026	spin_lock_irq(&ice->reg_lock);
   2027	val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
   2028	val &= ~(0x03 << shift);
   2029	val |= nval << shift;
   2030	change = val != old_val;
   2031	if (change)
   2032		outw(val, ICEMT(ice, ROUTE_PSDOUT03));
   2033	spin_unlock_irq(&ice->reg_lock);
   2034	if (nval < 2) /* dig mixer of pcm */
   2035		return change;
   2036
   2037	/* update CAPTURE */
   2038	spin_lock_irq(&ice->reg_lock);
   2039	val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
   2040	shift = ((idx / 2) * 8) + ((idx % 2) * 4);
   2041	if (nval == 2) { /* analog in */
   2042		nval = ucontrol->value.enumerated.item[0] - 1;
   2043		val &= ~(0x07 << shift);
   2044		val |= nval << shift;
   2045	} else { /* spdif in */
   2046		nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
   2047		val &= ~(0x08 << shift);
   2048		val |= nval << shift;
   2049	}
   2050	if (val != old_val) {
   2051		change = 1;
   2052		outl(val, ICEMT(ice, ROUTE_CAPTURE));
   2053	}
   2054	spin_unlock_irq(&ice->reg_lock);
   2055	return change;
   2056}
   2057
   2058static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
   2059					   struct snd_ctl_elem_value *ucontrol)
   2060{
   2061	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2062	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
   2063	unsigned int val, cval;
   2064	val = inw(ICEMT(ice, ROUTE_SPDOUT));
   2065	cval = (val >> (idx * 4 + 8)) & 0x0f;
   2066	val = (val >> (idx * 2)) & 0x03;
   2067	if (val == 1)
   2068		ucontrol->value.enumerated.item[0] = 11;
   2069	else if (val == 2)
   2070		ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
   2071	else if (val == 3)
   2072		ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
   2073	else
   2074		ucontrol->value.enumerated.item[0] = 0;
   2075	return 0;
   2076}
   2077
   2078static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
   2079					   struct snd_ctl_elem_value *ucontrol)
   2080{
   2081	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2082	int change, shift;
   2083	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
   2084	unsigned int val, old_val, nval;
   2085
   2086	/* update SPDOUT */
   2087	spin_lock_irq(&ice->reg_lock);
   2088	val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
   2089	if (ucontrol->value.enumerated.item[0] >= 11)
   2090		nval = 1;
   2091	else if (ucontrol->value.enumerated.item[0] >= 9)
   2092		nval = 3;
   2093	else if (ucontrol->value.enumerated.item[0] >= 1)
   2094		nval = 2;
   2095	else
   2096		nval = 0;
   2097	shift = idx * 2;
   2098	val &= ~(0x03 << shift);
   2099	val |= nval << shift;
   2100	shift = idx * 4 + 8;
   2101	if (nval == 2) {
   2102		nval = ucontrol->value.enumerated.item[0] - 1;
   2103		val &= ~(0x07 << shift);
   2104		val |= nval << shift;
   2105	} else if (nval == 3) {
   2106		nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
   2107		val &= ~(0x08 << shift);
   2108		val |= nval << shift;
   2109	}
   2110	change = val != old_val;
   2111	if (change)
   2112		outw(val, ICEMT(ice, ROUTE_SPDOUT));
   2113	spin_unlock_irq(&ice->reg_lock);
   2114	return change;
   2115}
   2116
   2117static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
   2118	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   2119	.name = "H/W Playback Route",
   2120	.info = snd_ice1712_pro_route_info,
   2121	.get = snd_ice1712_pro_route_analog_get,
   2122	.put = snd_ice1712_pro_route_analog_put,
   2123};
   2124
   2125static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
   2126	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   2127	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
   2128	.info = snd_ice1712_pro_route_info,
   2129	.get = snd_ice1712_pro_route_spdif_get,
   2130	.put = snd_ice1712_pro_route_spdif_put,
   2131	.count = 2,
   2132};
   2133
   2134
   2135static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
   2136					    struct snd_ctl_elem_info *uinfo)
   2137{
   2138	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
   2139	uinfo->count = 1;
   2140	uinfo->value.integer.min = 0;
   2141	uinfo->value.integer.max = 255;
   2142	return 0;
   2143}
   2144
   2145static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
   2146					   struct snd_ctl_elem_value *ucontrol)
   2147{
   2148	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2149
   2150	ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
   2151	return 0;
   2152}
   2153
   2154static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
   2155					   struct snd_ctl_elem_value *ucontrol)
   2156{
   2157	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2158	int change;
   2159
   2160	spin_lock_irq(&ice->reg_lock);
   2161	change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
   2162	outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
   2163	spin_unlock_irq(&ice->reg_lock);
   2164	return change;
   2165}
   2166
   2167static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
   2168	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
   2169	.name = "Multi Track Volume Rate",
   2170	.info = snd_ice1712_pro_volume_rate_info,
   2171	.get = snd_ice1712_pro_volume_rate_get,
   2172	.put = snd_ice1712_pro_volume_rate_put
   2173};
   2174
   2175static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
   2176				     struct snd_ctl_elem_info *uinfo)
   2177{
   2178	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
   2179	uinfo->count = 22;
   2180	uinfo->value.integer.min = 0;
   2181	uinfo->value.integer.max = 255;
   2182	return 0;
   2183}
   2184
   2185static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
   2186				    struct snd_ctl_elem_value *ucontrol)
   2187{
   2188	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
   2189	int idx;
   2190
   2191	spin_lock_irq(&ice->reg_lock);
   2192	for (idx = 0; idx < 22; idx++) {
   2193		outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
   2194		ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
   2195	}
   2196	spin_unlock_irq(&ice->reg_lock);
   2197	return 0;
   2198}
   2199
   2200static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
   2201	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
   2202	.name = "Multi Track Peak",
   2203	.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
   2204	.info = snd_ice1712_pro_peak_info,
   2205	.get = snd_ice1712_pro_peak_get
   2206};
   2207
   2208/*
   2209 *
   2210 */
   2211
   2212/*
   2213 * list of available boards
   2214 */
   2215static const struct snd_ice1712_card_info *card_tables[] = {
   2216	snd_ice1712_hoontech_cards,
   2217	snd_ice1712_delta_cards,
   2218	snd_ice1712_ews_cards,
   2219	NULL,
   2220};
   2221
   2222static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
   2223					  unsigned char dev,
   2224					  unsigned char addr)
   2225{
   2226	long t = 0x10000;
   2227
   2228	outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
   2229	outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
   2230	while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
   2231	return inb(ICEREG(ice, I2C_DATA));
   2232}
   2233
   2234static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
   2235				   const char *modelname)
   2236{
   2237	int dev = ICE_I2C_EEPROM_ADDR;	/* I2C EEPROM device address */
   2238	unsigned int i, size;
   2239	const struct snd_ice1712_card_info * const *tbl, *c;
   2240
   2241	if (!modelname || !*modelname) {
   2242		ice->eeprom.subvendor = 0;
   2243		if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
   2244			ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
   2245				(snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
   2246				(snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
   2247				(snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
   2248		if (ice->eeprom.subvendor == 0 ||
   2249		    ice->eeprom.subvendor == (unsigned int)-1) {
   2250			/* invalid subvendor from EEPROM, try the PCI subststem ID instead */
   2251			u16 vendor, device;
   2252			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
   2253			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
   2254			ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
   2255			if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
   2256				dev_err(ice->card->dev,
   2257					"No valid ID is found\n");
   2258				return -ENXIO;
   2259			}
   2260		}
   2261	}
   2262	for (tbl = card_tables; *tbl; tbl++) {
   2263		for (c = *tbl; c->subvendor; c++) {
   2264			if (modelname && c->model && !strcmp(modelname, c->model)) {
   2265				dev_info(ice->card->dev,
   2266					 "Using board model %s\n", c->name);
   2267				ice->eeprom.subvendor = c->subvendor;
   2268			} else if (c->subvendor != ice->eeprom.subvendor)
   2269				continue;
   2270			if (!c->eeprom_size || !c->eeprom_data)
   2271				goto found;
   2272			/* if the EEPROM is given by the driver, use it */
   2273			dev_dbg(ice->card->dev, "using the defined eeprom..\n");
   2274			ice->eeprom.version = 1;
   2275			ice->eeprom.size = c->eeprom_size + 6;
   2276			memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
   2277			goto read_skipped;
   2278		}
   2279	}
   2280	dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
   2281	       ice->eeprom.subvendor);
   2282
   2283 found:
   2284	ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
   2285	if (ice->eeprom.size < 6)
   2286		ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
   2287	else if (ice->eeprom.size > 32) {
   2288		dev_err(ice->card->dev,
   2289			"invalid EEPROM (size = %i)\n", ice->eeprom.size);
   2290		return -EIO;
   2291	}
   2292	ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
   2293	if (ice->eeprom.version != 1) {
   2294		dev_err(ice->card->dev, "invalid EEPROM version %i\n",
   2295			   ice->eeprom.version);
   2296		/* return -EIO; */
   2297	}
   2298	size = ice->eeprom.size - 6;
   2299	for (i = 0; i < size; i++)
   2300		ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
   2301
   2302 read_skipped:
   2303	ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
   2304	ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
   2305	ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
   2306
   2307	return 0;
   2308}
   2309
   2310
   2311
   2312static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
   2313{
   2314	outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
   2315	udelay(200);
   2316	outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
   2317	udelay(200);
   2318	if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
   2319	    !ice->dxr_enable)
   2320		/*  Set eeprom value to limit active ADCs and DACs to 6;
   2321		 *  Also disable AC97 as no hardware in standard 6fire card/box
   2322		 *  Note: DXR extensions are not currently supported
   2323		 */
   2324		ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
   2325	pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
   2326	pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
   2327	pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
   2328	pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
   2329	if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24 &&
   2330	    ice->eeprom.subvendor != ICE1712_SUBDEVICE_STAUDIO_ADCIII) {
   2331		ice->gpio.write_mask = ice->eeprom.gpiomask;
   2332		ice->gpio.direction = ice->eeprom.gpiodir;
   2333		snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
   2334				  ice->eeprom.gpiomask);
   2335		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
   2336				  ice->eeprom.gpiodir);
   2337		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
   2338				  ice->eeprom.gpiostate);
   2339	} else {
   2340		ice->gpio.write_mask = 0xc0;
   2341		ice->gpio.direction = 0xff;
   2342		snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
   2343		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
   2344		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
   2345				  ICE1712_STDSP24_CLOCK_BIT);
   2346	}
   2347	snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
   2348	if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
   2349		outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
   2350		udelay(100);
   2351		outb(0, ICEREG(ice, AC97_CMD));
   2352		udelay(200);
   2353		snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
   2354	}
   2355	snd_ice1712_set_pro_rate(ice, 48000, 1);
   2356	/* unmask used interrupts */
   2357	outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
   2358	      ICE1712_IRQ_MPU2 : 0) |
   2359	     ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
   2360	      ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
   2361	     ICEREG(ice, IRQMASK));
   2362	outb(0x00, ICEMT(ice, IRQ));
   2363
   2364	return 0;
   2365}
   2366
   2367int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
   2368{
   2369	int err;
   2370	struct snd_kcontrol *kctl;
   2371
   2372	if (snd_BUG_ON(!ice->pcm_pro))
   2373		return -EIO;
   2374	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
   2375	if (err < 0)
   2376		return err;
   2377	kctl->id.device = ice->pcm_pro->device;
   2378	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
   2379	if (err < 0)
   2380		return err;
   2381	kctl->id.device = ice->pcm_pro->device;
   2382	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
   2383	if (err < 0)
   2384		return err;
   2385	kctl->id.device = ice->pcm_pro->device;
   2386	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
   2387	if (err < 0)
   2388		return err;
   2389	kctl->id.device = ice->pcm_pro->device;
   2390	ice->spdif.stream_ctl = kctl;
   2391	return 0;
   2392}
   2393
   2394
   2395static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
   2396{
   2397	int err;
   2398
   2399	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
   2400	if (err < 0)
   2401		return err;
   2402	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
   2403	if (err < 0)
   2404		return err;
   2405	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
   2406	if (err < 0)
   2407		return err;
   2408
   2409	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
   2410	if (err < 0)
   2411		return err;
   2412	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
   2413	if (err < 0)
   2414		return err;
   2415
   2416	if (ice->num_total_dacs > 0) {
   2417		struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
   2418		tmp.count = ice->num_total_dacs;
   2419		err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
   2420		if (err < 0)
   2421			return err;
   2422	}
   2423
   2424	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
   2425	if (err < 0)
   2426		return err;
   2427
   2428	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
   2429	if (err < 0)
   2430		return err;
   2431	return snd_ctl_add(ice->card,
   2432			   snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
   2433}
   2434
   2435static void snd_ice1712_free(struct snd_card *card)
   2436{
   2437	struct snd_ice1712 *ice = card->private_data;
   2438
   2439	if (ice->card_info && ice->card_info->chip_exit)
   2440		ice->card_info->chip_exit(ice);
   2441
   2442	/* mask all interrupts */
   2443	outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
   2444	outb(0xff, ICEREG(ice, IRQMASK));
   2445
   2446	snd_ice1712_akm4xxx_free(ice);
   2447}
   2448
   2449static int snd_ice1712_create(struct snd_card *card,
   2450			      struct pci_dev *pci,
   2451			      const char *modelname,
   2452			      int omni,
   2453			      int cs8427_timeout,
   2454			      int dxr_enable)
   2455{
   2456	struct snd_ice1712 *ice = card->private_data;
   2457	int err;
   2458
   2459	/* enable PCI device */
   2460	err = pcim_enable_device(pci);
   2461	if (err < 0)
   2462		return err;
   2463	/* check, if we can restrict PCI DMA transfers to 28 bits */
   2464	if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28))) {
   2465		dev_err(card->dev,
   2466			"architecture does not support 28bit PCI busmaster DMA\n");
   2467		return -ENXIO;
   2468	}
   2469
   2470	ice->omni = omni ? 1 : 0;
   2471	if (cs8427_timeout < 1)
   2472		cs8427_timeout = 1;
   2473	else if (cs8427_timeout > 1000)
   2474		cs8427_timeout = 1000;
   2475	ice->cs8427_timeout = cs8427_timeout;
   2476	ice->dxr_enable = dxr_enable;
   2477	spin_lock_init(&ice->reg_lock);
   2478	mutex_init(&ice->gpio_mutex);
   2479	mutex_init(&ice->i2c_mutex);
   2480	mutex_init(&ice->open_mutex);
   2481	ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
   2482	ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
   2483	ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
   2484	ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
   2485	ice->gpio.set_data = snd_ice1712_set_gpio_data;
   2486	ice->gpio.get_data = snd_ice1712_get_gpio_data;
   2487
   2488	ice->spdif.cs8403_bits =
   2489		ice->spdif.cs8403_stream_bits = (0x01 |	/* consumer format */
   2490						 0x10 |	/* no emphasis */
   2491						 0x20);	/* PCM encoder/decoder */
   2492	ice->card = card;
   2493	ice->pci = pci;
   2494	ice->irq = -1;
   2495	pci_set_master(pci);
   2496	/* disable legacy emulation */
   2497	pci_write_config_word(ice->pci, 0x40, 0x807f);
   2498	pci_write_config_word(ice->pci, 0x42, 0x0006);
   2499	snd_ice1712_proc_init(ice);
   2500
   2501	err = pci_request_regions(pci, "ICE1712");
   2502	if (err < 0)
   2503		return err;
   2504	ice->port = pci_resource_start(pci, 0);
   2505	ice->ddma_port = pci_resource_start(pci, 1);
   2506	ice->dmapath_port = pci_resource_start(pci, 2);
   2507	ice->profi_port = pci_resource_start(pci, 3);
   2508
   2509	if (devm_request_irq(&pci->dev, pci->irq, snd_ice1712_interrupt,
   2510			     IRQF_SHARED, KBUILD_MODNAME, ice)) {
   2511		dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
   2512		return -EIO;
   2513	}
   2514
   2515	ice->irq = pci->irq;
   2516	card->sync_irq = ice->irq;
   2517	card->private_free = snd_ice1712_free;
   2518
   2519	if (snd_ice1712_read_eeprom(ice, modelname) < 0)
   2520		return -EIO;
   2521	if (snd_ice1712_chip_init(ice) < 0)
   2522		return -EIO;
   2523
   2524	return 0;
   2525}
   2526
   2527
   2528/*
   2529 *
   2530 * Registration
   2531 *
   2532 */
   2533
   2534static struct snd_ice1712_card_info no_matched;
   2535
   2536static int snd_ice1712_probe(struct pci_dev *pci,
   2537			     const struct pci_device_id *pci_id)
   2538{
   2539	static int dev;
   2540	struct snd_card *card;
   2541	struct snd_ice1712 *ice;
   2542	int pcm_dev = 0, err;
   2543	const struct snd_ice1712_card_info * const *tbl, *c;
   2544
   2545	if (dev >= SNDRV_CARDS)
   2546		return -ENODEV;
   2547	if (!enable[dev]) {
   2548		dev++;
   2549		return -ENOENT;
   2550	}
   2551
   2552	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
   2553			   sizeof(*ice), &card);
   2554	if (err < 0)
   2555		return err;
   2556	ice = card->private_data;
   2557
   2558	strcpy(card->driver, "ICE1712");
   2559	strcpy(card->shortname, "ICEnsemble ICE1712");
   2560
   2561	err = snd_ice1712_create(card, pci, model[dev], omni[dev],
   2562				 cs8427_timeout[dev], dxr_enable[dev]);
   2563	if (err < 0)
   2564		return err;
   2565
   2566	for (tbl = card_tables; *tbl; tbl++) {
   2567		for (c = *tbl; c->subvendor; c++) {
   2568			if (c->subvendor == ice->eeprom.subvendor) {
   2569				strcpy(card->shortname, c->name);
   2570				if (c->driver) /* specific driver? */
   2571					strcpy(card->driver, c->driver);
   2572				if (c->chip_init) {
   2573					err = c->chip_init(ice);
   2574					if (err < 0)
   2575						return err;
   2576				}
   2577				ice->card_info = c;
   2578				goto __found;
   2579			}
   2580		}
   2581	}
   2582	c = &no_matched;
   2583 __found:
   2584
   2585	err = snd_ice1712_pcm_profi(ice, pcm_dev++);
   2586	if (err < 0)
   2587		return err;
   2588
   2589	if (ice_has_con_ac97(ice)) {
   2590		err = snd_ice1712_pcm(ice, pcm_dev++);
   2591		if (err < 0)
   2592			return err;
   2593	}
   2594
   2595	err = snd_ice1712_ac97_mixer(ice);
   2596	if (err < 0)
   2597		return err;
   2598
   2599	err = snd_ice1712_build_controls(ice);
   2600	if (err < 0)
   2601		return err;
   2602
   2603	if (c->build_controls) {
   2604		err = c->build_controls(ice);
   2605		if (err < 0)
   2606			return err;
   2607	}
   2608
   2609	if (ice_has_con_ac97(ice)) {
   2610		err = snd_ice1712_pcm_ds(ice, pcm_dev++);
   2611		if (err < 0)
   2612			return err;
   2613	}
   2614
   2615	if (!c->no_mpu401) {
   2616		err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
   2617			ICEREG(ice, MPU1_CTRL),
   2618			c->mpu401_1_info_flags |
   2619			MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
   2620			-1, &ice->rmidi[0]);
   2621		if (err < 0)
   2622			return err;
   2623		if (c->mpu401_1_name)
   2624			/*  Preferred name available in card_info */
   2625			snprintf(ice->rmidi[0]->name,
   2626				 sizeof(ice->rmidi[0]->name),
   2627				 "%s %d", c->mpu401_1_name, card->number);
   2628
   2629		if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
   2630			/*  2nd port used  */
   2631			err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
   2632				ICEREG(ice, MPU2_CTRL),
   2633				c->mpu401_2_info_flags |
   2634				MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
   2635				-1, &ice->rmidi[1]);
   2636
   2637			if (err < 0)
   2638				return err;
   2639			if (c->mpu401_2_name)
   2640				/*  Preferred name available in card_info */
   2641				snprintf(ice->rmidi[1]->name,
   2642					 sizeof(ice->rmidi[1]->name),
   2643					 "%s %d", c->mpu401_2_name,
   2644					 card->number);
   2645		}
   2646	}
   2647
   2648	snd_ice1712_set_input_clock_source(ice, 0);
   2649
   2650	sprintf(card->longname, "%s at 0x%lx, irq %i",
   2651		card->shortname, ice->port, ice->irq);
   2652
   2653	err = snd_card_register(card);
   2654	if (err < 0)
   2655		return err;
   2656	pci_set_drvdata(pci, card);
   2657	dev++;
   2658	return 0;
   2659}
   2660
   2661#ifdef CONFIG_PM_SLEEP
   2662static int snd_ice1712_suspend(struct device *dev)
   2663{
   2664	struct snd_card *card = dev_get_drvdata(dev);
   2665	struct snd_ice1712 *ice = card->private_data;
   2666
   2667	if (!ice->pm_suspend_enabled)
   2668		return 0;
   2669
   2670	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
   2671
   2672	snd_ac97_suspend(ice->ac97);
   2673
   2674	spin_lock_irq(&ice->reg_lock);
   2675	ice->pm_saved_is_spdif_master = is_spdif_master(ice);
   2676	ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
   2677	ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
   2678	spin_unlock_irq(&ice->reg_lock);
   2679
   2680	if (ice->pm_suspend)
   2681		ice->pm_suspend(ice);
   2682	return 0;
   2683}
   2684
   2685static int snd_ice1712_resume(struct device *dev)
   2686{
   2687	struct snd_card *card = dev_get_drvdata(dev);
   2688	struct snd_ice1712 *ice = card->private_data;
   2689	int rate;
   2690
   2691	if (!ice->pm_suspend_enabled)
   2692		return 0;
   2693
   2694	if (ice->cur_rate)
   2695		rate = ice->cur_rate;
   2696	else
   2697		rate = PRO_RATE_DEFAULT;
   2698
   2699	if (snd_ice1712_chip_init(ice) < 0) {
   2700		snd_card_disconnect(card);
   2701		return -EIO;
   2702	}
   2703
   2704	ice->cur_rate = rate;
   2705
   2706	if (ice->pm_resume)
   2707		ice->pm_resume(ice);
   2708
   2709	if (ice->pm_saved_is_spdif_master) {
   2710		/* switching to external clock via SPDIF */
   2711		spin_lock_irq(&ice->reg_lock);
   2712		outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
   2713			ICEMT(ice, RATE));
   2714		spin_unlock_irq(&ice->reg_lock);
   2715		snd_ice1712_set_input_clock_source(ice, 1);
   2716	} else {
   2717		/* internal on-card clock */
   2718		snd_ice1712_set_pro_rate(ice, rate, 1);
   2719		snd_ice1712_set_input_clock_source(ice, 0);
   2720	}
   2721
   2722	outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
   2723	outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
   2724
   2725	snd_ac97_resume(ice->ac97);
   2726
   2727	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
   2728	return 0;
   2729}
   2730
   2731static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
   2732#define SND_VT1712_PM_OPS	&snd_ice1712_pm
   2733#else
   2734#define SND_VT1712_PM_OPS	NULL
   2735#endif /* CONFIG_PM_SLEEP */
   2736
   2737static struct pci_driver ice1712_driver = {
   2738	.name = KBUILD_MODNAME,
   2739	.id_table = snd_ice1712_ids,
   2740	.probe = snd_ice1712_probe,
   2741	.driver = {
   2742		.pm = SND_VT1712_PM_OPS,
   2743	},
   2744};
   2745
   2746module_pci_driver(ice1712_driver);