cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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axi-i2s.c (7432B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2012-2013, Analog Devices Inc.
      4 * Author: Lars-Peter Clausen <lars@metafoo.de>
      5 */
      6
      7#include <linux/clk.h>
      8#include <linux/init.h>
      9#include <linux/kernel.h>
     10#include <linux/module.h>
     11#include <linux/of.h>
     12#include <linux/platform_device.h>
     13#include <linux/regmap.h>
     14#include <linux/slab.h>
     15
     16#include <sound/core.h>
     17#include <sound/pcm.h>
     18#include <sound/pcm_params.h>
     19#include <sound/soc.h>
     20#include <sound/dmaengine_pcm.h>
     21
     22#define AXI_I2S_REG_RESET	0x00
     23#define AXI_I2S_REG_CTRL	0x04
     24#define AXI_I2S_REG_CLK_CTRL	0x08
     25#define AXI_I2S_REG_STATUS	0x10
     26
     27#define AXI_I2S_REG_RX_FIFO	0x28
     28#define AXI_I2S_REG_TX_FIFO	0x2C
     29
     30#define AXI_I2S_RESET_GLOBAL	BIT(0)
     31#define AXI_I2S_RESET_TX_FIFO	BIT(1)
     32#define AXI_I2S_RESET_RX_FIFO	BIT(2)
     33
     34#define AXI_I2S_CTRL_TX_EN	BIT(0)
     35#define AXI_I2S_CTRL_RX_EN	BIT(1)
     36
     37/* The frame size is configurable, but for now we always set it 64 bit */
     38#define AXI_I2S_BITS_PER_FRAME 64
     39
     40struct axi_i2s {
     41	struct regmap *regmap;
     42	struct clk *clk;
     43	struct clk *clk_ref;
     44
     45	bool   has_capture;
     46	bool   has_playback;
     47
     48	struct snd_soc_dai_driver dai_driver;
     49
     50	struct snd_dmaengine_dai_dma_data capture_dma_data;
     51	struct snd_dmaengine_dai_dma_data playback_dma_data;
     52
     53	struct snd_ratnum ratnum;
     54	struct snd_pcm_hw_constraint_ratnums rate_constraints;
     55};
     56
     57static int axi_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
     58	struct snd_soc_dai *dai)
     59{
     60	struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
     61	unsigned int mask, val;
     62
     63	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
     64		mask = AXI_I2S_CTRL_RX_EN;
     65	else
     66		mask = AXI_I2S_CTRL_TX_EN;
     67
     68	switch (cmd) {
     69	case SNDRV_PCM_TRIGGER_START:
     70	case SNDRV_PCM_TRIGGER_RESUME:
     71	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
     72		val = mask;
     73		break;
     74	case SNDRV_PCM_TRIGGER_STOP:
     75	case SNDRV_PCM_TRIGGER_SUSPEND:
     76	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
     77		val = 0;
     78		break;
     79	default:
     80		return -EINVAL;
     81	}
     82
     83	regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val);
     84
     85	return 0;
     86}
     87
     88static int axi_i2s_hw_params(struct snd_pcm_substream *substream,
     89	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
     90{
     91	struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
     92	unsigned int bclk_div, word_size;
     93	unsigned int bclk_rate;
     94
     95	bclk_rate = params_rate(params) * AXI_I2S_BITS_PER_FRAME;
     96
     97	word_size = AXI_I2S_BITS_PER_FRAME / 2 - 1;
     98	bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1;
     99
    100	regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) |
    101		bclk_div);
    102
    103	return 0;
    104}
    105
    106static int axi_i2s_startup(struct snd_pcm_substream *substream,
    107	struct snd_soc_dai *dai)
    108{
    109	struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
    110	uint32_t mask;
    111	int ret;
    112
    113	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
    114		mask = AXI_I2S_RESET_RX_FIFO;
    115	else
    116		mask = AXI_I2S_RESET_TX_FIFO;
    117
    118	regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask);
    119
    120	ret = snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
    121			   SNDRV_PCM_HW_PARAM_RATE,
    122			   &i2s->rate_constraints);
    123	if (ret)
    124		return ret;
    125
    126	return clk_prepare_enable(i2s->clk_ref);
    127}
    128
    129static void axi_i2s_shutdown(struct snd_pcm_substream *substream,
    130	struct snd_soc_dai *dai)
    131{
    132	struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
    133
    134	clk_disable_unprepare(i2s->clk_ref);
    135}
    136
    137static int axi_i2s_dai_probe(struct snd_soc_dai *dai)
    138{
    139	struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai);
    140
    141	snd_soc_dai_init_dma_data(
    142		dai,
    143		i2s->has_playback ? &i2s->playback_dma_data : NULL,
    144		i2s->has_capture  ? &i2s->capture_dma_data  : NULL);
    145
    146	return 0;
    147}
    148
    149static const struct snd_soc_dai_ops axi_i2s_dai_ops = {
    150	.startup = axi_i2s_startup,
    151	.shutdown = axi_i2s_shutdown,
    152	.trigger = axi_i2s_trigger,
    153	.hw_params = axi_i2s_hw_params,
    154};
    155
    156static struct snd_soc_dai_driver axi_i2s_dai = {
    157	.probe = axi_i2s_dai_probe,
    158	.ops = &axi_i2s_dai_ops,
    159	.symmetric_rate = 1,
    160};
    161
    162static const struct snd_soc_component_driver axi_i2s_component = {
    163	.name = "axi-i2s",
    164};
    165
    166static const struct regmap_config axi_i2s_regmap_config = {
    167	.reg_bits = 32,
    168	.reg_stride = 4,
    169	.val_bits = 32,
    170	.max_register = AXI_I2S_REG_STATUS,
    171};
    172
    173static void axi_i2s_parse_of(struct axi_i2s *i2s, const struct device_node *np)
    174{
    175	struct property *dma_names;
    176	const char *dma_name;
    177
    178	of_property_for_each_string(np, "dma-names", dma_names, dma_name) {
    179		if (strcmp(dma_name, "rx") == 0)
    180			i2s->has_capture = true;
    181		if (strcmp(dma_name, "tx") == 0)
    182			i2s->has_playback = true;
    183	}
    184}
    185
    186static int axi_i2s_probe(struct platform_device *pdev)
    187{
    188	struct resource *res;
    189	struct axi_i2s *i2s;
    190	void __iomem *base;
    191	int ret;
    192
    193	i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
    194	if (!i2s)
    195		return -ENOMEM;
    196
    197	platform_set_drvdata(pdev, i2s);
    198
    199	axi_i2s_parse_of(i2s, pdev->dev.of_node);
    200
    201	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
    202	if (IS_ERR(base))
    203		return PTR_ERR(base);
    204
    205	i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base,
    206		&axi_i2s_regmap_config);
    207	if (IS_ERR(i2s->regmap))
    208		return PTR_ERR(i2s->regmap);
    209
    210	i2s->clk = devm_clk_get(&pdev->dev, "axi");
    211	if (IS_ERR(i2s->clk))
    212		return PTR_ERR(i2s->clk);
    213
    214	i2s->clk_ref = devm_clk_get(&pdev->dev, "ref");
    215	if (IS_ERR(i2s->clk_ref))
    216		return PTR_ERR(i2s->clk_ref);
    217
    218	ret = clk_prepare_enable(i2s->clk);
    219	if (ret)
    220		return ret;
    221
    222	if (i2s->has_playback) {
    223		axi_i2s_dai.playback.channels_min = 2;
    224		axi_i2s_dai.playback.channels_max = 2;
    225		axi_i2s_dai.playback.rates = SNDRV_PCM_RATE_KNOT;
    226		axi_i2s_dai.playback.formats =
    227			SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE;
    228
    229		i2s->playback_dma_data.addr = res->start + AXI_I2S_REG_TX_FIFO;
    230		i2s->playback_dma_data.addr_width = 4;
    231		i2s->playback_dma_data.maxburst = 1;
    232	}
    233
    234	if (i2s->has_capture) {
    235		axi_i2s_dai.capture.channels_min = 2;
    236		axi_i2s_dai.capture.channels_max = 2;
    237		axi_i2s_dai.capture.rates = SNDRV_PCM_RATE_KNOT;
    238		axi_i2s_dai.capture.formats =
    239			SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE;
    240
    241		i2s->capture_dma_data.addr = res->start + AXI_I2S_REG_RX_FIFO;
    242		i2s->capture_dma_data.addr_width = 4;
    243		i2s->capture_dma_data.maxburst = 1;
    244	}
    245
    246	i2s->ratnum.num = clk_get_rate(i2s->clk_ref) / 2 / AXI_I2S_BITS_PER_FRAME;
    247	i2s->ratnum.den_step = 1;
    248	i2s->ratnum.den_min = 1;
    249	i2s->ratnum.den_max = 64;
    250
    251	i2s->rate_constraints.rats = &i2s->ratnum;
    252	i2s->rate_constraints.nrats = 1;
    253
    254	regmap_write(i2s->regmap, AXI_I2S_REG_RESET, AXI_I2S_RESET_GLOBAL);
    255
    256	ret = devm_snd_soc_register_component(&pdev->dev, &axi_i2s_component,
    257					 &axi_i2s_dai, 1);
    258	if (ret)
    259		goto err_clk_disable;
    260
    261	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
    262	if (ret)
    263		goto err_clk_disable;
    264
    265	dev_info(&pdev->dev, "probed, capture %s, playback %s\n",
    266		 i2s->has_capture ? "enabled" : "disabled",
    267		 i2s->has_playback ? "enabled" : "disabled");
    268
    269	return 0;
    270
    271err_clk_disable:
    272	clk_disable_unprepare(i2s->clk);
    273	return ret;
    274}
    275
    276static int axi_i2s_dev_remove(struct platform_device *pdev)
    277{
    278	struct axi_i2s *i2s = platform_get_drvdata(pdev);
    279
    280	clk_disable_unprepare(i2s->clk);
    281
    282	return 0;
    283}
    284
    285static const struct of_device_id axi_i2s_of_match[] = {
    286	{ .compatible = "adi,axi-i2s-1.00.a", },
    287	{},
    288};
    289MODULE_DEVICE_TABLE(of, axi_i2s_of_match);
    290
    291static struct platform_driver axi_i2s_driver = {
    292	.driver = {
    293		.name = "axi-i2s",
    294		.of_match_table = axi_i2s_of_match,
    295	},
    296	.probe = axi_i2s_probe,
    297	.remove = axi_i2s_dev_remove,
    298};
    299module_platform_driver(axi_i2s_driver);
    300
    301MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
    302MODULE_DESCRIPTION("AXI I2S driver");
    303MODULE_LICENSE("GPL");