cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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atmel-pcm.h (2747B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC.
      4 *
      5 *  Copyright (C) 2005 SAN People
      6 *  Copyright (C) 2008 Atmel
      7 *
      8 * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com>
      9 *
     10 * Based on at91-pcm. by:
     11 * Frank Mandarino <fmandarino@endrelia.com>
     12 * Copyright 2006 Endrelia Technologies Inc.
     13 *
     14 * Based on pxa2xx-pcm.c by:
     15 *
     16 * Author:	Nicolas Pitre
     17 * Created:	Nov 30, 2004
     18 * Copyright:	(C) 2004 MontaVista Software, Inc.
     19 */
     20
     21#ifndef _ATMEL_PCM_H
     22#define _ATMEL_PCM_H
     23
     24#include <linux/atmel-ssc.h>
     25
     26#define ATMEL_SSC_DMABUF_SIZE	(64 * 1024)
     27
     28/*
     29 * Registers and status bits that are required by the PCM driver.
     30 */
     31struct atmel_pdc_regs {
     32	unsigned int	xpr;		/* PDC recv/trans pointer */
     33	unsigned int	xcr;		/* PDC recv/trans counter */
     34	unsigned int	xnpr;		/* PDC next recv/trans pointer */
     35	unsigned int	xncr;		/* PDC next recv/trans counter */
     36	unsigned int	ptcr;		/* PDC transfer control */
     37};
     38
     39struct atmel_ssc_mask {
     40	u32	ssc_enable;		/* SSC recv/trans enable */
     41	u32	ssc_disable;		/* SSC recv/trans disable */
     42	u32	ssc_error;		/* SSC error conditions */
     43	u32	ssc_endx;		/* SSC ENDTX or ENDRX */
     44	u32	ssc_endbuf;		/* SSC TXBUFE or RXBUFF */
     45	u32	pdc_enable;		/* PDC recv/trans enable */
     46	u32	pdc_disable;		/* PDC recv/trans disable */
     47};
     48
     49/*
     50 * This structure, shared between the PCM driver and the interface,
     51 * contains all information required by the PCM driver to perform the
     52 * PDC DMA operation.  All fields except dma_intr_handler() are initialized
     53 * by the interface.  The dma_intr_handler() pointer is set by the PCM
     54 * driver and called by the interface SSC interrupt handler if it is
     55 * non-NULL.
     56 */
     57struct atmel_pcm_dma_params {
     58	char *name;			/* stream identifier */
     59	int pdc_xfer_size;		/* PDC counter increment in bytes */
     60	struct ssc_device *ssc;		/* SSC device for stream */
     61	struct atmel_pdc_regs *pdc;	/* PDC receive or transmit registers */
     62	struct atmel_ssc_mask *mask;	/* SSC & PDC status bits */
     63	struct snd_pcm_substream *substream;
     64	void (*dma_intr_handler)(u32, struct snd_pcm_substream *);
     65};
     66
     67/*
     68 * SSC register access (since ssc_writel() / ssc_readl() require literal name)
     69 */
     70#define ssc_readx(base, reg)            (__raw_readl((base) + (reg)))
     71#define ssc_writex(base, reg, value)    __raw_writel((value), (base) + (reg))
     72
     73#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_PDC)
     74int atmel_pcm_pdc_platform_register(struct device *dev);
     75#else
     76static inline int atmel_pcm_pdc_platform_register(struct device *dev)
     77{
     78	return 0;
     79}
     80#endif
     81
     82#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_DMA)
     83int atmel_pcm_dma_platform_register(struct device *dev);
     84#else
     85static inline int atmel_pcm_dma_platform_register(struct device *dev)
     86{
     87	return 0;
     88}
     89#endif
     90
     91#endif /* _ATMEL_PCM_H */