cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cs4265.h (1377B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * cs4265.h -- CS4265 ALSA SoC audio driver
      4 *
      5 * Copyright 2014 Cirrus Logic, Inc.
      6 *
      7 * Author: Paul Handrigan <paul.handrigan@cirrus.com>
      8 */
      9
     10#ifndef __CS4265_H__
     11#define __CS4265_H__
     12
     13#define CS4265_CHIP_ID				0x1
     14#define CS4265_CHIP_ID_VAL			0xD0
     15#define CS4265_CHIP_ID_MASK			0xF0
     16#define CS4265_REV_ID_MASK			0x0F
     17
     18#define CS4265_PWRCTL				0x02
     19#define CS4265_PWRCTL_PDN			1
     20
     21#define CS4265_DAC_CTL				0x3
     22#define CS4265_DAC_CTL_MUTE			(1 << 2)
     23#define CS4265_DAC_CTL_DIF			(3 << 4)
     24
     25#define CS4265_ADC_CTL				0x4
     26#define CS4265_ADC_MASTER			1
     27#define CS4265_ADC_DIF				(1 << 4)
     28#define CS4265_ADC_FM				(3 << 6)
     29
     30#define CS4265_MCLK_FREQ			0x5
     31#define CS4265_MCLK_FREQ_MASK			(7 << 4)
     32
     33#define CS4265_SIG_SEL				0x6
     34#define CS4265_SIG_SEL_LOOP			(1 << 1)
     35
     36#define CS4265_CHB_PGA_CTL			0x7
     37#define CS4265_CHA_PGA_CTL			0x8
     38
     39#define CS4265_ADC_CTL2				0x9
     40
     41#define CS4265_DAC_CHA_VOL			0xA
     42#define CS4265_DAC_CHB_VOL			0xB
     43
     44#define CS4265_DAC_CTL2				0xC
     45
     46#define CS4265_INT_STATUS			0xD
     47#define CS4265_INT_MASK				0xE
     48#define CS4265_STATUS_MODE_MSB			0xF
     49#define CS4265_STATUS_MODE_LSB			0x10
     50
     51#define CS4265_SPDIF_CTL1			0x11
     52
     53#define CS4265_SPDIF_CTL2			0x12
     54#define CS4265_SPDIF_CTL2_MUTE			(1 << 4)
     55#define CS4265_SPDIF_CTL2_DIF			(3 << 6)
     56
     57#define CS4265_C_DATA_BUFF			0x13
     58#define CS4265_MAX_REGISTER			0x2A
     59
     60#endif