cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

da7213.c (66666B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * DA7213 ALSA SoC Codec Driver
      4 *
      5 * Copyright (c) 2013 Dialog Semiconductor
      6 *
      7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
      8 * Based on DA9055 ALSA SoC codec driver.
      9 */
     10
     11#include <linux/acpi.h>
     12#include <linux/of_device.h>
     13#include <linux/property.h>
     14#include <linux/clk.h>
     15#include <linux/delay.h>
     16#include <linux/i2c.h>
     17#include <linux/regmap.h>
     18#include <linux/slab.h>
     19#include <linux/module.h>
     20#include <sound/pcm.h>
     21#include <sound/pcm_params.h>
     22#include <linux/pm_runtime.h>
     23#include <sound/soc.h>
     24#include <sound/initval.h>
     25#include <sound/tlv.h>
     26
     27#include <sound/da7213.h>
     28#include "da7213.h"
     29
     30
     31/* Gain and Volume */
     32static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
     33	/* -54dB */
     34	0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
     35	/* -52.5dB to 15dB */
     36	0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
     37);
     38
     39static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
     40	0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
     41	/* -78dB to 12dB */
     42	0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
     43);
     44
     45static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
     46	0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
     47	/* 0dB to 36dB */
     48	0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
     49);
     50
     51static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
     52static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
     53static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
     54static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
     55static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
     56static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
     57static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
     58
     59/* ADC and DAC voice mode (8kHz) high pass cutoff value */
     60static const char * const da7213_voice_hpf_corner_txt[] = {
     61	"2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
     62};
     63
     64static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
     65			    DA7213_DAC_FILTERS1,
     66			    DA7213_VOICE_HPF_CORNER_SHIFT,
     67			    da7213_voice_hpf_corner_txt);
     68
     69static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
     70			    DA7213_ADC_FILTERS1,
     71			    DA7213_VOICE_HPF_CORNER_SHIFT,
     72			    da7213_voice_hpf_corner_txt);
     73
     74/* ADC and DAC high pass filter cutoff value */
     75static const char * const da7213_audio_hpf_corner_txt[] = {
     76	"Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
     77};
     78
     79static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
     80			    DA7213_DAC_FILTERS1
     81			    , DA7213_AUDIO_HPF_CORNER_SHIFT,
     82			    da7213_audio_hpf_corner_txt);
     83
     84static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
     85			    DA7213_ADC_FILTERS1,
     86			    DA7213_AUDIO_HPF_CORNER_SHIFT,
     87			    da7213_audio_hpf_corner_txt);
     88
     89/* Gain ramping rate value */
     90static const char * const da7213_gain_ramp_rate_txt[] = {
     91	"nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
     92	"nominal rate / 32"
     93};
     94
     95static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
     96			    DA7213_GAIN_RAMP_CTRL,
     97			    DA7213_GAIN_RAMP_RATE_SHIFT,
     98			    da7213_gain_ramp_rate_txt);
     99
    100/* DAC noise gate setup time value */
    101static const char * const da7213_dac_ng_setup_time_txt[] = {
    102	"256 samples", "512 samples", "1024 samples", "2048 samples"
    103};
    104
    105static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
    106			    DA7213_DAC_NG_SETUP_TIME,
    107			    DA7213_DAC_NG_SETUP_TIME_SHIFT,
    108			    da7213_dac_ng_setup_time_txt);
    109
    110/* DAC noise gate rampup rate value */
    111static const char * const da7213_dac_ng_rampup_txt[] = {
    112	"0.02 ms/dB", "0.16 ms/dB"
    113};
    114
    115static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
    116			    DA7213_DAC_NG_SETUP_TIME,
    117			    DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
    118			    da7213_dac_ng_rampup_txt);
    119
    120/* DAC noise gate rampdown rate value */
    121static const char * const da7213_dac_ng_rampdown_txt[] = {
    122	"0.64 ms/dB", "20.48 ms/dB"
    123};
    124
    125static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
    126			    DA7213_DAC_NG_SETUP_TIME,
    127			    DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
    128			    da7213_dac_ng_rampdown_txt);
    129
    130/* DAC soft mute rate value */
    131static const char * const da7213_dac_soft_mute_rate_txt[] = {
    132	"1", "2", "4", "8", "16", "32", "64"
    133};
    134
    135static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
    136			    DA7213_DAC_FILTERS5,
    137			    DA7213_DAC_SOFTMUTE_RATE_SHIFT,
    138			    da7213_dac_soft_mute_rate_txt);
    139
    140/* ALC Attack Rate select */
    141static const char * const da7213_alc_attack_rate_txt[] = {
    142	"44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
    143	"5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
    144};
    145
    146static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
    147			    DA7213_ALC_CTRL2,
    148			    DA7213_ALC_ATTACK_SHIFT,
    149			    da7213_alc_attack_rate_txt);
    150
    151/* ALC Release Rate select */
    152static const char * const da7213_alc_release_rate_txt[] = {
    153	"176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
    154	"11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
    155};
    156
    157static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
    158			    DA7213_ALC_CTRL2,
    159			    DA7213_ALC_RELEASE_SHIFT,
    160			    da7213_alc_release_rate_txt);
    161
    162/* ALC Hold Time select */
    163static const char * const da7213_alc_hold_time_txt[] = {
    164	"62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
    165	"7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
    166	"253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
    167};
    168
    169static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
    170			    DA7213_ALC_CTRL3,
    171			    DA7213_ALC_HOLD_SHIFT,
    172			    da7213_alc_hold_time_txt);
    173
    174/* ALC Input Signal Tracking rate select */
    175static const char * const da7213_alc_integ_rate_txt[] = {
    176	"1/4", "1/16", "1/256", "1/65536"
    177};
    178
    179static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
    180			    DA7213_ALC_CTRL3,
    181			    DA7213_ALC_INTEG_ATTACK_SHIFT,
    182			    da7213_alc_integ_rate_txt);
    183
    184static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
    185			    DA7213_ALC_CTRL3,
    186			    DA7213_ALC_INTEG_RELEASE_SHIFT,
    187			    da7213_alc_integ_rate_txt);
    188
    189
    190/*
    191 * Control Functions
    192 */
    193
    194static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val)
    195{
    196	int mid_data, top_data;
    197	int sum = 0;
    198	u8 iteration;
    199
    200	for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
    201	     iteration++) {
    202		/* Select the left or right channel and capture data */
    203		snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
    204
    205		/* Select middle 8 bits for read back from data register */
    206		snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
    207			      reg_val | DA7213_ALC_DATA_MIDDLE);
    208		mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
    209
    210		/* Select top 8 bits for read back from data register */
    211		snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
    212			      reg_val | DA7213_ALC_DATA_TOP);
    213		top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
    214
    215		sum += ((mid_data << 8) | (top_data << 16));
    216	}
    217
    218	return sum / DA7213_ALC_AVG_ITERATIONS;
    219}
    220
    221static void da7213_alc_calib_man(struct snd_soc_component *component)
    222{
    223	u8 reg_val;
    224	int avg_left_data, avg_right_data, offset_l, offset_r;
    225
    226	/* Calculate average for Left and Right data */
    227	/* Left Data */
    228	avg_left_data = da7213_get_alc_data(component,
    229			DA7213_ALC_CIC_OP_CHANNEL_LEFT);
    230	/* Right Data */
    231	avg_right_data = da7213_get_alc_data(component,
    232			 DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
    233
    234	/* Calculate DC offset */
    235	offset_l = -avg_left_data;
    236	offset_r = -avg_right_data;
    237
    238	reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
    239	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
    240	reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
    241	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
    242
    243	reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
    244	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
    245	reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
    246	snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
    247
    248	/* Enable analog/digital gain mode & offset cancellation */
    249	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
    250			    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
    251			    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
    252}
    253
    254static void da7213_alc_calib_auto(struct snd_soc_component *component)
    255{
    256	u8 alc_ctrl1;
    257
    258	/* Begin auto calibration and wait for completion */
    259	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
    260			    DA7213_ALC_AUTO_CALIB_EN);
    261	do {
    262		alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1);
    263	} while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
    264
    265	/* If auto calibration fails, fall back to digital gain only mode */
    266	if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
    267		dev_warn(component->dev,
    268			 "ALC auto calibration failed with overflow\n");
    269		snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
    270				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
    271				    0);
    272	} else {
    273		/* Enable analog/digital gain mode & offset cancellation */
    274		snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
    275				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
    276				    DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
    277	}
    278
    279}
    280
    281static void da7213_alc_calib(struct snd_soc_component *component)
    282{
    283	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
    284	u8 adc_l_ctrl, adc_r_ctrl;
    285	u8 mixin_l_sel, mixin_r_sel;
    286	u8 mic_1_ctrl, mic_2_ctrl;
    287
    288	/* Save current values from ADC control registers */
    289	adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL);
    290	adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL);
    291
    292	/* Save current values from MIXIN_L/R_SELECT registers */
    293	mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT);
    294	mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT);
    295
    296	/* Save current values from MIC control registers */
    297	mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL);
    298	mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL);
    299
    300	/* Enable ADC Left and Right */
    301	snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
    302			    DA7213_ADC_EN);
    303	snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
    304			    DA7213_ADC_EN);
    305
    306	/* Enable MIC paths */
    307	snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT,
    308			    DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
    309			    DA7213_MIXIN_L_MIX_SELECT_MIC_2,
    310			    DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
    311			    DA7213_MIXIN_L_MIX_SELECT_MIC_2);
    312	snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT,
    313			    DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
    314			    DA7213_MIXIN_R_MIX_SELECT_MIC_1,
    315			    DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
    316			    DA7213_MIXIN_R_MIX_SELECT_MIC_1);
    317
    318	/* Mute MIC PGAs */
    319	snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
    320			    DA7213_MUTE_EN);
    321	snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
    322			    DA7213_MUTE_EN);
    323
    324	/* Perform calibration */
    325	if (da7213->alc_calib_auto)
    326		da7213_alc_calib_auto(component);
    327	else
    328		da7213_alc_calib_man(component);
    329
    330	/* Restore MIXIN_L/R_SELECT registers to their original states */
    331	snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, mixin_l_sel);
    332	snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, mixin_r_sel);
    333
    334	/* Restore ADC control registers to their original states */
    335	snd_soc_component_write(component, DA7213_ADC_L_CTRL, adc_l_ctrl);
    336	snd_soc_component_write(component, DA7213_ADC_R_CTRL, adc_r_ctrl);
    337
    338	/* Restore original values of MIC control registers */
    339	snd_soc_component_write(component, DA7213_MIC_1_CTRL, mic_1_ctrl);
    340	snd_soc_component_write(component, DA7213_MIC_2_CTRL, mic_2_ctrl);
    341}
    342
    343static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
    344				struct snd_ctl_elem_value *ucontrol)
    345{
    346	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
    347	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
    348	int ret;
    349
    350	ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
    351
    352	/* If ALC in operation, make sure calibrated offsets are updated */
    353	if ((!ret) && (da7213->alc_en))
    354		da7213_alc_calib(component);
    355
    356	return ret;
    357}
    358
    359static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
    360			    struct snd_ctl_elem_value *ucontrol)
    361{
    362	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
    363	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
    364
    365	/* Force ALC offset calibration if enabling ALC */
    366	if (ucontrol->value.integer.value[0] ||
    367	    ucontrol->value.integer.value[1]) {
    368		if (!da7213->alc_en) {
    369			da7213_alc_calib(component);
    370			da7213->alc_en = true;
    371		}
    372	} else {
    373		da7213->alc_en = false;
    374	}
    375
    376	return snd_soc_put_volsw(kcontrol, ucontrol);
    377}
    378
    379
    380/*
    381 * KControls
    382 */
    383
    384static const struct snd_kcontrol_new da7213_snd_controls[] = {
    385
    386	/* Volume controls */
    387	SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
    388		       DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
    389		       DA7213_NO_INVERT, mic_vol_tlv),
    390	SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
    391		       DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
    392		       DA7213_NO_INVERT, mic_vol_tlv),
    393	SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
    394			 DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
    395			 DA7213_NO_INVERT, aux_vol_tlv),
    396	SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
    397			     DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
    398			     DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
    399			     snd_soc_get_volsw_2r, da7213_put_mixin_gain,
    400			     mixin_gain_tlv),
    401	SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
    402			 DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
    403			 DA7213_NO_INVERT, digital_gain_tlv),
    404	SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
    405			 DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
    406			 DA7213_NO_INVERT, digital_gain_tlv),
    407	SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
    408			 DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
    409			 DA7213_NO_INVERT, hp_vol_tlv),
    410	SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
    411		       DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
    412		       DA7213_NO_INVERT, lineout_vol_tlv),
    413
    414	/* DAC Equalizer controls */
    415	SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
    416		   DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
    417	SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
    418		       DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
    419		       DA7213_NO_INVERT, eq_gain_tlv),
    420	SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
    421		       DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
    422		       DA7213_NO_INVERT, eq_gain_tlv),
    423	SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
    424		       DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
    425		       DA7213_NO_INVERT, eq_gain_tlv),
    426	SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
    427		       DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
    428		       DA7213_NO_INVERT, eq_gain_tlv),
    429	SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
    430		       DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
    431		       DA7213_NO_INVERT, eq_gain_tlv),
    432
    433	/* High Pass Filter and Voice Mode controls */
    434	SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
    435		   DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
    436	SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
    437	SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
    438		   DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
    439		   DA7213_NO_INVERT),
    440	SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
    441
    442	SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
    443		   DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
    444	SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
    445	SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
    446		   DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
    447		   DA7213_NO_INVERT),
    448	SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
    449
    450	/* Mute controls */
    451	SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
    452		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
    453	SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
    454		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
    455	SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
    456		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
    457	SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
    458		     DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
    459		     DA7213_MUTE_EN_MAX, DA7213_INVERT),
    460	SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
    461		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
    462	SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
    463		     DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
    464	SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
    465		   DA7213_MUTE_EN_MAX, DA7213_INVERT),
    466	SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
    467		   DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
    468		   DA7213_NO_INVERT),
    469	SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
    470
    471	/* Zero Cross controls */
    472	SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
    473		     DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
    474	SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
    475		     DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
    476		     DA7213_NO_INVERT),
    477	SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
    478		     DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
    479
    480	/* Gain Ramping controls */
    481	SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
    482		     DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
    483		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
    484	SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
    485		     DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
    486		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
    487	SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
    488		     DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
    489		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
    490	SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
    491		     DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
    492		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
    493	SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
    494		     DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
    495		     DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
    496	SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
    497		   DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
    498		   DA7213_NO_INVERT),
    499	SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
    500
    501	/* DAC Noise Gate controls */
    502	SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
    503		   DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
    504	SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
    505	SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
    506	SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
    507	SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
    508		   DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
    509		   DA7213_NO_INVERT),
    510	SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
    511		   DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
    512		   DA7213_NO_INVERT),
    513
    514	/* DAC Routing & Inversion */
    515	SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
    516		   DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
    517		   DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
    518	SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
    519		   DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
    520		   DA7213_NO_INVERT),
    521
    522	/* DMIC controls */
    523	SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
    524		     DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
    525		     DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
    526
    527	/* ALC Controls */
    528	SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
    529		       DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
    530		       DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
    531	SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
    532	SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
    533	SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
    534	/*
    535	 * Rate at which input signal envelope is tracked as the signal gets
    536	 * larger
    537	 */
    538	SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
    539	/*
    540	 * Rate at which input signal envelope is tracked as the signal gets
    541	 * smaller
    542	 */
    543	SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
    544	SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
    545		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
    546		       DA7213_INVERT, alc_threshold_tlv),
    547	SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
    548		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
    549		       DA7213_INVERT, alc_threshold_tlv),
    550	SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
    551		       DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
    552		       DA7213_INVERT, alc_threshold_tlv),
    553	SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
    554		       DA7213_ALC_ATTEN_MAX_SHIFT,
    555		       DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
    556		       alc_gain_tlv),
    557	SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
    558		       DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
    559		       DA7213_NO_INVERT, alc_gain_tlv),
    560	SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
    561		       DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
    562		       DA7213_NO_INVERT, alc_analog_gain_tlv),
    563	SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
    564		       DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
    565		       DA7213_NO_INVERT, alc_analog_gain_tlv),
    566	SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
    567		   DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
    568		   DA7213_NO_INVERT),
    569	SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
    570		   DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
    571		   DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
    572};
    573
    574
    575/*
    576 * DAPM
    577 */
    578
    579/*
    580 * Enums
    581 */
    582
    583/* MIC PGA source select */
    584static const char * const da7213_mic_amp_in_sel_txt[] = {
    585	"Differential", "MIC_P", "MIC_N"
    586};
    587
    588static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
    589			    DA7213_MIC_1_CTRL,
    590			    DA7213_MIC_AMP_IN_SEL_SHIFT,
    591			    da7213_mic_amp_in_sel_txt);
    592static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
    593	SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
    594
    595static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
    596			    DA7213_MIC_2_CTRL,
    597			    DA7213_MIC_AMP_IN_SEL_SHIFT,
    598			    da7213_mic_amp_in_sel_txt);
    599static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
    600	SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
    601
    602/* DAI routing select */
    603static const char * const da7213_dai_src_txt[] = {
    604	"ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
    605};
    606
    607static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
    608			    DA7213_DIG_ROUTING_DAI,
    609			    DA7213_DAI_L_SRC_SHIFT,
    610			    da7213_dai_src_txt);
    611static const struct snd_kcontrol_new da7213_dai_l_src_mux =
    612	SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
    613
    614static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
    615			    DA7213_DIG_ROUTING_DAI,
    616			    DA7213_DAI_R_SRC_SHIFT,
    617			    da7213_dai_src_txt);
    618static const struct snd_kcontrol_new da7213_dai_r_src_mux =
    619	SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
    620
    621/* DAC routing select */
    622static const char * const da7213_dac_src_txt[] = {
    623	"ADC Output Left", "ADC Output Right", "DAI Input Left",
    624	"DAI Input Right"
    625};
    626
    627static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
    628			    DA7213_DIG_ROUTING_DAC,
    629			    DA7213_DAC_L_SRC_SHIFT,
    630			    da7213_dac_src_txt);
    631static const struct snd_kcontrol_new da7213_dac_l_src_mux =
    632	SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
    633
    634static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
    635			    DA7213_DIG_ROUTING_DAC,
    636			    DA7213_DAC_R_SRC_SHIFT,
    637			    da7213_dac_src_txt);
    638static const struct snd_kcontrol_new da7213_dac_r_src_mux =
    639	SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
    640
    641/*
    642 * Mixer Controls
    643 */
    644
    645/* Mixin Left */
    646static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
    647	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
    648			DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
    649			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    650	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
    651			DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
    652			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    653	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
    654			DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
    655			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    656	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
    657			DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
    658			DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    659};
    660
    661/* Mixin Right */
    662static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
    663	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
    664			DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
    665			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    666	SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
    667			DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
    668			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    669	SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
    670			DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
    671			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    672	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
    673			DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
    674			DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    675};
    676
    677/* Mixout Left */
    678static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
    679	SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
    680			DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
    681			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    682	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
    683			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
    684			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    685	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
    686			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
    687			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    688	SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
    689			DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
    690			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    691	SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
    692			DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
    693			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    694	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
    695			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
    696			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    697	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
    698			DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
    699			DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
    700};
    701
    702/* Mixout Right */
    703static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
    704	SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
    705			DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
    706			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    707	SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
    708			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
    709			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    710	SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
    711			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
    712			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    713	SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
    714			DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
    715			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    716	SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
    717			DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
    718			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    719	SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
    720			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
    721			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    722	SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
    723			DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
    724			DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
    725};
    726
    727
    728/*
    729 * DAPM Events
    730 */
    731
    732static int da7213_dai_event(struct snd_soc_dapm_widget *w,
    733			    struct snd_kcontrol *kcontrol, int event)
    734{
    735	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
    736	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
    737	u8 pll_ctrl, pll_status;
    738	int i = 0;
    739	bool srm_lock = false;
    740
    741	switch (event) {
    742	case SND_SOC_DAPM_PRE_PMU:
    743		/* Enable DAI clks for master mode */
    744		if (da7213->master)
    745			snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
    746					    DA7213_DAI_CLK_EN_MASK,
    747					    DA7213_DAI_CLK_EN_MASK);
    748
    749		/* PC synchronised to DAI */
    750		snd_soc_component_update_bits(component, DA7213_PC_COUNT,
    751				    DA7213_PC_FREERUN_MASK, 0);
    752
    753		/* If SRM not enabled then nothing more to do */
    754		pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
    755		if (!(pll_ctrl & DA7213_PLL_SRM_EN))
    756			return 0;
    757
    758		/* Assist 32KHz mode PLL lock */
    759		if (pll_ctrl & DA7213_PLL_32K_MODE) {
    760			snd_soc_component_write(component, 0xF0, 0x8B);
    761			snd_soc_component_write(component, 0xF2, 0x03);
    762			snd_soc_component_write(component, 0xF0, 0x00);
    763		}
    764
    765		/* Check SRM has locked */
    766		do {
    767			pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS);
    768			if (pll_status & DA7219_PLL_SRM_LOCK) {
    769				srm_lock = true;
    770			} else {
    771				++i;
    772				msleep(50);
    773			}
    774		} while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock));
    775
    776		if (!srm_lock)
    777			dev_warn(component->dev, "SRM failed to lock\n");
    778
    779		return 0;
    780	case SND_SOC_DAPM_POST_PMD:
    781		/* Revert 32KHz PLL lock udpates if applied previously */
    782		pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
    783		if (pll_ctrl & DA7213_PLL_32K_MODE) {
    784			snd_soc_component_write(component, 0xF0, 0x8B);
    785			snd_soc_component_write(component, 0xF2, 0x01);
    786			snd_soc_component_write(component, 0xF0, 0x00);
    787		}
    788
    789		/* PC free-running */
    790		snd_soc_component_update_bits(component, DA7213_PC_COUNT,
    791				    DA7213_PC_FREERUN_MASK,
    792				    DA7213_PC_FREERUN_MASK);
    793
    794		/* Disable DAI clks if in master mode */
    795		if (da7213->master)
    796			snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
    797					    DA7213_DAI_CLK_EN_MASK, 0);
    798		return 0;
    799	default:
    800		return -EINVAL;
    801	}
    802}
    803
    804
    805/*
    806 * DAPM widgets
    807 */
    808
    809static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
    810	/*
    811	 * Power Supply
    812	 */
    813	SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0),
    814
    815	/*
    816	 * Input & Output
    817	 */
    818
    819	/* Use a supply here as this controls both input & output DAIs */
    820	SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
    821			    DA7213_NO_INVERT, da7213_dai_event,
    822			    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
    823
    824	/*
    825	 * Input
    826	 */
    827
    828	/* Input Lines */
    829	SND_SOC_DAPM_INPUT("MIC1"),
    830	SND_SOC_DAPM_INPUT("MIC2"),
    831	SND_SOC_DAPM_INPUT("AUXL"),
    832	SND_SOC_DAPM_INPUT("AUXR"),
    833
    834	/* MUXs for Mic PGA source selection */
    835	SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
    836			 &da7213_mic_1_amp_in_sel_mux),
    837	SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
    838			 &da7213_mic_2_amp_in_sel_mux),
    839
    840	/* Input PGAs */
    841	SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
    842			 DA7213_NO_INVERT, NULL, 0),
    843	SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
    844			 DA7213_NO_INVERT, NULL, 0),
    845	SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
    846			 DA7213_NO_INVERT, NULL, 0),
    847	SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
    848			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    849	SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
    850			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    851	SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
    852			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    853
    854	/* Mic Biases */
    855	SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
    856			    DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
    857			    NULL, 0),
    858	SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
    859			    DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
    860			    NULL, 0),
    861
    862	/* Input Mixers */
    863	SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
    864			   &da7213_dapm_mixinl_controls[0],
    865			   ARRAY_SIZE(da7213_dapm_mixinl_controls)),
    866	SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
    867			   &da7213_dapm_mixinr_controls[0],
    868			   ARRAY_SIZE(da7213_dapm_mixinr_controls)),
    869
    870	/* ADCs */
    871	SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
    872			 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
    873	SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
    874			 DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
    875
    876	/* DAI */
    877	SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
    878			 &da7213_dai_l_src_mux),
    879	SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
    880			 &da7213_dai_r_src_mux),
    881	SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
    882	SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
    883
    884	/*
    885	 * Output
    886	 */
    887
    888	/* DAI */
    889	SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
    890	SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
    891	SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
    892			 &da7213_dac_l_src_mux),
    893	SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
    894			 &da7213_dac_r_src_mux),
    895
    896	/* DACs */
    897	SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
    898			 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
    899	SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
    900			 DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
    901
    902	/* Output Mixers */
    903	SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
    904			   &da7213_dapm_mixoutl_controls[0],
    905			   ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
    906	SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
    907			   &da7213_dapm_mixoutr_controls[0],
    908			   ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
    909
    910	/* Output PGAs */
    911	SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
    912			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    913	SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
    914			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    915	SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
    916			 DA7213_NO_INVERT, NULL, 0),
    917	SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
    918			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    919	SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
    920			 DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
    921
    922	/* Charge Pump */
    923	SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
    924			    DA7213_NO_INVERT, NULL, 0),
    925
    926	/* Output Lines */
    927	SND_SOC_DAPM_OUTPUT("HPL"),
    928	SND_SOC_DAPM_OUTPUT("HPR"),
    929	SND_SOC_DAPM_OUTPUT("LINE"),
    930};
    931
    932
    933/*
    934 * DAPM audio route definition
    935 */
    936
    937static const struct snd_soc_dapm_route da7213_audio_map[] = {
    938	/* Dest       Connecting Widget    source */
    939
    940	/* Input path */
    941	{"Mic Bias 1", NULL, "VDDMIC"},
    942	{"Mic Bias 2", NULL, "VDDMIC"},
    943
    944	{"MIC1", NULL, "Mic Bias 1"},
    945	{"MIC2", NULL, "Mic Bias 2"},
    946
    947	{"Mic 1 Amp Source MUX", "Differential", "MIC1"},
    948	{"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
    949	{"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
    950
    951	{"Mic 2 Amp Source MUX", "Differential", "MIC2"},
    952	{"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
    953	{"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
    954
    955	{"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
    956	{"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
    957
    958	{"Aux Left PGA", NULL, "AUXL"},
    959	{"Aux Right PGA", NULL, "AUXR"},
    960
    961	{"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
    962	{"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
    963	{"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
    964	{"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
    965
    966	{"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
    967	{"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
    968	{"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
    969	{"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
    970
    971	{"Mixin Left PGA", NULL, "Mixin Left"},
    972	{"ADC Left", NULL, "Mixin Left PGA"},
    973
    974	{"Mixin Right PGA", NULL, "Mixin Right"},
    975	{"ADC Right", NULL, "Mixin Right PGA"},
    976
    977	{"DAI Left Source MUX", "ADC Left", "ADC Left"},
    978	{"DAI Left Source MUX", "ADC Right", "ADC Right"},
    979	{"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
    980	{"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
    981
    982	{"DAI Right Source MUX", "ADC Left", "ADC Left"},
    983	{"DAI Right Source MUX", "ADC Right", "ADC Right"},
    984	{"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
    985	{"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
    986
    987	{"DAIOUTL", NULL, "DAI Left Source MUX"},
    988	{"DAIOUTR", NULL, "DAI Right Source MUX"},
    989
    990	{"DAIOUTL", NULL, "DAI"},
    991	{"DAIOUTR", NULL, "DAI"},
    992
    993	/* Output path */
    994	{"DAIINL", NULL, "DAI"},
    995	{"DAIINR", NULL, "DAI"},
    996
    997	{"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
    998	{"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
    999	{"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
   1000	{"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
   1001
   1002	{"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
   1003	{"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
   1004	{"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
   1005	{"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
   1006
   1007	{"DAC Left", NULL, "DAC Left Source MUX"},
   1008	{"DAC Right", NULL, "DAC Right Source MUX"},
   1009
   1010	{"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
   1011	{"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
   1012	{"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
   1013	{"Mixout Left", "DAC Left Switch", "DAC Left"},
   1014	{"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
   1015	{"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
   1016	{"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
   1017
   1018	{"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
   1019	{"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
   1020	{"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
   1021	{"Mixout Right", "DAC Right Switch", "DAC Right"},
   1022	{"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
   1023	{"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
   1024	{"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
   1025
   1026	{"Mixout Left PGA", NULL, "Mixout Left"},
   1027	{"Mixout Right PGA", NULL, "Mixout Right"},
   1028
   1029	{"Headphone Left PGA", NULL, "Mixout Left PGA"},
   1030	{"Headphone Left PGA", NULL, "Charge Pump"},
   1031	{"HPL", NULL, "Headphone Left PGA"},
   1032
   1033	{"Headphone Right PGA", NULL, "Mixout Right PGA"},
   1034	{"Headphone Right PGA", NULL, "Charge Pump"},
   1035	{"HPR", NULL, "Headphone Right PGA"},
   1036
   1037	{"Lineout PGA", NULL, "Mixout Right PGA"},
   1038	{"LINE", NULL, "Lineout PGA"},
   1039};
   1040
   1041static const struct reg_default da7213_reg_defaults[] = {
   1042	{ DA7213_DIG_ROUTING_DAI, 0x10 },
   1043	{ DA7213_SR, 0x0A },
   1044	{ DA7213_REFERENCES, 0x80 },
   1045	{ DA7213_PLL_FRAC_TOP, 0x00 },
   1046	{ DA7213_PLL_FRAC_BOT, 0x00 },
   1047	{ DA7213_PLL_INTEGER, 0x20 },
   1048	{ DA7213_PLL_CTRL, 0x0C },
   1049	{ DA7213_DAI_CLK_MODE, 0x01 },
   1050	{ DA7213_DAI_CTRL, 0x08 },
   1051	{ DA7213_DIG_ROUTING_DAC, 0x32 },
   1052	{ DA7213_AUX_L_GAIN, 0x35 },
   1053	{ DA7213_AUX_R_GAIN, 0x35 },
   1054	{ DA7213_MIXIN_L_SELECT, 0x00 },
   1055	{ DA7213_MIXIN_R_SELECT, 0x00 },
   1056	{ DA7213_MIXIN_L_GAIN, 0x03 },
   1057	{ DA7213_MIXIN_R_GAIN, 0x03 },
   1058	{ DA7213_ADC_L_GAIN, 0x6F },
   1059	{ DA7213_ADC_R_GAIN, 0x6F },
   1060	{ DA7213_ADC_FILTERS1, 0x80 },
   1061	{ DA7213_MIC_1_GAIN, 0x01 },
   1062	{ DA7213_MIC_2_GAIN, 0x01 },
   1063	{ DA7213_DAC_FILTERS5, 0x00 },
   1064	{ DA7213_DAC_FILTERS2, 0x88 },
   1065	{ DA7213_DAC_FILTERS3, 0x88 },
   1066	{ DA7213_DAC_FILTERS4, 0x08 },
   1067	{ DA7213_DAC_FILTERS1, 0x80 },
   1068	{ DA7213_DAC_L_GAIN, 0x6F },
   1069	{ DA7213_DAC_R_GAIN, 0x6F },
   1070	{ DA7213_CP_CTRL, 0x61 },
   1071	{ DA7213_HP_L_GAIN, 0x39 },
   1072	{ DA7213_HP_R_GAIN, 0x39 },
   1073	{ DA7213_LINE_GAIN, 0x30 },
   1074	{ DA7213_MIXOUT_L_SELECT, 0x00 },
   1075	{ DA7213_MIXOUT_R_SELECT, 0x00 },
   1076	{ DA7213_SYSTEM_MODES_INPUT, 0x00 },
   1077	{ DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
   1078	{ DA7213_AUX_L_CTRL, 0x44 },
   1079	{ DA7213_AUX_R_CTRL, 0x44 },
   1080	{ DA7213_MICBIAS_CTRL, 0x11 },
   1081	{ DA7213_MIC_1_CTRL, 0x40 },
   1082	{ DA7213_MIC_2_CTRL, 0x40 },
   1083	{ DA7213_MIXIN_L_CTRL, 0x40 },
   1084	{ DA7213_MIXIN_R_CTRL, 0x40 },
   1085	{ DA7213_ADC_L_CTRL, 0x40 },
   1086	{ DA7213_ADC_R_CTRL, 0x40 },
   1087	{ DA7213_DAC_L_CTRL, 0x48 },
   1088	{ DA7213_DAC_R_CTRL, 0x40 },
   1089	{ DA7213_HP_L_CTRL, 0x41 },
   1090	{ DA7213_HP_R_CTRL, 0x40 },
   1091	{ DA7213_LINE_CTRL, 0x40 },
   1092	{ DA7213_MIXOUT_L_CTRL, 0x10 },
   1093	{ DA7213_MIXOUT_R_CTRL, 0x10 },
   1094	{ DA7213_LDO_CTRL, 0x00 },
   1095	{ DA7213_IO_CTRL, 0x00 },
   1096	{ DA7213_GAIN_RAMP_CTRL, 0x00},
   1097	{ DA7213_MIC_CONFIG, 0x00 },
   1098	{ DA7213_PC_COUNT, 0x00 },
   1099	{ DA7213_CP_VOL_THRESHOLD1, 0x32 },
   1100	{ DA7213_CP_DELAY, 0x95 },
   1101	{ DA7213_CP_DETECTOR, 0x00 },
   1102	{ DA7213_DAI_OFFSET, 0x00 },
   1103	{ DA7213_DIG_CTRL, 0x00 },
   1104	{ DA7213_ALC_CTRL2, 0x00 },
   1105	{ DA7213_ALC_CTRL3, 0x00 },
   1106	{ DA7213_ALC_NOISE, 0x3F },
   1107	{ DA7213_ALC_TARGET_MIN, 0x3F },
   1108	{ DA7213_ALC_TARGET_MAX, 0x00 },
   1109	{ DA7213_ALC_GAIN_LIMITS, 0xFF },
   1110	{ DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
   1111	{ DA7213_ALC_ANTICLIP_CTRL, 0x00 },
   1112	{ DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
   1113	{ DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
   1114	{ DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
   1115	{ DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
   1116	{ DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
   1117	{ DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
   1118	{ DA7213_DAC_NG_SETUP_TIME, 0x00 },
   1119	{ DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
   1120	{ DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
   1121	{ DA7213_DAC_NG_CTRL, 0x00 },
   1122};
   1123
   1124static bool da7213_volatile_register(struct device *dev, unsigned int reg)
   1125{
   1126	switch (reg) {
   1127	case DA7213_STATUS1:
   1128	case DA7213_PLL_STATUS:
   1129	case DA7213_AUX_L_GAIN_STATUS:
   1130	case DA7213_AUX_R_GAIN_STATUS:
   1131	case DA7213_MIC_1_GAIN_STATUS:
   1132	case DA7213_MIC_2_GAIN_STATUS:
   1133	case DA7213_MIXIN_L_GAIN_STATUS:
   1134	case DA7213_MIXIN_R_GAIN_STATUS:
   1135	case DA7213_ADC_L_GAIN_STATUS:
   1136	case DA7213_ADC_R_GAIN_STATUS:
   1137	case DA7213_DAC_L_GAIN_STATUS:
   1138	case DA7213_DAC_R_GAIN_STATUS:
   1139	case DA7213_HP_L_GAIN_STATUS:
   1140	case DA7213_HP_R_GAIN_STATUS:
   1141	case DA7213_LINE_GAIN_STATUS:
   1142	case DA7213_ALC_CTRL1:
   1143	case DA7213_ALC_OFFSET_AUTO_M_L:
   1144	case DA7213_ALC_OFFSET_AUTO_U_L:
   1145	case DA7213_ALC_OFFSET_AUTO_M_R:
   1146	case DA7213_ALC_OFFSET_AUTO_U_R:
   1147	case DA7213_ALC_CIC_OP_LVL_DATA:
   1148		return true;
   1149	default:
   1150		return false;
   1151	}
   1152}
   1153
   1154static int da7213_hw_params(struct snd_pcm_substream *substream,
   1155			    struct snd_pcm_hw_params *params,
   1156			    struct snd_soc_dai *dai)
   1157{
   1158	struct snd_soc_component *component = dai->component;
   1159	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1160	u8 dai_ctrl = 0;
   1161	u8 fs;
   1162
   1163	/* Set DAI format */
   1164	switch (params_width(params)) {
   1165	case 16:
   1166		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
   1167		break;
   1168	case 20:
   1169		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
   1170		break;
   1171	case 24:
   1172		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
   1173		break;
   1174	case 32:
   1175		dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
   1176		break;
   1177	default:
   1178		return -EINVAL;
   1179	}
   1180
   1181	/* Set sampling rate */
   1182	switch (params_rate(params)) {
   1183	case 8000:
   1184		fs = DA7213_SR_8000;
   1185		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1186		break;
   1187	case 11025:
   1188		fs = DA7213_SR_11025;
   1189		da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
   1190		break;
   1191	case 12000:
   1192		fs = DA7213_SR_12000;
   1193		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1194		break;
   1195	case 16000:
   1196		fs = DA7213_SR_16000;
   1197		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1198		break;
   1199	case 22050:
   1200		fs = DA7213_SR_22050;
   1201		da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
   1202		break;
   1203	case 32000:
   1204		fs = DA7213_SR_32000;
   1205		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1206		break;
   1207	case 44100:
   1208		fs = DA7213_SR_44100;
   1209		da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
   1210		break;
   1211	case 48000:
   1212		fs = DA7213_SR_48000;
   1213		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1214		break;
   1215	case 88200:
   1216		fs = DA7213_SR_88200;
   1217		da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
   1218		break;
   1219	case 96000:
   1220		fs = DA7213_SR_96000;
   1221		da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
   1222		break;
   1223	default:
   1224		return -EINVAL;
   1225	}
   1226
   1227	snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
   1228			    dai_ctrl);
   1229	snd_soc_component_write(component, DA7213_SR, fs);
   1230
   1231	return 0;
   1232}
   1233
   1234static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
   1235{
   1236	struct snd_soc_component *component = codec_dai->component;
   1237	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1238	u8 dai_clk_mode = 0, dai_ctrl = 0;
   1239	u8 dai_offset = 0;
   1240
   1241	/* Set master/slave mode */
   1242	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
   1243	case SND_SOC_DAIFMT_CBM_CFM:
   1244		da7213->master = true;
   1245		break;
   1246	case SND_SOC_DAIFMT_CBS_CFS:
   1247		da7213->master = false;
   1248		break;
   1249	default:
   1250		return -EINVAL;
   1251	}
   1252
   1253	/* Set clock normal/inverted */
   1254	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
   1255	case SND_SOC_DAIFMT_I2S:
   1256	case SND_SOC_DAIFMT_LEFT_J:
   1257	case SND_SOC_DAIFMT_RIGHT_J:
   1258		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
   1259		case SND_SOC_DAIFMT_NB_NF:
   1260			break;
   1261		case SND_SOC_DAIFMT_NB_IF:
   1262			dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
   1263			break;
   1264		case SND_SOC_DAIFMT_IB_NF:
   1265			dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
   1266			break;
   1267		case SND_SOC_DAIFMT_IB_IF:
   1268			dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
   1269					DA7213_DAI_CLK_POL_INV;
   1270			break;
   1271		default:
   1272			return -EINVAL;
   1273		}
   1274		break;
   1275	case SND_SOC_DAI_FORMAT_DSP_A:
   1276	case SND_SOC_DAI_FORMAT_DSP_B:
   1277		/* The bclk is inverted wrt ASoC conventions */
   1278		switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
   1279		case SND_SOC_DAIFMT_NB_NF:
   1280			dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
   1281			break;
   1282		case SND_SOC_DAIFMT_NB_IF:
   1283			dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
   1284					DA7213_DAI_CLK_POL_INV;
   1285			break;
   1286		case SND_SOC_DAIFMT_IB_NF:
   1287			break;
   1288		case SND_SOC_DAIFMT_IB_IF:
   1289			dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
   1290			break;
   1291		default:
   1292			return -EINVAL;
   1293		}
   1294		break;
   1295	default:
   1296		return -EINVAL;
   1297	}
   1298
   1299	/* Only I2S is supported */
   1300	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
   1301	case SND_SOC_DAIFMT_I2S:
   1302		dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
   1303		break;
   1304	case SND_SOC_DAIFMT_LEFT_J:
   1305		dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
   1306		break;
   1307	case SND_SOC_DAIFMT_RIGHT_J:
   1308		dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
   1309		break;
   1310	case SND_SOC_DAI_FORMAT_DSP_A: /* L data MSB after FRM LRC */
   1311		dai_ctrl |= DA7213_DAI_FORMAT_DSP;
   1312		dai_offset = 1;
   1313		break;
   1314	case SND_SOC_DAI_FORMAT_DSP_B: /* L data MSB during FRM LRC */
   1315		dai_ctrl |= DA7213_DAI_FORMAT_DSP;
   1316		break;
   1317	default:
   1318		return -EINVAL;
   1319	}
   1320
   1321	/* By default only 64 BCLK per WCLK is supported */
   1322	dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
   1323
   1324	snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
   1325			    DA7213_DAI_BCLKS_PER_WCLK_MASK |
   1326			    DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK,
   1327			    dai_clk_mode);
   1328	snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
   1329			    dai_ctrl);
   1330	snd_soc_component_write(component, DA7213_DAI_OFFSET, dai_offset);
   1331
   1332	return 0;
   1333}
   1334
   1335static int da7213_mute(struct snd_soc_dai *dai, int mute, int direction)
   1336{
   1337	struct snd_soc_component *component = dai->component;
   1338
   1339	if (mute) {
   1340		snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
   1341				    DA7213_MUTE_EN, DA7213_MUTE_EN);
   1342		snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
   1343				    DA7213_MUTE_EN, DA7213_MUTE_EN);
   1344	} else {
   1345		snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
   1346				    DA7213_MUTE_EN, 0);
   1347		snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
   1348				    DA7213_MUTE_EN, 0);
   1349	}
   1350
   1351	return 0;
   1352}
   1353
   1354#define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
   1355			SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
   1356
   1357static int da7213_set_component_sysclk(struct snd_soc_component *component,
   1358				       int clk_id, int source,
   1359				       unsigned int freq, int dir)
   1360{
   1361	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1362	int ret = 0;
   1363
   1364	if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
   1365		return 0;
   1366
   1367	if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
   1368		dev_err(component->dev, "Unsupported MCLK value %d\n",
   1369			freq);
   1370		return -EINVAL;
   1371	}
   1372
   1373	switch (clk_id) {
   1374	case DA7213_CLKSRC_MCLK:
   1375		snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
   1376				    DA7213_PLL_MCLK_SQR_EN, 0);
   1377		break;
   1378	case DA7213_CLKSRC_MCLK_SQR:
   1379		snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
   1380				    DA7213_PLL_MCLK_SQR_EN,
   1381				    DA7213_PLL_MCLK_SQR_EN);
   1382		break;
   1383	default:
   1384		dev_err(component->dev, "Unknown clock source %d\n", clk_id);
   1385		return -EINVAL;
   1386	}
   1387
   1388	da7213->clk_src = clk_id;
   1389
   1390	if (da7213->mclk) {
   1391		freq = clk_round_rate(da7213->mclk, freq);
   1392		ret = clk_set_rate(da7213->mclk, freq);
   1393		if (ret) {
   1394			dev_err(component->dev, "Failed to set clock rate %d\n",
   1395				freq);
   1396			return ret;
   1397		}
   1398	}
   1399
   1400	da7213->mclk_rate = freq;
   1401
   1402	return 0;
   1403}
   1404
   1405/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
   1406static int _da7213_set_component_pll(struct snd_soc_component *component,
   1407				     int pll_id, int source,
   1408				     unsigned int fref, unsigned int fout)
   1409{
   1410	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1411
   1412	u8 pll_ctrl, indiv_bits, indiv;
   1413	u8 pll_frac_top, pll_frac_bot, pll_integer;
   1414	u32 freq_ref;
   1415	u64 frac_div;
   1416
   1417	/* Workout input divider based on MCLK rate */
   1418	if (da7213->mclk_rate == 32768) {
   1419		if (!da7213->master) {
   1420			dev_err(component->dev,
   1421				"32KHz only valid if codec is clock master\n");
   1422			return -EINVAL;
   1423		}
   1424
   1425		/* 32KHz PLL Mode */
   1426		indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
   1427		indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
   1428		source = DA7213_SYSCLK_PLL_32KHZ;
   1429		freq_ref = 3750000;
   1430
   1431	} else {
   1432		if (da7213->mclk_rate < 5000000) {
   1433			dev_err(component->dev,
   1434				"PLL input clock %d below valid range\n",
   1435				da7213->mclk_rate);
   1436			return -EINVAL;
   1437		} else if (da7213->mclk_rate <= 9000000) {
   1438			indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
   1439			indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
   1440		} else if (da7213->mclk_rate <= 18000000) {
   1441			indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
   1442			indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
   1443		} else if (da7213->mclk_rate <= 36000000) {
   1444			indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
   1445			indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
   1446		} else if (da7213->mclk_rate <= 54000000) {
   1447			indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
   1448			indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
   1449		} else {
   1450			dev_err(component->dev,
   1451				"PLL input clock %d above valid range\n",
   1452				da7213->mclk_rate);
   1453			return -EINVAL;
   1454		}
   1455		freq_ref = (da7213->mclk_rate / indiv);
   1456	}
   1457
   1458	pll_ctrl = indiv_bits;
   1459
   1460	/* Configure PLL */
   1461	switch (source) {
   1462	case DA7213_SYSCLK_MCLK:
   1463		snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
   1464				    DA7213_PLL_INDIV_MASK |
   1465				    DA7213_PLL_MODE_MASK, pll_ctrl);
   1466		return 0;
   1467	case DA7213_SYSCLK_PLL:
   1468		break;
   1469	case DA7213_SYSCLK_PLL_SRM:
   1470		pll_ctrl |= DA7213_PLL_SRM_EN;
   1471		fout = DA7213_PLL_FREQ_OUT_94310400;
   1472		break;
   1473	case DA7213_SYSCLK_PLL_32KHZ:
   1474		if (da7213->mclk_rate != 32768) {
   1475			dev_err(component->dev,
   1476				"32KHz mode only valid with 32KHz MCLK\n");
   1477			return -EINVAL;
   1478		}
   1479
   1480		pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
   1481		fout = DA7213_PLL_FREQ_OUT_94310400;
   1482		break;
   1483	default:
   1484		dev_err(component->dev, "Invalid PLL config\n");
   1485		return -EINVAL;
   1486	}
   1487
   1488	/* Calculate dividers for PLL */
   1489	pll_integer = fout / freq_ref;
   1490	frac_div = (u64)(fout % freq_ref) * 8192ULL;
   1491	do_div(frac_div, freq_ref);
   1492	pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
   1493	pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
   1494
   1495	/* Write PLL dividers */
   1496	snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, pll_frac_top);
   1497	snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, pll_frac_bot);
   1498	snd_soc_component_write(component, DA7213_PLL_INTEGER, pll_integer);
   1499
   1500	/* Enable PLL */
   1501	pll_ctrl |= DA7213_PLL_EN;
   1502	snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
   1503			    DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
   1504			    pll_ctrl);
   1505
   1506	/* Assist 32KHz mode PLL lock */
   1507	if (source == DA7213_SYSCLK_PLL_32KHZ) {
   1508		snd_soc_component_write(component, 0xF0, 0x8B);
   1509		snd_soc_component_write(component, 0xF1, 0x03);
   1510		snd_soc_component_write(component, 0xF1, 0x01);
   1511		snd_soc_component_write(component, 0xF0, 0x00);
   1512	}
   1513
   1514	return 0;
   1515}
   1516
   1517static int da7213_set_component_pll(struct snd_soc_component *component,
   1518				    int pll_id, int source,
   1519				    unsigned int fref, unsigned int fout)
   1520{
   1521	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1522	da7213->fixed_clk_auto_pll = false;
   1523
   1524	return _da7213_set_component_pll(component, pll_id, source, fref, fout);
   1525}
   1526
   1527/* DAI operations */
   1528static const struct snd_soc_dai_ops da7213_dai_ops = {
   1529	.hw_params	= da7213_hw_params,
   1530	.set_fmt	= da7213_set_dai_fmt,
   1531	.mute_stream	= da7213_mute,
   1532	.no_capture_mute = 1,
   1533};
   1534
   1535static struct snd_soc_dai_driver da7213_dai = {
   1536	.name = "da7213-hifi",
   1537	/* Playback Capabilities */
   1538	.playback = {
   1539		.stream_name = "Playback",
   1540		.channels_min = 1,
   1541		.channels_max = 2,
   1542		.rates = SNDRV_PCM_RATE_8000_96000,
   1543		.formats = DA7213_FORMATS,
   1544	},
   1545	/* Capture Capabilities */
   1546	.capture = {
   1547		.stream_name = "Capture",
   1548		.channels_min = 1,
   1549		.channels_max = 2,
   1550		.rates = SNDRV_PCM_RATE_8000_96000,
   1551		.formats = DA7213_FORMATS,
   1552	},
   1553	.ops = &da7213_dai_ops,
   1554	.symmetric_rate = 1,
   1555};
   1556
   1557static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable)
   1558{
   1559	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1560	int mode;
   1561
   1562	if (!da7213->fixed_clk_auto_pll)
   1563		return 0;
   1564
   1565	da7213->mclk_rate = clk_get_rate(da7213->mclk);
   1566
   1567	if (enable) {
   1568		/* Slave mode needs SRM for non-harmonic frequencies */
   1569		if (da7213->master)
   1570			mode = DA7213_SYSCLK_PLL;
   1571		else
   1572			mode = DA7213_SYSCLK_PLL_SRM;
   1573
   1574		/* PLL is not required for harmonic frequencies */
   1575		switch (da7213->out_rate) {
   1576		case DA7213_PLL_FREQ_OUT_90316800:
   1577			if (da7213->mclk_rate == 11289600 ||
   1578			    da7213->mclk_rate == 22579200 ||
   1579			    da7213->mclk_rate == 45158400)
   1580				mode = DA7213_SYSCLK_MCLK;
   1581			break;
   1582		case DA7213_PLL_FREQ_OUT_98304000:
   1583			if (da7213->mclk_rate == 12288000 ||
   1584			    da7213->mclk_rate == 24576000 ||
   1585			    da7213->mclk_rate == 49152000)
   1586				mode = DA7213_SYSCLK_MCLK;
   1587
   1588			break;
   1589		default:
   1590			return -1;
   1591		}
   1592	} else {
   1593		/* Disable PLL in standby */
   1594		mode = DA7213_SYSCLK_MCLK;
   1595	}
   1596
   1597	return _da7213_set_component_pll(component, 0, mode,
   1598					 da7213->mclk_rate, da7213->out_rate);
   1599}
   1600
   1601static int da7213_set_bias_level(struct snd_soc_component *component,
   1602				 enum snd_soc_bias_level level)
   1603{
   1604	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1605	int ret;
   1606
   1607	switch (level) {
   1608	case SND_SOC_BIAS_ON:
   1609		break;
   1610	case SND_SOC_BIAS_PREPARE:
   1611		/* Enable MCLK for transition to ON state */
   1612		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
   1613			if (da7213->mclk) {
   1614				ret = clk_prepare_enable(da7213->mclk);
   1615				if (ret) {
   1616					dev_err(component->dev,
   1617						"Failed to enable mclk\n");
   1618					return ret;
   1619				}
   1620
   1621				da7213_set_auto_pll(component, true);
   1622			}
   1623		}
   1624		break;
   1625	case SND_SOC_BIAS_STANDBY:
   1626		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
   1627			/* Enable VMID reference & master bias */
   1628			snd_soc_component_update_bits(component, DA7213_REFERENCES,
   1629					    DA7213_VMID_EN | DA7213_BIAS_EN,
   1630					    DA7213_VMID_EN | DA7213_BIAS_EN);
   1631		} else {
   1632			/* Remove MCLK */
   1633			if (da7213->mclk) {
   1634				da7213_set_auto_pll(component, false);
   1635				clk_disable_unprepare(da7213->mclk);
   1636			}
   1637		}
   1638		break;
   1639	case SND_SOC_BIAS_OFF:
   1640		/* Disable VMID reference & master bias */
   1641		snd_soc_component_update_bits(component, DA7213_REFERENCES,
   1642				    DA7213_VMID_EN | DA7213_BIAS_EN, 0);
   1643		break;
   1644	}
   1645	return 0;
   1646}
   1647
   1648#if defined(CONFIG_OF)
   1649/* DT */
   1650static const struct of_device_id da7213_of_match[] = {
   1651	{ .compatible = "dlg,da7212", },
   1652	{ .compatible = "dlg,da7213", },
   1653	{ }
   1654};
   1655MODULE_DEVICE_TABLE(of, da7213_of_match);
   1656#endif
   1657
   1658#ifdef CONFIG_ACPI
   1659static const struct acpi_device_id da7213_acpi_match[] = {
   1660	{ "DLGS7212", 0},
   1661	{ "DLGS7213", 0},
   1662	{ },
   1663};
   1664MODULE_DEVICE_TABLE(acpi, da7213_acpi_match);
   1665#endif
   1666
   1667static enum da7213_micbias_voltage
   1668	da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val)
   1669{
   1670	switch (val) {
   1671	case 1600:
   1672		return DA7213_MICBIAS_1_6V;
   1673	case 2200:
   1674		return DA7213_MICBIAS_2_2V;
   1675	case 2500:
   1676		return DA7213_MICBIAS_2_5V;
   1677	case 3000:
   1678		return DA7213_MICBIAS_3_0V;
   1679	default:
   1680		dev_warn(component->dev, "Invalid micbias level\n");
   1681		return DA7213_MICBIAS_2_2V;
   1682	}
   1683}
   1684
   1685static enum da7213_dmic_data_sel
   1686	da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str)
   1687{
   1688	if (!strcmp(str, "lrise_rfall")) {
   1689		return DA7213_DMIC_DATA_LRISE_RFALL;
   1690	} else if (!strcmp(str, "lfall_rrise")) {
   1691		return DA7213_DMIC_DATA_LFALL_RRISE;
   1692	} else {
   1693		dev_warn(component->dev, "Invalid DMIC data select type\n");
   1694		return DA7213_DMIC_DATA_LRISE_RFALL;
   1695	}
   1696}
   1697
   1698static enum da7213_dmic_samplephase
   1699	da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str)
   1700{
   1701	if (!strcmp(str, "on_clkedge")) {
   1702		return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
   1703	} else if (!strcmp(str, "between_clkedge")) {
   1704		return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
   1705	} else {
   1706		dev_warn(component->dev, "Invalid DMIC sample phase\n");
   1707		return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
   1708	}
   1709}
   1710
   1711static enum da7213_dmic_clk_rate
   1712	da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val)
   1713{
   1714	switch (val) {
   1715	case 1500000:
   1716		return DA7213_DMIC_CLK_1_5MHZ;
   1717	case 3000000:
   1718		return DA7213_DMIC_CLK_3_0MHZ;
   1719	default:
   1720		dev_warn(component->dev, "Invalid DMIC clock rate\n");
   1721		return DA7213_DMIC_CLK_1_5MHZ;
   1722	}
   1723}
   1724
   1725static struct da7213_platform_data
   1726	*da7213_fw_to_pdata(struct snd_soc_component *component)
   1727{
   1728	struct device *dev = component->dev;
   1729	struct da7213_platform_data *pdata;
   1730	const char *fw_str;
   1731	u32 fw_val32;
   1732
   1733	pdata = devm_kzalloc(component->dev, sizeof(*pdata), GFP_KERNEL);
   1734	if (!pdata)
   1735		return NULL;
   1736
   1737	if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0)
   1738		pdata->micbias1_lvl = da7213_of_micbias_lvl(component, fw_val32);
   1739	else
   1740		pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
   1741
   1742	if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0)
   1743		pdata->micbias2_lvl = da7213_of_micbias_lvl(component, fw_val32);
   1744	else
   1745		pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
   1746
   1747	if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str))
   1748		pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, fw_str);
   1749	else
   1750		pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
   1751
   1752	if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str))
   1753		pdata->dmic_samplephase =
   1754			da7213_of_dmic_samplephase(component, fw_str);
   1755	else
   1756		pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
   1757
   1758	if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0)
   1759		pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, fw_val32);
   1760	else
   1761		pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
   1762
   1763	return pdata;
   1764}
   1765
   1766static int da7213_probe(struct snd_soc_component *component)
   1767{
   1768	struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
   1769
   1770	pm_runtime_get_sync(component->dev);
   1771
   1772	/* Default to using ALC auto offset calibration mode. */
   1773	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
   1774			    DA7213_ALC_CALIB_MODE_MAN, 0);
   1775	da7213->alc_calib_auto = true;
   1776
   1777	/* Default PC counter to free-running */
   1778	snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
   1779			    DA7213_PC_FREERUN_MASK);
   1780
   1781	/* Enable all Gain Ramps */
   1782	snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL,
   1783			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1784	snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL,
   1785			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1786	snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
   1787			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1788	snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
   1789			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1790	snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL,
   1791			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1792	snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL,
   1793			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1794	snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
   1795			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1796	snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
   1797			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1798	snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
   1799			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1800	snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
   1801			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1802	snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
   1803			    DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
   1804
   1805	/*
   1806	 * There are two separate control bits for input and output mixers as
   1807	 * well as headphone and line outs.
   1808	 * One to enable corresponding amplifier and other to enable its
   1809	 * output. As amplifier bits are related to power control, they are
   1810	 * being managed by DAPM while other (non power related) bits are
   1811	 * enabled here
   1812	 */
   1813	snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
   1814			    DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
   1815	snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
   1816			    DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
   1817
   1818	snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL,
   1819			    DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
   1820	snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL,
   1821			    DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
   1822
   1823	snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
   1824			    DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
   1825	snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
   1826			    DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
   1827
   1828	snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
   1829			    DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
   1830
   1831	/* Handle DT/Platform data */
   1832	da7213->pdata = dev_get_platdata(component->dev);
   1833	if (!da7213->pdata)
   1834		da7213->pdata = da7213_fw_to_pdata(component);
   1835
   1836	/* Set platform data values */
   1837	if (da7213->pdata) {
   1838		struct da7213_platform_data *pdata = da7213->pdata;
   1839		u8 micbias_lvl = 0, dmic_cfg = 0;
   1840
   1841		/* Set Mic Bias voltages */
   1842		switch (pdata->micbias1_lvl) {
   1843		case DA7213_MICBIAS_1_6V:
   1844		case DA7213_MICBIAS_2_2V:
   1845		case DA7213_MICBIAS_2_5V:
   1846		case DA7213_MICBIAS_3_0V:
   1847			micbias_lvl |= (pdata->micbias1_lvl <<
   1848					DA7213_MICBIAS1_LEVEL_SHIFT);
   1849			break;
   1850		}
   1851		switch (pdata->micbias2_lvl) {
   1852		case DA7213_MICBIAS_1_6V:
   1853		case DA7213_MICBIAS_2_2V:
   1854		case DA7213_MICBIAS_2_5V:
   1855		case DA7213_MICBIAS_3_0V:
   1856			micbias_lvl |= (pdata->micbias2_lvl <<
   1857					 DA7213_MICBIAS2_LEVEL_SHIFT);
   1858			break;
   1859		}
   1860		snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL,
   1861				    DA7213_MICBIAS1_LEVEL_MASK |
   1862				    DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
   1863
   1864		/* Set DMIC configuration */
   1865		switch (pdata->dmic_data_sel) {
   1866		case DA7213_DMIC_DATA_LFALL_RRISE:
   1867		case DA7213_DMIC_DATA_LRISE_RFALL:
   1868			dmic_cfg |= (pdata->dmic_data_sel <<
   1869				     DA7213_DMIC_DATA_SEL_SHIFT);
   1870			break;
   1871		}
   1872		switch (pdata->dmic_samplephase) {
   1873		case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
   1874		case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
   1875			dmic_cfg |= (pdata->dmic_samplephase <<
   1876				     DA7213_DMIC_SAMPLEPHASE_SHIFT);
   1877			break;
   1878		}
   1879		switch (pdata->dmic_clk_rate) {
   1880		case DA7213_DMIC_CLK_3_0MHZ:
   1881		case DA7213_DMIC_CLK_1_5MHZ:
   1882			dmic_cfg |= (pdata->dmic_clk_rate <<
   1883				     DA7213_DMIC_CLK_RATE_SHIFT);
   1884			break;
   1885		}
   1886		snd_soc_component_update_bits(component, DA7213_MIC_CONFIG,
   1887				    DA7213_DMIC_DATA_SEL_MASK |
   1888				    DA7213_DMIC_SAMPLEPHASE_MASK |
   1889				    DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
   1890	}
   1891
   1892	pm_runtime_put_sync(component->dev);
   1893
   1894	/* Check if MCLK provided */
   1895	da7213->mclk = devm_clk_get(component->dev, "mclk");
   1896	if (IS_ERR(da7213->mclk)) {
   1897		if (PTR_ERR(da7213->mclk) != -ENOENT)
   1898			return PTR_ERR(da7213->mclk);
   1899		else
   1900			da7213->mclk = NULL;
   1901	} else {
   1902		/* Do automatic PLL handling assuming fixed clock until
   1903		 * set_pll() has been called. This makes the codec usable
   1904		 * with the simple-audio-card driver. */
   1905		da7213->fixed_clk_auto_pll = true;
   1906	}
   1907
   1908	return 0;
   1909}
   1910
   1911static const struct snd_soc_component_driver soc_component_dev_da7213 = {
   1912	.probe			= da7213_probe,
   1913	.set_bias_level		= da7213_set_bias_level,
   1914	.controls		= da7213_snd_controls,
   1915	.num_controls		= ARRAY_SIZE(da7213_snd_controls),
   1916	.dapm_widgets		= da7213_dapm_widgets,
   1917	.num_dapm_widgets	= ARRAY_SIZE(da7213_dapm_widgets),
   1918	.dapm_routes		= da7213_audio_map,
   1919	.num_dapm_routes	= ARRAY_SIZE(da7213_audio_map),
   1920	.set_sysclk		= da7213_set_component_sysclk,
   1921	.set_pll		= da7213_set_component_pll,
   1922	.idle_bias_on		= 1,
   1923	.use_pmdown_time	= 1,
   1924	.endianness		= 1,
   1925	.non_legacy_dai_naming	= 1,
   1926};
   1927
   1928static const struct regmap_config da7213_regmap_config = {
   1929	.reg_bits = 8,
   1930	.val_bits = 8,
   1931
   1932	.reg_defaults = da7213_reg_defaults,
   1933	.num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
   1934	.volatile_reg = da7213_volatile_register,
   1935	.cache_type = REGCACHE_RBTREE,
   1936};
   1937
   1938static void da7213_power_off(void *data)
   1939{
   1940	struct da7213_priv *da7213 = data;
   1941	regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies);
   1942}
   1943
   1944static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = {
   1945	[DA7213_SUPPLY_VDDA] = "VDDA",
   1946	[DA7213_SUPPLY_VDDIO] = "VDDIO",
   1947};
   1948
   1949static int da7213_i2c_probe(struct i2c_client *i2c)
   1950{
   1951	struct da7213_priv *da7213;
   1952	int i, ret;
   1953
   1954	da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL);
   1955	if (!da7213)
   1956		return -ENOMEM;
   1957
   1958	i2c_set_clientdata(i2c, da7213);
   1959
   1960	/* Get required supplies */
   1961	for (i = 0; i < DA7213_NUM_SUPPLIES; ++i)
   1962		da7213->supplies[i].supply = da7213_supply_names[i];
   1963
   1964	ret = devm_regulator_bulk_get(&i2c->dev, DA7213_NUM_SUPPLIES,
   1965				      da7213->supplies);
   1966	if (ret) {
   1967		dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret);
   1968		return ret;
   1969	}
   1970
   1971	ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies);
   1972	if (ret < 0)
   1973		return ret;
   1974
   1975	ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213);
   1976	if (ret < 0)
   1977		return ret;
   1978
   1979	da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
   1980	if (IS_ERR(da7213->regmap)) {
   1981		ret = PTR_ERR(da7213->regmap);
   1982		dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
   1983		return ret;
   1984	}
   1985
   1986	pm_runtime_set_autosuspend_delay(&i2c->dev, 100);
   1987	pm_runtime_use_autosuspend(&i2c->dev);
   1988	pm_runtime_set_active(&i2c->dev);
   1989	pm_runtime_enable(&i2c->dev);
   1990
   1991	ret = devm_snd_soc_register_component(&i2c->dev,
   1992			&soc_component_dev_da7213, &da7213_dai, 1);
   1993	if (ret < 0) {
   1994		dev_err(&i2c->dev, "Failed to register da7213 component: %d\n",
   1995			ret);
   1996	}
   1997	return ret;
   1998}
   1999
   2000static int __maybe_unused da7213_runtime_suspend(struct device *dev)
   2001{
   2002	struct da7213_priv *da7213 = dev_get_drvdata(dev);
   2003
   2004	regcache_cache_only(da7213->regmap, true);
   2005	regcache_mark_dirty(da7213->regmap);
   2006	regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies);
   2007
   2008	return 0;
   2009}
   2010
   2011static int __maybe_unused da7213_runtime_resume(struct device *dev)
   2012{
   2013	struct da7213_priv *da7213 = dev_get_drvdata(dev);
   2014	int ret;
   2015
   2016	ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies);
   2017	if (ret < 0)
   2018		return ret;
   2019	regcache_cache_only(da7213->regmap, false);
   2020	regcache_sync(da7213->regmap);
   2021	return 0;
   2022}
   2023
   2024static const struct dev_pm_ops da7213_pm = {
   2025	SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL)
   2026};
   2027
   2028static const struct i2c_device_id da7213_i2c_id[] = {
   2029	{ "da7213", 0 },
   2030	{ }
   2031};
   2032MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
   2033
   2034/* I2C codec control layer */
   2035static struct i2c_driver da7213_i2c_driver = {
   2036	.driver = {
   2037		.name = "da7213",
   2038		.of_match_table = of_match_ptr(da7213_of_match),
   2039		.acpi_match_table = ACPI_PTR(da7213_acpi_match),
   2040		.pm = &da7213_pm,
   2041	},
   2042	.probe_new	= da7213_i2c_probe,
   2043	.id_table	= da7213_i2c_id,
   2044};
   2045
   2046module_i2c_driver(da7213_i2c_driver);
   2047
   2048MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
   2049MODULE_AUTHOR("Adam Thomson <Adam.Thomson.Opensource@diasemi.com>");
   2050MODULE_LICENSE("GPL");