cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rt1016.h (6555B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * rt1016.h  --  RT1016 ALSA SoC audio amplifier driver
      4 *
      5 * Copyright 2020 Realtek Semiconductor Corp.
      6 * Author: Oder Chiou <oder_chiou@realtek.com>
      7 *
      8 * This program is free software; you can redistribute it and/or modify
      9 * it under the terms of the GNU General Public License version 2 as
     10 * published by the Free Software Foundation.
     11 */
     12
     13#ifndef __RT1016_H__
     14#define __RT1016_H__
     15
     16#define RT1016_DEVICE_ID_VAL	0x6595
     17
     18#define RT1016_RESET		0x00
     19#define RT1016_PADS_CTRL_1	0x01
     20#define RT1016_PADS_CTRL_2	0x02
     21#define RT1016_I2C_CTRL		0x03
     22#define RT1016_VOL_CTRL_1	0x04
     23#define RT1016_VOL_CTRL_2	0x05
     24#define RT1016_VOL_CTRL_3	0x06
     25#define RT1016_ANA_CTRL_1	0x07
     26#define RT1016_MUX_SEL		0x08
     27#define RT1016_RX_I2S_CTRL	0x09
     28#define RT1016_ANA_FLAG		0x0a
     29#define RT1016_VERSION2_ID	0x0c
     30#define RT1016_VERSION1_ID	0x0d
     31#define RT1016_VENDER_ID	0x0e
     32#define RT1016_DEVICE_ID	0x0f
     33#define RT1016_ANA_CTRL_2	0x11
     34#define RT1016_TEST_SIGNAL	0x1c
     35#define RT1016_TEST_CTRL_1	0x1d
     36#define RT1016_TEST_CTRL_2	0x1e
     37#define RT1016_TEST_CTRL_3	0x1f
     38#define RT1016_CLOCK_1		0x20
     39#define RT1016_CLOCK_2		0x21
     40#define RT1016_CLOCK_3		0x22
     41#define RT1016_CLOCK_4		0x23
     42#define RT1016_CLOCK_5		0x24
     43#define RT1016_CLOCK_6		0x25
     44#define RT1016_CLOCK_7		0x26
     45#define RT1016_I2S_CTRL		0x40
     46#define RT1016_DAC_CTRL_1	0x60
     47#define RT1016_SC_CTRL_1	0x80
     48#define RT1016_SC_CTRL_2	0x81
     49#define RT1016_SC_CTRL_3	0x82
     50#define RT1016_SC_CTRL_4	0x83
     51#define RT1016_SIL_DET		0xa0
     52#define RT1016_SYS_CLK		0xc0
     53#define RT1016_BIAS_CUR		0xc1
     54#define RT1016_DAC_CTRL_2	0xc2
     55#define RT1016_LDO_CTRL		0xc3
     56#define RT1016_CLASSD_1		0xc4
     57#define RT1016_PLL1		0xc5
     58#define RT1016_PLL2		0xc6
     59#define RT1016_PLL3		0xc7
     60#define RT1016_CLASSD_2		0xc8
     61#define RT1016_CLASSD_OUT	0xc9
     62#define RT1016_CLASSD_3		0xca
     63#define RT1016_CLASSD_4		0xcb
     64#define RT1016_CLASSD_5		0xcc
     65#define RT1016_PWR_CTRL		0xcf
     66
     67/* global definition */
     68#define RT1016_L_VOL_MASK			(0xff << 8)
     69#define RT1016_L_VOL_SFT			8
     70#define RT1016_R_VOL_MASK			(0xff)
     71#define RT1016_R_VOL_SFT			0
     72
     73/* 0x04 */
     74#define RT1016_DA_MUTE_L_SFT			7
     75#define RT1016_DA_MUTE_R_SFT			6
     76
     77/* 0x20 */
     78#define RT1016_CLK_SYS_SEL_MASK			(0x1 << 15)
     79#define RT1016_CLK_SYS_SEL_SFT			15
     80#define RT1016_CLK_SYS_SEL_MCLK			(0x0 << 15)
     81#define RT1016_CLK_SYS_SEL_PLL			(0x1 << 15)
     82#define RT1016_PLL_SEL_MASK			(0x1 << 13)
     83#define RT1016_PLL_SEL_SFT			13
     84#define RT1016_PLL_SEL_MCLK			(0x0 << 13)
     85#define RT1016_PLL_SEL_BCLK			(0x1 << 13)
     86
     87/* 0x21 */
     88#define RT1016_FS_PD_MASK			(0x7 << 13)
     89#define RT1016_FS_PD_SFT			13
     90#define RT1016_OSR_PD_MASK			(0x3 << 10)
     91#define RT1016_OSR_PD_SFT			10
     92
     93/* 0x22 */
     94#define RT1016_PWR_DAC_FILTER			(0x1 << 11)
     95#define RT1016_PWR_DAC_FILTER_BIT		11
     96#define RT1016_PWR_DACMOD			(0x1 << 10)
     97#define RT1016_PWR_DACMOD_BIT			10
     98#define RT1016_PWR_CLK_FIFO			(0x1 << 9)
     99#define RT1016_PWR_CLK_FIFO_BIT			9
    100#define RT1016_PWR_CLK_PUREDC			(0x1 << 8)
    101#define RT1016_PWR_CLK_PUREDC_BIT		8
    102#define RT1016_PWR_SIL_DET			(0x1 << 7)
    103#define RT1016_PWR_SIL_DET_BIT			7
    104#define RT1016_PWR_RC_25M			(0x1 << 6)
    105#define RT1016_PWR_RC_25M_BIT			6
    106#define RT1016_PWR_PLL1				(0x1 << 5)
    107#define RT1016_PWR_PLL1_BIT			5
    108#define RT1016_PWR_ANA_CTRL			(0x1 << 4)
    109#define RT1016_PWR_ANA_CTRL_BIT			4
    110#define RT1016_PWR_CLK_SYS			(0x1 << 3)
    111#define RT1016_PWR_CLK_SYS_BIT			3
    112
    113/* 0x23 */
    114#define RT1016_PWR_LRCK_DET			(0x1 << 15)
    115#define RT1016_PWR_LRCK_DET_BIT			15
    116#define RT1016_PWR_BCLK_DET			(0x1 << 11)
    117#define RT1016_PWR_BCLK_DET_BIT			11
    118
    119/* 0x40 */
    120#define RT1016_I2S_BCLK_MS_MASK			(0x1 << 15)
    121#define RT1016_I2S_BCLK_MS_SFT			15
    122#define RT1016_I2S_BCLK_MS_32			(0x0 << 15)
    123#define RT1016_I2S_BCLK_MS_64			(0x1 << 15)
    124#define RT1016_I2S_BCLK_POL_MASK		(0x1 << 13)
    125#define RT1016_I2S_BCLK_POL_SFT			13
    126#define RT1016_I2S_BCLK_POL_NOR			(0x0 << 13)
    127#define RT1016_I2S_BCLK_POL_INV			(0x1 << 13)
    128#define RT1016_I2S_DATA_SWAP_MASK		(0x1 << 10)
    129#define RT1016_I2S_DATA_SWAP_SFT		10
    130#define RT1016_I2S_DL_MASK			(0x7 << 4)
    131#define RT1016_I2S_DL_SFT			4
    132#define RT1016_I2S_DL_16			(0x1 << 4)
    133#define RT1016_I2S_DL_20			(0x2 << 4)
    134#define RT1016_I2S_DL_24			(0x3 << 4)
    135#define RT1016_I2S_DL_32			(0x4 << 4)
    136#define RT1016_I2S_MS_MASK			(0x1 << 3)
    137#define RT1016_I2S_MS_SFT			3
    138#define RT1016_I2S_MS_M				(0x0 << 3)
    139#define RT1016_I2S_MS_S				(0x1 << 3)
    140#define RT1016_I2S_DF_MASK			(0x7 << 0)
    141#define RT1016_I2S_DF_SFT			0
    142#define RT1016_I2S_DF_I2S			(0x0)
    143#define RT1016_I2S_DF_LEFT			(0x1)
    144#define RT1016_I2S_DF_PCM_A			(0x2)
    145#define RT1016_I2S_DF_PCM_B			(0x3)
    146
    147/* 0xa0 */
    148#define RT1016_SIL_DET_EN			(0x1 << 15)
    149#define RT1016_SIL_DET_EN_BIT			15
    150
    151/* 0xc2 */
    152#define RT1016_CKGEN_DAC			(0x1 << 13)
    153#define RT1016_CKGEN_DAC_BIT			13
    154
    155/* 0xc4 */
    156#define RT1016_VCM_SLOW				(0x1 << 6)
    157#define RT1016_VCM_SLOW_BIT			6
    158
    159/* 0xc5 */
    160#define RT1016_PLL_M_MAX			0xf
    161#define RT1016_PLL_M_MASK			(RT1016_PLL_M_MAX << 12)
    162#define RT1016_PLL_M_SFT			12
    163#define RT1016_PLL_M_BP				(0x1 << 11)
    164#define RT1016_PLL_M_BP_SFT			11
    165#define RT1016_PLL_N_MAX			0x1ff
    166#define RT1016_PLL_N_MASK			(RT1016_PLL_N_MAX << 0)
    167#define RT1016_PLL_N_SFT			0
    168
    169/* 0xc6 */
    170#define RT1016_PLL2_EN				(0x1 << 15)
    171#define RT1016_PLL2_EN_BIT			15
    172#define RT1016_PLL_K_BP				(0x1 << 5)
    173#define RT1016_PLL_K_BP_SFT			5
    174#define RT1016_PLL_K_MAX			0x1f
    175#define RT1016_PLL_K_MASK			(RT1016_PLL_K_MAX)
    176#define RT1016_PLL_K_SFT			0
    177
    178/* 0xcf */
    179#define RT1016_PWR_BG_1_2			(0x1 << 12)
    180#define RT1016_PWR_BG_1_2_BIT			12
    181#define RT1016_PWR_MBIAS_BG			(0x1 << 11)
    182#define RT1016_PWR_MBIAS_BG_BIT			11
    183#define RT1016_PWR_PLL				(0x1 << 9)
    184#define RT1016_PWR_PLL_BIT			9
    185#define RT1016_PWR_BASIC			(0x1 << 8)
    186#define RT1016_PWR_BASIC_BIT			8
    187#define RT1016_PWR_CLSD				(0x1 << 7)
    188#define RT1016_PWR_CLSD_BIT			7
    189#define RT1016_PWR_25M				(0x1 << 6)
    190#define RT1016_PWR_25M_BIT			6
    191#define RT1016_PWR_DACL				(0x1 << 4)
    192#define RT1016_PWR_DACL_BIT			4
    193#define RT1016_PWR_DACR				(0x1 << 3)
    194#define RT1016_PWR_DACR_BIT			3
    195#define RT1016_PWR_LDO2				(0x1 << 2)
    196#define RT1016_PWR_LDO2_BIT			2
    197#define RT1016_PWR_VREF				(0x1 << 1)
    198#define RT1016_PWR_VREF_BIT			1
    199#define RT1016_PWR_MBIAS			(0x1 << 0)
    200#define RT1016_PWR_MBIAS_BIT			0
    201
    202/* System Clock Source */
    203enum {
    204	RT1016_SCLK_S_MCLK,
    205	RT1016_SCLK_S_PLL,
    206};
    207
    208/* PLL1 Source */
    209enum {
    210	RT1016_PLL_S_MCLK,
    211	RT1016_PLL_S_BCLK,
    212};
    213
    214enum {
    215	RT1016_AIF1,
    216	RT1016_AIFS,
    217};
    218
    219struct rt1016_priv {
    220	struct snd_soc_component *component;
    221	struct regmap *regmap;
    222	int sysclk;
    223	int sysclk_src;
    224	int lrck;
    225	int bclk;
    226	int master;
    227	int pll_src;
    228	int pll_in;
    229	int pll_out;
    230};
    231
    232#endif /* __RT1016_H__ */