cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tas2562.h (3044B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * tas2562.h - ALSA SoC Texas Instruments TAS2562 Mono Audio Amplifier
      4 *
      5 * Copyright (C) 2019 Texas Instruments Incorporated -  https://www.ti.com
      6 *
      7 * Author: Dan Murphy <dmurphy@ti.com>
      8 */
      9
     10#ifndef __TAS2562_H__
     11#define __TAS2562_H__
     12
     13#define TAS2562_PAGE_CTRL	0x00
     14
     15#define TAS2562_REG(page, reg)	((page * 128) + reg)
     16
     17#define TAS2562_SW_RESET	TAS2562_REG(0, 0x01)
     18#define TAS2562_PWR_CTRL	TAS2562_REG(0, 0x02)
     19#define TAS2562_PB_CFG1		TAS2562_REG(0, 0x03)
     20#define TAS2562_MISC_CFG1	TAS2562_REG(0, 0x04)
     21#define TAS2562_MISC_CFG2	TAS2562_REG(0, 0x05)
     22
     23#define TAS2562_TDM_CFG0	TAS2562_REG(0, 0x06)
     24#define TAS2562_TDM_CFG1	TAS2562_REG(0, 0x07)
     25#define TAS2562_TDM_CFG2	TAS2562_REG(0, 0x08)
     26#define TAS2562_TDM_CFG3	TAS2562_REG(0, 0x09)
     27#define TAS2562_TDM_CFG4	TAS2562_REG(0, 0x0a)
     28#define TAS2562_TDM_CFG5	TAS2562_REG(0, 0x0b)
     29#define TAS2562_TDM_CFG6	TAS2562_REG(0, 0x0c)
     30#define TAS2562_TDM_CFG7	TAS2562_REG(0, 0x0d)
     31#define TAS2562_TDM_CFG8	TAS2562_REG(0, 0x0e)
     32#define TAS2562_TDM_CFG9	TAS2562_REG(0, 0x0f)
     33#define TAS2562_TDM_CFG10	TAS2562_REG(0, 0x10)
     34#define TAS2562_TDM_DET		TAS2562_REG(0, 0x11)
     35#define TAS2562_REV_ID		TAS2562_REG(0, 0x7d)
     36
     37#define TAS2562_RX_OFF_MASK	GENMASK(5, 1)
     38#define TAS2562_TX_OFF_MASK	GENMASK(3, 1)
     39#define TAS2562_RIGHT_SLOT_SHIFT 4
     40
     41/* Page 2 */
     42#define TAS2562_DVC_CFG1	TAS2562_REG(2, 0x0c)
     43#define TAS2562_DVC_CFG2	TAS2562_REG(2, 0x0d)
     44#define TAS2562_DVC_CFG3	TAS2562_REG(2, 0x0e)
     45#define TAS2562_DVC_CFG4	TAS2562_REG(2, 0x0f)
     46
     47#define TAS2562_RESET	BIT(0)
     48
     49#define TAS2562_MODE_MASK	GENMASK(1,0)
     50#define TAS2562_ACTIVE		0x0
     51#define TAS2562_MUTE		0x1
     52#define TAS2562_SHUTDOWN	0x2
     53
     54#define TAS2562_TDM_CFG1_RX_EDGE_MASK	BIT(0)
     55#define TAS2562_TDM_CFG1_RX_FALLING	1
     56
     57#define TAS2562_TDM_CFG0_RAMPRATE_MASK		BIT(5)
     58#define TAS2562_TDM_CFG0_RAMPRATE_44_1		BIT(5)
     59#define TAS2562_TDM_CFG0_SAMPRATE_MASK		GENMASK(3, 1)
     60#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ	(0x0 << 1)
     61#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ	(0x1 << 1)
     62#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ	(0x2 << 1)
     63#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ	(0x3 << 1)
     64#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ	(0x4 << 1)
     65#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ	(0x5 << 1)
     66#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ	(0x6 << 1)
     67
     68#define TAS2562_TDM_CFG2_RIGHT_JUSTIFY	BIT(6)
     69
     70#define TAS2562_TDM_CFG2_RXLEN_MASK	GENMASK(1, 0)
     71#define TAS2562_TDM_CFG2_RXLEN_16B	0x0
     72#define TAS2562_TDM_CFG2_RXLEN_24B	BIT(0)
     73#define TAS2562_TDM_CFG2_RXLEN_32B	BIT(1)
     74
     75#define TAS2562_TDM_CFG2_RXWLEN_MASK	GENMASK(3, 2)
     76#define TAS2562_TDM_CFG2_RXWLEN_16B	0x0
     77#define TAS2562_TDM_CFG2_RXWLEN_20B	BIT(2)
     78#define TAS2562_TDM_CFG2_RXWLEN_24B	BIT(3)
     79#define TAS2562_TDM_CFG2_RXWLEN_32B	(BIT(2) | BIT(3))
     80
     81#define TAS2562_VSENSE_POWER_EN		2
     82#define TAS2562_ISENSE_POWER_EN		3
     83
     84#define TAS2562_TDM_CFG5_VSNS_EN	BIT(6)
     85#define TAS2562_TDM_CFG5_VSNS_SLOT_MASK	GENMASK(5, 0)
     86
     87#define TAS2562_TDM_CFG6_ISNS_EN	BIT(6)
     88#define TAS2562_TDM_CFG6_ISNS_SLOT_MASK	GENMASK(5, 0)
     89
     90#endif /* __TAS2562_H__ */