cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tlv320aic26.c (11324B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Texas Instruments TLV320AIC26 low power audio CODEC
      4 * ALSA SoC CODEC driver
      5 *
      6 * Copyright (C) 2008 Secret Lab Technologies Ltd.
      7 */
      8
      9#include <linux/module.h>
     10#include <linux/moduleparam.h>
     11#include <linux/init.h>
     12#include <linux/delay.h>
     13#include <linux/pm.h>
     14#include <linux/device.h>
     15#include <linux/sysfs.h>
     16#include <linux/spi/spi.h>
     17#include <linux/slab.h>
     18#include <sound/core.h>
     19#include <sound/pcm.h>
     20#include <sound/pcm_params.h>
     21#include <sound/soc.h>
     22#include <sound/initval.h>
     23
     24#include "tlv320aic26.h"
     25
     26MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
     27MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
     28MODULE_LICENSE("GPL");
     29
     30/* AIC26 driver private data */
     31struct aic26 {
     32	struct spi_device *spi;
     33	struct regmap *regmap;
     34	struct snd_soc_component *component;
     35	int master;
     36	int datfm;
     37	int mclk;
     38
     39	/* Keyclick parameters */
     40	int keyclick_amplitude;
     41	int keyclick_freq;
     42	int keyclick_len;
     43};
     44
     45static const struct snd_soc_dapm_widget tlv320aic26_dapm_widgets[] = {
     46SND_SOC_DAPM_INPUT("MICIN"),
     47SND_SOC_DAPM_INPUT("AUX"),
     48
     49SND_SOC_DAPM_OUTPUT("HPL"),
     50SND_SOC_DAPM_OUTPUT("HPR"),
     51};
     52
     53static const struct snd_soc_dapm_route tlv320aic26_dapm_routes[] = {
     54	{ "Capture", NULL, "MICIN" },
     55	{ "Capture", NULL, "AUX" },
     56
     57	{ "HPL", NULL, "Playback" },
     58	{ "HPR", NULL, "Playback" },
     59};
     60
     61/* ---------------------------------------------------------------------
     62 * Digital Audio Interface Operations
     63 */
     64static int aic26_hw_params(struct snd_pcm_substream *substream,
     65			   struct snd_pcm_hw_params *params,
     66			   struct snd_soc_dai *dai)
     67{
     68	struct snd_soc_component *component = dai->component;
     69	struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
     70	int fsref, divisor, wlen, pval, jval, dval, qval;
     71	u16 reg;
     72
     73	dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
     74		substream, params);
     75	dev_dbg(&aic26->spi->dev, "rate=%i width=%d\n", params_rate(params),
     76		params_width(params));
     77
     78	switch (params_rate(params)) {
     79	case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;
     80	case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
     81	case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
     82	case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
     83	case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
     84	case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
     85	case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
     86	case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
     87	case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
     88	default:
     89		dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
     90	}
     91
     92	/* select data word length */
     93	switch (params_width(params)) {
     94	case 8:  wlen = AIC26_WLEN_16; break;
     95	case 16: wlen = AIC26_WLEN_16; break;
     96	case 24: wlen = AIC26_WLEN_24; break;
     97	case 32: wlen = AIC26_WLEN_32; break;
     98	default:
     99		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
    100	}
    101
    102	/**
    103	 * Configure PLL
    104	 * fsref = (mclk * PLLM) / 2048
    105	 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
    106	 */
    107	pval = 1;
    108	/* compute J portion of multiplier */
    109	jval = fsref / (aic26->mclk / 2048);
    110	/* compute fractional DDDD component of multiplier */
    111	dval = fsref - (jval * (aic26->mclk / 2048));
    112	dval = (10000 * dval) / (aic26->mclk / 2048);
    113	dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
    114	qval = 0;
    115	reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
    116	snd_soc_component_write(component, AIC26_REG_PLL_PROG1, reg);
    117	reg = dval << 2;
    118	snd_soc_component_write(component, AIC26_REG_PLL_PROG2, reg);
    119
    120	/* Audio Control 3 (master mode, fsref rate) */
    121	if (aic26->master)
    122		reg = 0x0800;
    123	if (fsref == 48000)
    124		reg = 0x2000;
    125	snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL3, 0xf800, reg);
    126
    127	/* Audio Control 1 (FSref divisor) */
    128	reg = wlen | aic26->datfm | (divisor << 3) | divisor;
    129	snd_soc_component_update_bits(component, AIC26_REG_AUDIO_CTRL1, 0xfff, reg);
    130
    131	return 0;
    132}
    133
    134/*
    135 * aic26_mute - Mute control to reduce noise when changing audio format
    136 */
    137static int aic26_mute(struct snd_soc_dai *dai, int mute, int direction)
    138{
    139	struct snd_soc_component *component = dai->component;
    140	struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
    141	u16 reg;
    142
    143	dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
    144		dai, mute);
    145
    146	if (mute)
    147		reg = 0x8080;
    148	else
    149		reg = 0;
    150	snd_soc_component_update_bits(component, AIC26_REG_DAC_GAIN, 0x8000, reg);
    151
    152	return 0;
    153}
    154
    155static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
    156			    int clk_id, unsigned int freq, int dir)
    157{
    158	struct snd_soc_component *component = codec_dai->component;
    159	struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
    160
    161	dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
    162		" freq=%i, dir=%i)\n",
    163		codec_dai, clk_id, freq, dir);
    164
    165	/* MCLK needs to fall between 2MHz and 50 MHz */
    166	if ((freq < 2000000) || (freq > 50000000))
    167		return -EINVAL;
    168
    169	aic26->mclk = freq;
    170	return 0;
    171}
    172
    173static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
    174{
    175	struct snd_soc_component *component = codec_dai->component;
    176	struct aic26 *aic26 = snd_soc_component_get_drvdata(component);
    177
    178	dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
    179		codec_dai, fmt);
    180
    181	/* set master/slave audio interface */
    182	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
    183	case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
    184	case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
    185	default:
    186		dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
    187	}
    188
    189	/* interface format */
    190	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
    191	case SND_SOC_DAIFMT_I2S:     aic26->datfm = AIC26_DATFM_I2S; break;
    192	case SND_SOC_DAIFMT_DSP_A:   aic26->datfm = AIC26_DATFM_DSP; break;
    193	case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
    194	case SND_SOC_DAIFMT_LEFT_J:  aic26->datfm = AIC26_DATFM_LEFTJ; break;
    195	default:
    196		dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
    197	}
    198
    199	return 0;
    200}
    201
    202/* ---------------------------------------------------------------------
    203 * Digital Audio Interface Definition
    204 */
    205#define AIC26_RATES	(SNDRV_PCM_RATE_8000  | SNDRV_PCM_RATE_11025 |\
    206			 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
    207			 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
    208			 SNDRV_PCM_RATE_48000)
    209#define AIC26_FORMATS	(SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_BE |\
    210			 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
    211
    212static const struct snd_soc_dai_ops aic26_dai_ops = {
    213	.hw_params	= aic26_hw_params,
    214	.mute_stream	= aic26_mute,
    215	.set_sysclk	= aic26_set_sysclk,
    216	.set_fmt	= aic26_set_fmt,
    217	.no_capture_mute = 1,
    218};
    219
    220static struct snd_soc_dai_driver aic26_dai = {
    221	.name = "tlv320aic26-hifi",
    222	.playback = {
    223		.stream_name = "Playback",
    224		.channels_min = 2,
    225		.channels_max = 2,
    226		.rates = AIC26_RATES,
    227		.formats = AIC26_FORMATS,
    228	},
    229	.capture = {
    230		.stream_name = "Capture",
    231		.channels_min = 2,
    232		.channels_max = 2,
    233		.rates = AIC26_RATES,
    234		.formats = AIC26_FORMATS,
    235	},
    236	.ops = &aic26_dai_ops,
    237};
    238
    239/* ---------------------------------------------------------------------
    240 * ALSA controls
    241 */
    242static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
    243static SOC_ENUM_SINGLE_DECL(aic26_capture_src_enum,
    244			    AIC26_REG_AUDIO_CTRL1, 12,
    245			    aic26_capture_src_text);
    246
    247static const struct snd_kcontrol_new aic26_snd_controls[] = {
    248	/* Output */
    249	SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
    250	SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
    251	SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
    252	SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
    253	SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
    254	SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
    255	SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
    256	SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
    257	SOC_ENUM("Capture Source", aic26_capture_src_enum),
    258};
    259
    260/* ---------------------------------------------------------------------
    261 * SPI device portion of driver: sysfs files for debugging
    262 */
    263
    264static ssize_t keyclick_show(struct device *dev,
    265			     struct device_attribute *attr, char *buf)
    266{
    267	struct aic26 *aic26 = dev_get_drvdata(dev);
    268	int val, amp, freq, len;
    269
    270	val = snd_soc_component_read(aic26->component, AIC26_REG_AUDIO_CTRL2);
    271	amp = (val >> 12) & 0x7;
    272	freq = (125 << ((val >> 8) & 0x7)) >> 1;
    273	len = 2 * (1 + ((val >> 4) & 0xf));
    274
    275	return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
    276}
    277
    278/* Any write to the keyclick attribute will trigger the keyclick event */
    279static ssize_t keyclick_store(struct device *dev,
    280			      struct device_attribute *attr,
    281			      const char *buf, size_t count)
    282{
    283	struct aic26 *aic26 = dev_get_drvdata(dev);
    284
    285	snd_soc_component_update_bits(aic26->component, AIC26_REG_AUDIO_CTRL2,
    286			    0x8000, 0x800);
    287
    288	return count;
    289}
    290
    291static DEVICE_ATTR_RW(keyclick);
    292
    293/* ---------------------------------------------------------------------
    294 * SoC CODEC portion of driver: probe and release routines
    295 */
    296static int aic26_probe(struct snd_soc_component *component)
    297{
    298	struct aic26 *aic26 = dev_get_drvdata(component->dev);
    299	int ret, reg;
    300
    301	aic26->component = component;
    302
    303	/* Reset the codec to power on defaults */
    304	snd_soc_component_write(component, AIC26_REG_RESET, 0xBB00);
    305
    306	/* Power up CODEC */
    307	snd_soc_component_write(component, AIC26_REG_POWER_CTRL, 0);
    308
    309	/* Audio Control 3 (master mode, fsref rate) */
    310	reg = snd_soc_component_read(component, AIC26_REG_AUDIO_CTRL3);
    311	reg &= ~0xf800;
    312	reg |= 0x0800; /* set master mode */
    313	snd_soc_component_write(component, AIC26_REG_AUDIO_CTRL3, reg);
    314
    315	/* Register the sysfs files for debugging */
    316	/* Create SysFS files */
    317	ret = device_create_file(component->dev, &dev_attr_keyclick);
    318	if (ret)
    319		dev_info(component->dev, "error creating sysfs files\n");
    320
    321	return 0;
    322}
    323
    324static const struct snd_soc_component_driver aic26_soc_component_dev = {
    325	.probe			= aic26_probe,
    326	.controls		= aic26_snd_controls,
    327	.num_controls		= ARRAY_SIZE(aic26_snd_controls),
    328	.dapm_widgets		= tlv320aic26_dapm_widgets,
    329	.num_dapm_widgets	= ARRAY_SIZE(tlv320aic26_dapm_widgets),
    330	.dapm_routes		= tlv320aic26_dapm_routes,
    331	.num_dapm_routes	= ARRAY_SIZE(tlv320aic26_dapm_routes),
    332	.idle_bias_on		= 1,
    333	.use_pmdown_time	= 1,
    334	.endianness		= 1,
    335	.non_legacy_dai_naming	= 1,
    336};
    337
    338static const struct regmap_config aic26_regmap = {
    339	.reg_bits = 16,
    340	.val_bits = 16,
    341};
    342
    343/* ---------------------------------------------------------------------
    344 * SPI device portion of driver: probe and release routines and SPI
    345 * 				 driver registration.
    346 */
    347static int aic26_spi_probe(struct spi_device *spi)
    348{
    349	struct aic26 *aic26;
    350	int ret;
    351
    352	dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
    353
    354	/* Allocate driver data */
    355	aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
    356	if (!aic26)
    357		return -ENOMEM;
    358
    359	aic26->regmap = devm_regmap_init_spi(spi, &aic26_regmap);
    360	if (IS_ERR(aic26->regmap))
    361		return PTR_ERR(aic26->regmap);
    362
    363	/* Initialize the driver data */
    364	aic26->spi = spi;
    365	dev_set_drvdata(&spi->dev, aic26);
    366	aic26->master = 1;
    367
    368	ret = devm_snd_soc_register_component(&spi->dev,
    369			&aic26_soc_component_dev, &aic26_dai, 1);
    370	return ret;
    371}
    372
    373static struct spi_driver aic26_spi = {
    374	.driver = {
    375		.name = "tlv320aic26-codec",
    376	},
    377	.probe = aic26_spi_probe,
    378};
    379
    380module_spi_driver(aic26_spi);