cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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uda1380.h (1825B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Audio support for Philips UDA1380
      4 *
      5 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
      6 */
      7
      8#ifndef _UDA1380_H
      9#define _UDA1380_H
     10
     11#define UDA1380_CLK	0x00
     12#define UDA1380_IFACE	0x01
     13#define UDA1380_PM	0x02
     14#define UDA1380_AMIX	0x03
     15#define UDA1380_HP	0x04
     16#define UDA1380_MVOL	0x10
     17#define UDA1380_MIXVOL	0x11
     18#define UDA1380_MODE	0x12
     19#define UDA1380_DEEMP	0x13
     20#define UDA1380_MIXER	0x14
     21#define UDA1380_INTSTAT	0x18
     22#define UDA1380_DEC	0x20
     23#define UDA1380_PGA	0x21
     24#define UDA1380_ADC	0x22
     25#define UDA1380_AGC	0x23
     26#define UDA1380_DECSTAT	0x28
     27#define UDA1380_RESET	0x7f
     28
     29#define UDA1380_CACHEREGNUM 0x24
     30
     31/* Register flags */
     32#define R00_EN_ADC	0x0800
     33#define R00_EN_DEC	0x0400
     34#define R00_EN_DAC	0x0200
     35#define R00_EN_INT	0x0100
     36#define R00_DAC_CLK	0x0010
     37#define R01_SFORI_I2S   0x0000
     38#define R01_SFORI_LSB16 0x0100
     39#define R01_SFORI_LSB18 0x0200
     40#define R01_SFORI_LSB20 0x0300
     41#define R01_SFORI_MSB   0x0500
     42#define R01_SFORI_MASK  0x0700
     43#define R01_SFORO_I2S   0x0000
     44#define R01_SFORO_LSB16 0x0001
     45#define R01_SFORO_LSB18 0x0002
     46#define R01_SFORO_LSB20 0x0003
     47#define R01_SFORO_LSB24 0x0004
     48#define R01_SFORO_MSB   0x0005
     49#define R01_SFORO_MASK  0x0007
     50#define R01_SEL_SOURCE  0x0040
     51#define R01_SIM		0x0010
     52#define R02_PON_PLL	0x8000
     53#define R02_PON_HP	0x2000
     54#define R02_PON_DAC	0x0400
     55#define R02_PON_BIAS	0x0100
     56#define R02_EN_AVC	0x0080
     57#define R02_PON_AVC	0x0040
     58#define R02_PON_LNA	0x0010
     59#define R02_PON_PGAL	0x0008
     60#define R02_PON_ADCL	0x0004
     61#define R02_PON_PGAR	0x0002
     62#define R02_PON_ADCR	0x0001
     63#define R13_MTM		0x4000
     64#define R14_SILENCE	0x0080
     65#define R14_SDET_ON	0x0040
     66#define R21_MT_ADC	0x8000
     67#define R22_SEL_LNA	0x0008
     68#define R22_SEL_MIC	0x0004
     69#define R22_SKIP_DCFIL	0x0002
     70#define R23_AGC_EN	0x0001
     71
     72#endif /* _UDA1380_H */