cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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wm8960.c (43019B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * wm8960.c  --  WM8960 ALSA SoC Audio driver
      4 *
      5 * Copyright 2007-11 Wolfson Microelectronics, plc
      6 *
      7 * Author: Liam Girdwood
      8 */
      9
     10#include <linux/module.h>
     11#include <linux/moduleparam.h>
     12#include <linux/init.h>
     13#include <linux/delay.h>
     14#include <linux/pm.h>
     15#include <linux/clk.h>
     16#include <linux/i2c.h>
     17#include <linux/acpi.h>
     18#include <linux/slab.h>
     19#include <sound/core.h>
     20#include <sound/pcm.h>
     21#include <sound/pcm_params.h>
     22#include <sound/soc.h>
     23#include <sound/initval.h>
     24#include <sound/tlv.h>
     25#include <sound/wm8960.h>
     26
     27#include "wm8960.h"
     28
     29/* R25 - Power 1 */
     30#define WM8960_VMID_MASK 0x180
     31#define WM8960_VREF      0x40
     32
     33/* R26 - Power 2 */
     34#define WM8960_PWR2_LOUT1	0x40
     35#define WM8960_PWR2_ROUT1	0x20
     36#define WM8960_PWR2_OUT3	0x02
     37
     38/* R28 - Anti-pop 1 */
     39#define WM8960_POBCTRL   0x80
     40#define WM8960_BUFDCOPEN 0x10
     41#define WM8960_BUFIOEN   0x08
     42#define WM8960_SOFT_ST   0x04
     43#define WM8960_HPSTBY    0x01
     44
     45/* R29 - Anti-pop 2 */
     46#define WM8960_DISOP     0x40
     47#define WM8960_DRES_MASK 0x30
     48
     49#define WM8960_DSCH_TOUT	600 /* discharge timeout, ms */
     50
     51static bool is_pll_freq_available(unsigned int source, unsigned int target);
     52static int wm8960_set_pll(struct snd_soc_component *component,
     53		unsigned int freq_in, unsigned int freq_out);
     54/*
     55 * wm8960 register cache
     56 * We can't read the WM8960 register space when we are
     57 * using 2 wire for device control, so we cache them instead.
     58 */
     59static const struct reg_default wm8960_reg_defaults[] = {
     60	{  0x0, 0x00a7 },
     61	{  0x1, 0x00a7 },
     62	{  0x2, 0x0000 },
     63	{  0x3, 0x0000 },
     64	{  0x4, 0x0000 },
     65	{  0x5, 0x0008 },
     66	{  0x6, 0x0000 },
     67	{  0x7, 0x000a },
     68	{  0x8, 0x01c0 },
     69	{  0x9, 0x0000 },
     70	{  0xa, 0x00ff },
     71	{  0xb, 0x00ff },
     72
     73	{ 0x10, 0x0000 },
     74	{ 0x11, 0x007b },
     75	{ 0x12, 0x0100 },
     76	{ 0x13, 0x0032 },
     77	{ 0x14, 0x0000 },
     78	{ 0x15, 0x00c3 },
     79	{ 0x16, 0x00c3 },
     80	{ 0x17, 0x01c0 },
     81	{ 0x18, 0x0000 },
     82	{ 0x19, 0x0000 },
     83	{ 0x1a, 0x0000 },
     84	{ 0x1b, 0x0000 },
     85	{ 0x1c, 0x0000 },
     86	{ 0x1d, 0x0000 },
     87
     88	{ 0x20, 0x0100 },
     89	{ 0x21, 0x0100 },
     90	{ 0x22, 0x0050 },
     91
     92	{ 0x25, 0x0050 },
     93	{ 0x26, 0x0000 },
     94	{ 0x27, 0x0000 },
     95	{ 0x28, 0x0000 },
     96	{ 0x29, 0x0000 },
     97	{ 0x2a, 0x0040 },
     98	{ 0x2b, 0x0000 },
     99	{ 0x2c, 0x0000 },
    100	{ 0x2d, 0x0050 },
    101	{ 0x2e, 0x0050 },
    102	{ 0x2f, 0x0000 },
    103	{ 0x30, 0x0002 },
    104	{ 0x31, 0x0037 },
    105
    106	{ 0x33, 0x0080 },
    107	{ 0x34, 0x0008 },
    108	{ 0x35, 0x0031 },
    109	{ 0x36, 0x0026 },
    110	{ 0x37, 0x00e9 },
    111};
    112
    113static bool wm8960_volatile(struct device *dev, unsigned int reg)
    114{
    115	switch (reg) {
    116	case WM8960_RESET:
    117		return true;
    118	default:
    119		return false;
    120	}
    121}
    122
    123struct wm8960_priv {
    124	struct clk *mclk;
    125	struct regmap *regmap;
    126	int (*set_bias_level)(struct snd_soc_component *,
    127			      enum snd_soc_bias_level level);
    128	struct snd_soc_dapm_widget *lout1;
    129	struct snd_soc_dapm_widget *rout1;
    130	struct snd_soc_dapm_widget *out3;
    131	bool deemph;
    132	int lrclk;
    133	int bclk;
    134	int sysclk;
    135	int clk_id;
    136	int freq_in;
    137	bool is_stream_in_use[2];
    138	struct wm8960_data pdata;
    139	ktime_t dsch_start;
    140};
    141
    142#define wm8960_reset(c)	regmap_write(c, WM8960_RESET, 0)
    143
    144/* enumerated controls */
    145static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
    146	"Right Inverted", "Stereo Inversion"};
    147static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
    148static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
    149static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
    150static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
    151static const char *wm8960_adc_data_output_sel[] = {
    152	"Left Data = Left ADC;  Right Data = Right ADC",
    153	"Left Data = Left ADC;  Right Data = Left ADC",
    154	"Left Data = Right ADC; Right Data = Right ADC",
    155	"Left Data = Right ADC; Right Data = Left ADC",
    156};
    157static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
    158
    159static const struct soc_enum wm8960_enum[] = {
    160	SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
    161	SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
    162	SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
    163	SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
    164	SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
    165	SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
    166	SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
    167	SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
    168};
    169
    170static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
    171
    172static int wm8960_set_deemph(struct snd_soc_component *component)
    173{
    174	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    175	int val, i, best;
    176
    177	/* If we're using deemphasis select the nearest available sample
    178	 * rate.
    179	 */
    180	if (wm8960->deemph) {
    181		best = 1;
    182		for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
    183			if (abs(deemph_settings[i] - wm8960->lrclk) <
    184			    abs(deemph_settings[best] - wm8960->lrclk))
    185				best = i;
    186		}
    187
    188		val = best << 1;
    189	} else {
    190		val = 0;
    191	}
    192
    193	dev_dbg(component->dev, "Set deemphasis %d\n", val);
    194
    195	return snd_soc_component_update_bits(component, WM8960_DACCTL1,
    196				   0x6, val);
    197}
    198
    199static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
    200			     struct snd_ctl_elem_value *ucontrol)
    201{
    202	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
    203	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    204
    205	ucontrol->value.integer.value[0] = wm8960->deemph;
    206	return 0;
    207}
    208
    209static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
    210			     struct snd_ctl_elem_value *ucontrol)
    211{
    212	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
    213	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    214	unsigned int deemph = ucontrol->value.integer.value[0];
    215
    216	if (deemph > 1)
    217		return -EINVAL;
    218
    219	wm8960->deemph = deemph;
    220
    221	return wm8960_set_deemph(component);
    222}
    223
    224static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
    225static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
    226static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
    227static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
    228static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
    229static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
    230static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
    231	0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
    232	2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
    233);
    234
    235static const struct snd_kcontrol_new wm8960_snd_controls[] = {
    236SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
    237		 0, 63, 0, inpga_tlv),
    238SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
    239	6, 1, 0),
    240SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
    241	7, 1, 1),
    242
    243SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
    244	       WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
    245SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
    246	       WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
    247SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
    248	       WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
    249SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
    250	       WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
    251SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
    252		WM8960_RINPATH, 4, 3, 0, micboost_tlv),
    253SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
    254		WM8960_LINPATH, 4, 3, 0, micboost_tlv),
    255
    256SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
    257		 0, 255, 0, dac_tlv),
    258
    259SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
    260		 0, 127, 0, out_tlv),
    261SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
    262	7, 1, 0),
    263
    264SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
    265		 0, 127, 0, out_tlv),
    266SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
    267	7, 1, 0),
    268SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
    269SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
    270
    271SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
    272SOC_ENUM("ADC Polarity", wm8960_enum[0]),
    273SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
    274
    275SOC_ENUM("DAC Polarity", wm8960_enum[1]),
    276SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
    277		    wm8960_get_deemph, wm8960_put_deemph),
    278
    279SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
    280SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
    281SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
    282SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
    283
    284SOC_ENUM("ALC Function", wm8960_enum[4]),
    285SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
    286SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
    287SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
    288SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
    289SOC_ENUM("ALC Mode", wm8960_enum[5]),
    290SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
    291SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
    292
    293SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
    294SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
    295
    296SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
    297	0, 255, 0, adc_tlv),
    298
    299SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
    300	       WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
    301SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
    302	       WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
    303SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
    304	       WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
    305SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
    306	       WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
    307
    308SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
    309SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
    310};
    311
    312static const struct snd_kcontrol_new wm8960_lin_boost[] = {
    313SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
    314SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
    315SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
    316};
    317
    318static const struct snd_kcontrol_new wm8960_lin[] = {
    319SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
    320};
    321
    322static const struct snd_kcontrol_new wm8960_rin_boost[] = {
    323SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
    324SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
    325SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
    326};
    327
    328static const struct snd_kcontrol_new wm8960_rin[] = {
    329SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
    330};
    331
    332static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
    333SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
    334SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
    335SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
    336};
    337
    338static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
    339SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
    340SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
    341SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
    342};
    343
    344static const struct snd_kcontrol_new wm8960_mono_out[] = {
    345SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
    346SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
    347};
    348
    349static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
    350SND_SOC_DAPM_INPUT("LINPUT1"),
    351SND_SOC_DAPM_INPUT("RINPUT1"),
    352SND_SOC_DAPM_INPUT("LINPUT2"),
    353SND_SOC_DAPM_INPUT("RINPUT2"),
    354SND_SOC_DAPM_INPUT("LINPUT3"),
    355SND_SOC_DAPM_INPUT("RINPUT3"),
    356
    357SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
    358
    359SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
    360		   wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
    361SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
    362		   wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
    363
    364SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
    365		   wm8960_lin, ARRAY_SIZE(wm8960_lin)),
    366SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
    367		   wm8960_rin, ARRAY_SIZE(wm8960_rin)),
    368
    369SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
    370SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
    371
    372SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
    373SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
    374
    375SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
    376	&wm8960_loutput_mixer[0],
    377	ARRAY_SIZE(wm8960_loutput_mixer)),
    378SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
    379	&wm8960_routput_mixer[0],
    380	ARRAY_SIZE(wm8960_routput_mixer)),
    381
    382SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
    383SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
    384
    385SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
    386SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
    387
    388SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
    389SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
    390
    391SND_SOC_DAPM_OUTPUT("SPK_LP"),
    392SND_SOC_DAPM_OUTPUT("SPK_LN"),
    393SND_SOC_DAPM_OUTPUT("HP_L"),
    394SND_SOC_DAPM_OUTPUT("HP_R"),
    395SND_SOC_DAPM_OUTPUT("SPK_RP"),
    396SND_SOC_DAPM_OUTPUT("SPK_RN"),
    397SND_SOC_DAPM_OUTPUT("OUT3"),
    398};
    399
    400static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
    401SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
    402	&wm8960_mono_out[0],
    403	ARRAY_SIZE(wm8960_mono_out)),
    404};
    405
    406/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
    407static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
    408SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
    409};
    410
    411static const struct snd_soc_dapm_route audio_paths[] = {
    412	{ "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
    413	{ "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
    414	{ "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
    415
    416	{ "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
    417	{ "Left Input Mixer", "Boost Switch", "LINPUT1" },  /* Really Boost Switch */
    418	{ "Left Input Mixer", NULL, "LINPUT2" },
    419	{ "Left Input Mixer", NULL, "LINPUT3" },
    420
    421	{ "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
    422	{ "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
    423	{ "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
    424
    425	{ "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
    426	{ "Right Input Mixer", "Boost Switch", "RINPUT1" },  /* Really Boost Switch */
    427	{ "Right Input Mixer", NULL, "RINPUT2" },
    428	{ "Right Input Mixer", NULL, "RINPUT3" },
    429
    430	{ "Left ADC", NULL, "Left Input Mixer" },
    431	{ "Right ADC", NULL, "Right Input Mixer" },
    432
    433	{ "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
    434	{ "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
    435	{ "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
    436
    437	{ "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
    438	{ "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
    439	{ "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
    440
    441	{ "LOUT1 PGA", NULL, "Left Output Mixer" },
    442	{ "ROUT1 PGA", NULL, "Right Output Mixer" },
    443
    444	{ "HP_L", NULL, "LOUT1 PGA" },
    445	{ "HP_R", NULL, "ROUT1 PGA" },
    446
    447	{ "Left Speaker PGA", NULL, "Left Output Mixer" },
    448	{ "Right Speaker PGA", NULL, "Right Output Mixer" },
    449
    450	{ "Left Speaker Output", NULL, "Left Speaker PGA" },
    451	{ "Right Speaker Output", NULL, "Right Speaker PGA" },
    452
    453	{ "SPK_LN", NULL, "Left Speaker Output" },
    454	{ "SPK_LP", NULL, "Left Speaker Output" },
    455	{ "SPK_RN", NULL, "Right Speaker Output" },
    456	{ "SPK_RP", NULL, "Right Speaker Output" },
    457};
    458
    459static const struct snd_soc_dapm_route audio_paths_out3[] = {
    460	{ "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
    461	{ "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
    462
    463	{ "OUT3", NULL, "Mono Output Mixer", }
    464};
    465
    466static const struct snd_soc_dapm_route audio_paths_capless[] = {
    467	{ "HP_L", NULL, "OUT3 VMID" },
    468	{ "HP_R", NULL, "OUT3 VMID" },
    469
    470	{ "OUT3 VMID", NULL, "Left Output Mixer" },
    471	{ "OUT3 VMID", NULL, "Right Output Mixer" },
    472};
    473
    474static int wm8960_add_widgets(struct snd_soc_component *component)
    475{
    476	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    477	struct wm8960_data *pdata = &wm8960->pdata;
    478	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
    479	struct snd_soc_dapm_widget *w;
    480
    481	snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
    482				  ARRAY_SIZE(wm8960_dapm_widgets));
    483
    484	snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
    485
    486	/* In capless mode OUT3 is used to provide VMID for the
    487	 * headphone outputs, otherwise it is used as a mono mixer.
    488	 */
    489	if (pdata && pdata->capless) {
    490		snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
    491					  ARRAY_SIZE(wm8960_dapm_widgets_capless));
    492
    493		snd_soc_dapm_add_routes(dapm, audio_paths_capless,
    494					ARRAY_SIZE(audio_paths_capless));
    495	} else {
    496		snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
    497					  ARRAY_SIZE(wm8960_dapm_widgets_out3));
    498
    499		snd_soc_dapm_add_routes(dapm, audio_paths_out3,
    500					ARRAY_SIZE(audio_paths_out3));
    501	}
    502
    503	/* We need to power up the headphone output stage out of
    504	 * sequence for capless mode.  To save scanning the widget
    505	 * list each time to find the desired power state do so now
    506	 * and save the result.
    507	 */
    508	list_for_each_entry(w, &component->card->widgets, list) {
    509		if (w->dapm != dapm)
    510			continue;
    511		if (strcmp(w->name, "LOUT1 PGA") == 0)
    512			wm8960->lout1 = w;
    513		if (strcmp(w->name, "ROUT1 PGA") == 0)
    514			wm8960->rout1 = w;
    515		if (strcmp(w->name, "OUT3 VMID") == 0)
    516			wm8960->out3 = w;
    517	}
    518	
    519	return 0;
    520}
    521
    522static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
    523		unsigned int fmt)
    524{
    525	struct snd_soc_component *component = codec_dai->component;
    526	u16 iface = 0;
    527
    528	/* set master/slave audio interface */
    529	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
    530	case SND_SOC_DAIFMT_CBM_CFM:
    531		iface |= 0x0040;
    532		break;
    533	case SND_SOC_DAIFMT_CBS_CFS:
    534		break;
    535	default:
    536		return -EINVAL;
    537	}
    538
    539	/* interface format */
    540	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
    541	case SND_SOC_DAIFMT_I2S:
    542		iface |= 0x0002;
    543		break;
    544	case SND_SOC_DAIFMT_RIGHT_J:
    545		break;
    546	case SND_SOC_DAIFMT_LEFT_J:
    547		iface |= 0x0001;
    548		break;
    549	case SND_SOC_DAIFMT_DSP_A:
    550		iface |= 0x0003;
    551		break;
    552	case SND_SOC_DAIFMT_DSP_B:
    553		iface |= 0x0013;
    554		break;
    555	default:
    556		return -EINVAL;
    557	}
    558
    559	/* clock inversion */
    560	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
    561	case SND_SOC_DAIFMT_NB_NF:
    562		break;
    563	case SND_SOC_DAIFMT_IB_IF:
    564		iface |= 0x0090;
    565		break;
    566	case SND_SOC_DAIFMT_IB_NF:
    567		iface |= 0x0080;
    568		break;
    569	case SND_SOC_DAIFMT_NB_IF:
    570		iface |= 0x0010;
    571		break;
    572	default:
    573		return -EINVAL;
    574	}
    575
    576	/* set iface */
    577	snd_soc_component_write(component, WM8960_IFACE1, iface);
    578	return 0;
    579}
    580
    581static struct {
    582	int rate;
    583	unsigned int val;
    584} alc_rates[] = {
    585	{ 48000, 0 },
    586	{ 44100, 0 },
    587	{ 32000, 1 },
    588	{ 22050, 2 },
    589	{ 24000, 2 },
    590	{ 16000, 3 },
    591	{ 11025, 4 },
    592	{ 12000, 4 },
    593	{  8000, 5 },
    594};
    595
    596/* -1 for reserved value */
    597static const int sysclk_divs[] = { 1, -1, 2, -1 };
    598
    599/* Multiply 256 for internal 256 div */
    600static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
    601
    602/* Multiply 10 to eliminate decimials */
    603static const int bclk_divs[] = {
    604	10, 15, 20, 30, 40, 55, 60, 80, 110,
    605	120, 160, 220, 240, 320, 320, 320
    606};
    607
    608/**
    609 * wm8960_configure_sysclk - checks if there is a sysclk frequency available
    610 *	The sysclk must be chosen such that:
    611 *		- sysclk     = MCLK / sysclk_divs
    612 *		- lrclk      = sysclk / dac_divs
    613 *		- 10 * bclk  = sysclk / bclk_divs
    614 *
    615 * @wm8960: codec private data
    616 * @mclk: MCLK used to derive sysclk
    617 * @sysclk_idx: sysclk_divs index for found sysclk
    618 * @dac_idx: dac_divs index for found lrclk
    619 * @bclk_idx: bclk_divs index for found bclk
    620 *
    621 * Returns:
    622 *  -1, in case no sysclk frequency available found
    623 * >=0, in case we could derive bclk and lrclk from sysclk using
    624 *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
    625 */
    626static
    627int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
    628			    int *sysclk_idx, int *dac_idx, int *bclk_idx)
    629{
    630	int sysclk, bclk, lrclk;
    631	int i, j, k;
    632	int diff;
    633
    634	/* marker for no match */
    635	*bclk_idx = -1;
    636
    637	bclk = wm8960->bclk;
    638	lrclk = wm8960->lrclk;
    639
    640	/* check if the sysclk frequency is available. */
    641	for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
    642		if (sysclk_divs[i] == -1)
    643			continue;
    644		sysclk = mclk / sysclk_divs[i];
    645		for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
    646			if (sysclk != dac_divs[j] * lrclk)
    647				continue;
    648			for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
    649				diff = sysclk - bclk * bclk_divs[k] / 10;
    650				if (diff == 0) {
    651					*sysclk_idx = i;
    652					*dac_idx = j;
    653					*bclk_idx = k;
    654					break;
    655				}
    656			}
    657			if (k != ARRAY_SIZE(bclk_divs))
    658				break;
    659		}
    660		if (j != ARRAY_SIZE(dac_divs))
    661			break;
    662	}
    663	return *bclk_idx;
    664}
    665
    666/**
    667 * wm8960_configure_pll - checks if there is a PLL out frequency available
    668 *	The PLL out frequency must be chosen such that:
    669 *		- sysclk      = lrclk * dac_divs
    670 *		- freq_out    = sysclk * sysclk_divs
    671 *		- 10 * sysclk = bclk * bclk_divs
    672 *
    673 * 	If we cannot find an exact match for (sysclk, lrclk, bclk)
    674 * 	triplet, we relax the bclk such that bclk is chosen as the
    675 * 	closest available frequency greater than expected bclk.
    676 *
    677 * @component: component structure
    678 * @freq_in: input frequency used to derive freq out via PLL
    679 * @sysclk_idx: sysclk_divs index for found sysclk
    680 * @dac_idx: dac_divs index for found lrclk
    681 * @bclk_idx: bclk_divs index for found bclk
    682 *
    683 * Returns:
    684 * < 0, in case no PLL frequency out available was found
    685 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
    686 *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
    687 */
    688static
    689int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
    690			 int *sysclk_idx, int *dac_idx, int *bclk_idx)
    691{
    692	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    693	int sysclk, bclk, lrclk, freq_out;
    694	int diff, closest, best_freq_out;
    695	int i, j, k;
    696
    697	bclk = wm8960->bclk;
    698	lrclk = wm8960->lrclk;
    699	closest = freq_in;
    700
    701	best_freq_out = -EINVAL;
    702	*sysclk_idx = *dac_idx = *bclk_idx = -1;
    703
    704	/*
    705	 * From Datasheet, the PLL performs best when f2 is between
    706	 * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
    707	 * or 12.288MHz, then sysclkdiv = 2 is the best choice.
    708	 * So search sysclk_divs from 2 to 1 other than from 1 to 2.
    709	 */
    710	for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
    711		if (sysclk_divs[i] == -1)
    712			continue;
    713		for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
    714			sysclk = lrclk * dac_divs[j];
    715			freq_out = sysclk * sysclk_divs[i];
    716
    717			for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
    718				if (!is_pll_freq_available(freq_in, freq_out))
    719					continue;
    720
    721				diff = sysclk - bclk * bclk_divs[k] / 10;
    722				if (diff == 0) {
    723					*sysclk_idx = i;
    724					*dac_idx = j;
    725					*bclk_idx = k;
    726					return freq_out;
    727				}
    728				if (diff > 0 && closest > diff) {
    729					*sysclk_idx = i;
    730					*dac_idx = j;
    731					*bclk_idx = k;
    732					closest = diff;
    733					best_freq_out = freq_out;
    734				}
    735			}
    736		}
    737	}
    738
    739	return best_freq_out;
    740}
    741static int wm8960_configure_clocking(struct snd_soc_component *component)
    742{
    743	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    744	int freq_out, freq_in;
    745	u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
    746	int i, j, k;
    747	int ret;
    748
    749	/*
    750	 * For Slave mode clocking should still be configured,
    751	 * so this if statement should be removed, but some platform
    752	 * may not work if the sysclk is not configured, to avoid such
    753	 * compatible issue, just add '!wm8960->sysclk' condition in
    754	 * this if statement.
    755	 */
    756	if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
    757		dev_warn(component->dev,
    758			 "slave mode, but proceeding with no clock configuration\n");
    759		return 0;
    760	}
    761
    762	if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
    763		dev_err(component->dev, "No MCLK configured\n");
    764		return -EINVAL;
    765	}
    766
    767	freq_in = wm8960->freq_in;
    768	/*
    769	 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
    770	 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
    771	 * directly. Otherwise, auto select a available pll out frequency
    772	 * and set PLL.
    773	 */
    774	if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
    775		/* disable the PLL and using MCLK to provide sysclk */
    776		wm8960_set_pll(component, 0, 0);
    777		freq_out = freq_in;
    778	} else if (wm8960->sysclk) {
    779		freq_out = wm8960->sysclk;
    780	} else {
    781		dev_err(component->dev, "No SYSCLK configured\n");
    782		return -EINVAL;
    783	}
    784
    785	if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
    786		ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
    787		if (ret >= 0) {
    788			goto configure_clock;
    789		} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
    790			dev_err(component->dev, "failed to configure clock\n");
    791			return -EINVAL;
    792		}
    793	}
    794
    795	freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
    796	if (freq_out < 0) {
    797		dev_err(component->dev, "failed to configure clock via PLL\n");
    798		return freq_out;
    799	}
    800	wm8960_set_pll(component, freq_in, freq_out);
    801
    802configure_clock:
    803	/* configure sysclk clock */
    804	snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
    805
    806	/* configure frame clock */
    807	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
    808	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
    809
    810	/* configure bit clock */
    811	snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
    812
    813	return 0;
    814}
    815
    816static int wm8960_hw_params(struct snd_pcm_substream *substream,
    817			    struct snd_pcm_hw_params *params,
    818			    struct snd_soc_dai *dai)
    819{
    820	struct snd_soc_component *component = dai->component;
    821	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    822	u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
    823	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
    824	int i;
    825
    826	wm8960->bclk = snd_soc_params_to_bclk(params);
    827	if (params_channels(params) == 1)
    828		wm8960->bclk *= 2;
    829
    830	/* bit size */
    831	switch (params_width(params)) {
    832	case 16:
    833		break;
    834	case 20:
    835		iface |= 0x0004;
    836		break;
    837	case 24:
    838		iface |= 0x0008;
    839		break;
    840	case 32:
    841		/* right justify mode does not support 32 word length */
    842		if ((iface & 0x3) != 0) {
    843			iface |= 0x000c;
    844			break;
    845		}
    846		fallthrough;
    847	default:
    848		dev_err(component->dev, "unsupported width %d\n",
    849			params_width(params));
    850		return -EINVAL;
    851	}
    852
    853	wm8960->lrclk = params_rate(params);
    854	/* Update filters for the new rate */
    855	if (tx) {
    856		wm8960_set_deemph(component);
    857	} else {
    858		for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
    859			if (alc_rates[i].rate == params_rate(params))
    860				snd_soc_component_update_bits(component,
    861						    WM8960_ADDCTL3, 0x7,
    862						    alc_rates[i].val);
    863	}
    864
    865	/* set iface */
    866	snd_soc_component_write(component, WM8960_IFACE1, iface);
    867
    868	wm8960->is_stream_in_use[tx] = true;
    869
    870	if (!wm8960->is_stream_in_use[!tx])
    871		return wm8960_configure_clocking(component);
    872
    873	return 0;
    874}
    875
    876static int wm8960_hw_free(struct snd_pcm_substream *substream,
    877		struct snd_soc_dai *dai)
    878{
    879	struct snd_soc_component *component = dai->component;
    880	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    881	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
    882
    883	wm8960->is_stream_in_use[tx] = false;
    884
    885	return 0;
    886}
    887
    888static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
    889{
    890	struct snd_soc_component *component = dai->component;
    891
    892	if (mute)
    893		snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
    894	else
    895		snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
    896	return 0;
    897}
    898
    899static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
    900				      enum snd_soc_bias_level level)
    901{
    902	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    903	u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
    904	int ret;
    905	ktime_t tout;
    906
    907	switch (level) {
    908	case SND_SOC_BIAS_ON:
    909		break;
    910
    911	case SND_SOC_BIAS_PREPARE:
    912		switch (snd_soc_component_get_bias_level(component)) {
    913		case SND_SOC_BIAS_STANDBY:
    914			if (!IS_ERR(wm8960->mclk)) {
    915				ret = clk_prepare_enable(wm8960->mclk);
    916				if (ret) {
    917					dev_err(component->dev,
    918						"Failed to enable MCLK: %d\n",
    919						ret);
    920					return ret;
    921				}
    922			}
    923
    924			ret = wm8960_configure_clocking(component);
    925			if (ret)
    926				return ret;
    927
    928			/* Set VMID to 2x50k */
    929			snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
    930			break;
    931
    932		case SND_SOC_BIAS_ON:
    933			/*
    934			 * If it's sysclk auto mode, and the pll is enabled,
    935			 * disable the pll
    936			 */
    937			if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
    938				wm8960_set_pll(component, 0, 0);
    939
    940			if (!IS_ERR(wm8960->mclk))
    941				clk_disable_unprepare(wm8960->mclk);
    942			break;
    943
    944		default:
    945			break;
    946		}
    947
    948		break;
    949
    950	case SND_SOC_BIAS_STANDBY:
    951		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
    952			/* ensure discharge is complete */
    953			tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start);
    954			if (tout > 0)
    955				msleep(tout);
    956
    957			regcache_sync(wm8960->regmap);
    958
    959			/* Enable anti-pop features */
    960			snd_soc_component_write(component, WM8960_APOP1,
    961				      WM8960_POBCTRL | WM8960_SOFT_ST |
    962				      WM8960_BUFDCOPEN | WM8960_BUFIOEN);
    963
    964			/* Enable & ramp VMID at 2x50k */
    965			snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
    966			msleep(100);
    967
    968			/* Enable VREF */
    969			snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
    970					    WM8960_VREF);
    971
    972			/* Disable anti-pop features */
    973			snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
    974		}
    975
    976		/* Set VMID to 2x250k */
    977		snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
    978		break;
    979
    980	case SND_SOC_BIAS_OFF:
    981		/* Enable anti-pop features */
    982		snd_soc_component_write(component, WM8960_APOP1,
    983			     WM8960_POBCTRL | WM8960_SOFT_ST |
    984			     WM8960_BUFDCOPEN | WM8960_BUFIOEN);
    985
    986		/* Disable VMID and VREF, mark discharge */
    987		snd_soc_component_write(component, WM8960_POWER1, 0);
    988		wm8960->dsch_start = ktime_get();
    989		break;
    990	}
    991
    992	return 0;
    993}
    994
    995static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
    996					 enum snd_soc_bias_level level)
    997{
    998	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
    999	u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
   1000	int reg, ret;
   1001
   1002	switch (level) {
   1003	case SND_SOC_BIAS_ON:
   1004		break;
   1005
   1006	case SND_SOC_BIAS_PREPARE:
   1007		switch (snd_soc_component_get_bias_level(component)) {
   1008		case SND_SOC_BIAS_STANDBY:
   1009			/* Enable anti pop mode */
   1010			snd_soc_component_update_bits(component, WM8960_APOP1,
   1011					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1012					    WM8960_BUFDCOPEN,
   1013					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1014					    WM8960_BUFDCOPEN);
   1015
   1016			/* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
   1017			reg = 0;
   1018			if (wm8960->lout1 && wm8960->lout1->power)
   1019				reg |= WM8960_PWR2_LOUT1;
   1020			if (wm8960->rout1 && wm8960->rout1->power)
   1021				reg |= WM8960_PWR2_ROUT1;
   1022			if (wm8960->out3 && wm8960->out3->power)
   1023				reg |= WM8960_PWR2_OUT3;
   1024			snd_soc_component_update_bits(component, WM8960_POWER2,
   1025					    WM8960_PWR2_LOUT1 |
   1026					    WM8960_PWR2_ROUT1 |
   1027					    WM8960_PWR2_OUT3, reg);
   1028
   1029			/* Enable VMID at 2*50k */
   1030			snd_soc_component_update_bits(component, WM8960_POWER1,
   1031					    WM8960_VMID_MASK, 0x80);
   1032
   1033			/* Ramp */
   1034			msleep(100);
   1035
   1036			/* Enable VREF */
   1037			snd_soc_component_update_bits(component, WM8960_POWER1,
   1038					    WM8960_VREF, WM8960_VREF);
   1039
   1040			msleep(100);
   1041
   1042			if (!IS_ERR(wm8960->mclk)) {
   1043				ret = clk_prepare_enable(wm8960->mclk);
   1044				if (ret) {
   1045					dev_err(component->dev,
   1046						"Failed to enable MCLK: %d\n",
   1047						ret);
   1048					return ret;
   1049				}
   1050			}
   1051
   1052			ret = wm8960_configure_clocking(component);
   1053			if (ret)
   1054				return ret;
   1055
   1056			break;
   1057
   1058		case SND_SOC_BIAS_ON:
   1059			/*
   1060			 * If it's sysclk auto mode, and the pll is enabled,
   1061			 * disable the pll
   1062			 */
   1063			if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
   1064				wm8960_set_pll(component, 0, 0);
   1065
   1066			if (!IS_ERR(wm8960->mclk))
   1067				clk_disable_unprepare(wm8960->mclk);
   1068
   1069			/* Enable anti-pop mode */
   1070			snd_soc_component_update_bits(component, WM8960_APOP1,
   1071					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1072					    WM8960_BUFDCOPEN,
   1073					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1074					    WM8960_BUFDCOPEN);
   1075
   1076			/* Disable VMID and VREF */
   1077			snd_soc_component_update_bits(component, WM8960_POWER1,
   1078					    WM8960_VREF | WM8960_VMID_MASK, 0);
   1079			break;
   1080
   1081		case SND_SOC_BIAS_OFF:
   1082			regcache_sync(wm8960->regmap);
   1083			break;
   1084		default:
   1085			break;
   1086		}
   1087		break;
   1088
   1089	case SND_SOC_BIAS_STANDBY:
   1090		switch (snd_soc_component_get_bias_level(component)) {
   1091		case SND_SOC_BIAS_PREPARE:
   1092			/* Disable HP discharge */
   1093			snd_soc_component_update_bits(component, WM8960_APOP2,
   1094					    WM8960_DISOP | WM8960_DRES_MASK,
   1095					    0);
   1096
   1097			/* Disable anti-pop features */
   1098			snd_soc_component_update_bits(component, WM8960_APOP1,
   1099					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1100					    WM8960_BUFDCOPEN,
   1101					    WM8960_POBCTRL | WM8960_SOFT_ST |
   1102					    WM8960_BUFDCOPEN);
   1103			break;
   1104
   1105		default:
   1106			break;
   1107		}
   1108		break;
   1109
   1110	case SND_SOC_BIAS_OFF:
   1111		break;
   1112	}
   1113
   1114	return 0;
   1115}
   1116
   1117/* PLL divisors */
   1118struct _pll_div {
   1119	u32 pre_div:1;
   1120	u32 n:4;
   1121	u32 k:24;
   1122};
   1123
   1124static bool is_pll_freq_available(unsigned int source, unsigned int target)
   1125{
   1126	unsigned int Ndiv;
   1127
   1128	if (source == 0 || target == 0)
   1129		return false;
   1130
   1131	/* Scale up target to PLL operating frequency */
   1132	target *= 4;
   1133	Ndiv = target / source;
   1134
   1135	if (Ndiv < 6) {
   1136		source >>= 1;
   1137		Ndiv = target / source;
   1138	}
   1139
   1140	if ((Ndiv < 6) || (Ndiv > 12))
   1141		return false;
   1142
   1143	return true;
   1144}
   1145
   1146/* The size in bits of the pll divide multiplied by 10
   1147 * to allow rounding later */
   1148#define FIXED_PLL_SIZE ((1 << 24) * 10)
   1149
   1150static int pll_factors(unsigned int source, unsigned int target,
   1151		       struct _pll_div *pll_div)
   1152{
   1153	unsigned long long Kpart;
   1154	unsigned int K, Ndiv, Nmod;
   1155
   1156	pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
   1157
   1158	/* Scale up target to PLL operating frequency */
   1159	target *= 4;
   1160
   1161	Ndiv = target / source;
   1162	if (Ndiv < 6) {
   1163		source >>= 1;
   1164		pll_div->pre_div = 1;
   1165		Ndiv = target / source;
   1166	} else
   1167		pll_div->pre_div = 0;
   1168
   1169	if ((Ndiv < 6) || (Ndiv > 12)) {
   1170		pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
   1171		return -EINVAL;
   1172	}
   1173
   1174	pll_div->n = Ndiv;
   1175	Nmod = target % source;
   1176	Kpart = FIXED_PLL_SIZE * (long long)Nmod;
   1177
   1178	do_div(Kpart, source);
   1179
   1180	K = Kpart & 0xFFFFFFFF;
   1181
   1182	/* Check if we need to round */
   1183	if ((K % 10) >= 5)
   1184		K += 5;
   1185
   1186	/* Move down to proper range now rounding is done */
   1187	K /= 10;
   1188
   1189	pll_div->k = K;
   1190
   1191	pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
   1192		 pll_div->n, pll_div->k, pll_div->pre_div);
   1193
   1194	return 0;
   1195}
   1196
   1197static int wm8960_set_pll(struct snd_soc_component *component,
   1198		unsigned int freq_in, unsigned int freq_out)
   1199{
   1200	u16 reg;
   1201	static struct _pll_div pll_div;
   1202	int ret;
   1203
   1204	if (freq_in && freq_out) {
   1205		ret = pll_factors(freq_in, freq_out, &pll_div);
   1206		if (ret != 0)
   1207			return ret;
   1208	}
   1209
   1210	/* Disable the PLL: even if we are changing the frequency the
   1211	 * PLL needs to be disabled while we do so. */
   1212	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
   1213	snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
   1214
   1215	if (!freq_in || !freq_out)
   1216		return 0;
   1217
   1218	reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
   1219	reg |= pll_div.pre_div << 4;
   1220	reg |= pll_div.n;
   1221
   1222	if (pll_div.k) {
   1223		reg |= 0x20;
   1224
   1225		snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
   1226		snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
   1227		snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
   1228	}
   1229	snd_soc_component_write(component, WM8960_PLL1, reg);
   1230
   1231	/* Turn it on */
   1232	snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
   1233	msleep(250);
   1234	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
   1235
   1236	return 0;
   1237}
   1238
   1239static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
   1240		int source, unsigned int freq_in, unsigned int freq_out)
   1241{
   1242	struct snd_soc_component *component = codec_dai->component;
   1243	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
   1244
   1245	wm8960->freq_in = freq_in;
   1246
   1247	if (pll_id == WM8960_SYSCLK_AUTO)
   1248		return 0;
   1249
   1250	return wm8960_set_pll(component, freq_in, freq_out);
   1251}
   1252
   1253static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
   1254		int div_id, int div)
   1255{
   1256	struct snd_soc_component *component = codec_dai->component;
   1257	u16 reg;
   1258
   1259	switch (div_id) {
   1260	case WM8960_SYSCLKDIV:
   1261		reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
   1262		snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
   1263		break;
   1264	case WM8960_DACDIV:
   1265		reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
   1266		snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
   1267		break;
   1268	case WM8960_OPCLKDIV:
   1269		reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
   1270		snd_soc_component_write(component, WM8960_PLL1, reg | div);
   1271		break;
   1272	case WM8960_DCLKDIV:
   1273		reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
   1274		snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
   1275		break;
   1276	case WM8960_TOCLKSEL:
   1277		reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
   1278		snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
   1279		break;
   1280	default:
   1281		return -EINVAL;
   1282	}
   1283
   1284	return 0;
   1285}
   1286
   1287static int wm8960_set_bias_level(struct snd_soc_component *component,
   1288				 enum snd_soc_bias_level level)
   1289{
   1290	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
   1291
   1292	return wm8960->set_bias_level(component, level);
   1293}
   1294
   1295static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
   1296					unsigned int freq, int dir)
   1297{
   1298	struct snd_soc_component *component = dai->component;
   1299	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
   1300
   1301	switch (clk_id) {
   1302	case WM8960_SYSCLK_MCLK:
   1303		snd_soc_component_update_bits(component, WM8960_CLOCK1,
   1304					0x1, WM8960_SYSCLK_MCLK);
   1305		break;
   1306	case WM8960_SYSCLK_PLL:
   1307		snd_soc_component_update_bits(component, WM8960_CLOCK1,
   1308					0x1, WM8960_SYSCLK_PLL);
   1309		break;
   1310	case WM8960_SYSCLK_AUTO:
   1311		break;
   1312	default:
   1313		return -EINVAL;
   1314	}
   1315
   1316	wm8960->sysclk = freq;
   1317	wm8960->clk_id = clk_id;
   1318
   1319	return 0;
   1320}
   1321
   1322#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
   1323
   1324#define WM8960_FORMATS \
   1325	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
   1326	SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
   1327
   1328static const struct snd_soc_dai_ops wm8960_dai_ops = {
   1329	.hw_params = wm8960_hw_params,
   1330	.hw_free = wm8960_hw_free,
   1331	.mute_stream = wm8960_mute,
   1332	.set_fmt = wm8960_set_dai_fmt,
   1333	.set_clkdiv = wm8960_set_dai_clkdiv,
   1334	.set_pll = wm8960_set_dai_pll,
   1335	.set_sysclk = wm8960_set_dai_sysclk,
   1336	.no_capture_mute = 1,
   1337};
   1338
   1339static struct snd_soc_dai_driver wm8960_dai = {
   1340	.name = "wm8960-hifi",
   1341	.playback = {
   1342		.stream_name = "Playback",
   1343		.channels_min = 1,
   1344		.channels_max = 2,
   1345		.rates = WM8960_RATES,
   1346		.formats = WM8960_FORMATS,},
   1347	.capture = {
   1348		.stream_name = "Capture",
   1349		.channels_min = 1,
   1350		.channels_max = 2,
   1351		.rates = WM8960_RATES,
   1352		.formats = WM8960_FORMATS,},
   1353	.ops = &wm8960_dai_ops,
   1354	.symmetric_rate = 1,
   1355};
   1356
   1357static int wm8960_probe(struct snd_soc_component *component)
   1358{
   1359	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
   1360	struct wm8960_data *pdata = &wm8960->pdata;
   1361
   1362	if (pdata->capless)
   1363		wm8960->set_bias_level = wm8960_set_bias_level_capless;
   1364	else
   1365		wm8960->set_bias_level = wm8960_set_bias_level_out3;
   1366
   1367	snd_soc_add_component_controls(component, wm8960_snd_controls,
   1368				     ARRAY_SIZE(wm8960_snd_controls));
   1369	wm8960_add_widgets(component);
   1370
   1371	return 0;
   1372}
   1373
   1374static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
   1375	.probe			= wm8960_probe,
   1376	.set_bias_level		= wm8960_set_bias_level,
   1377	.suspend_bias_off	= 1,
   1378	.idle_bias_on		= 1,
   1379	.use_pmdown_time	= 1,
   1380	.endianness		= 1,
   1381	.non_legacy_dai_naming	= 1,
   1382};
   1383
   1384static const struct regmap_config wm8960_regmap = {
   1385	.reg_bits = 7,
   1386	.val_bits = 9,
   1387	.max_register = WM8960_PLL4,
   1388
   1389	.reg_defaults = wm8960_reg_defaults,
   1390	.num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
   1391	.cache_type = REGCACHE_RBTREE,
   1392
   1393	.volatile_reg = wm8960_volatile,
   1394};
   1395
   1396static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
   1397				struct wm8960_data *pdata)
   1398{
   1399	const struct device_node *np = i2c->dev.of_node;
   1400
   1401	if (of_property_read_bool(np, "wlf,capless"))
   1402		pdata->capless = true;
   1403
   1404	if (of_property_read_bool(np, "wlf,shared-lrclk"))
   1405		pdata->shared_lrclk = true;
   1406
   1407	of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
   1408				   ARRAY_SIZE(pdata->gpio_cfg));
   1409
   1410	of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
   1411				   ARRAY_SIZE(pdata->hp_cfg));
   1412}
   1413
   1414static int wm8960_i2c_probe(struct i2c_client *i2c)
   1415{
   1416	struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
   1417	struct wm8960_priv *wm8960;
   1418	int ret;
   1419
   1420	wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
   1421			      GFP_KERNEL);
   1422	if (wm8960 == NULL)
   1423		return -ENOMEM;
   1424
   1425	wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
   1426	if (IS_ERR(wm8960->mclk)) {
   1427		if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
   1428			return -EPROBE_DEFER;
   1429	}
   1430
   1431	wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
   1432	if (IS_ERR(wm8960->regmap))
   1433		return PTR_ERR(wm8960->regmap);
   1434
   1435	if (pdata)
   1436		memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
   1437	else if (i2c->dev.of_node)
   1438		wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
   1439
   1440	ret = wm8960_reset(wm8960->regmap);
   1441	if (ret != 0) {
   1442		dev_err(&i2c->dev, "Failed to issue reset\n");
   1443		return ret;
   1444	}
   1445
   1446	if (wm8960->pdata.shared_lrclk) {
   1447		ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
   1448					 0x4, 0x4);
   1449		if (ret != 0) {
   1450			dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
   1451				ret);
   1452			return ret;
   1453		}
   1454	}
   1455
   1456	/* Latch the update bits */
   1457	regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
   1458	regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
   1459	regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
   1460	regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
   1461	regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
   1462	regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
   1463	regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
   1464	regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
   1465	regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
   1466	regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
   1467
   1468	/* ADCLRC pin configured as GPIO. */
   1469	regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
   1470			   wm8960->pdata.gpio_cfg[0] << 6);
   1471	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
   1472			   wm8960->pdata.gpio_cfg[1] << 4);
   1473
   1474	/* Enable headphone jack detect */
   1475	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
   1476			   wm8960->pdata.hp_cfg[0] << 2);
   1477	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
   1478			   wm8960->pdata.hp_cfg[1] << 5);
   1479	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
   1480			   wm8960->pdata.hp_cfg[2]);
   1481
   1482	i2c_set_clientdata(i2c, wm8960);
   1483
   1484	ret = devm_snd_soc_register_component(&i2c->dev,
   1485			&soc_component_dev_wm8960, &wm8960_dai, 1);
   1486
   1487	return ret;
   1488}
   1489
   1490static int wm8960_i2c_remove(struct i2c_client *client)
   1491{
   1492	return 0;
   1493}
   1494
   1495static const struct i2c_device_id wm8960_i2c_id[] = {
   1496	{ "wm8960", 0 },
   1497	{ }
   1498};
   1499MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
   1500
   1501#if defined(CONFIG_OF)
   1502static const struct of_device_id wm8960_of_match[] = {
   1503       { .compatible = "wlf,wm8960", },
   1504       { }
   1505};
   1506MODULE_DEVICE_TABLE(of, wm8960_of_match);
   1507#endif
   1508
   1509#if defined(CONFIG_ACPI)
   1510static const struct acpi_device_id wm8960_acpi_match[] = {
   1511	{ "1AEC8960", 0 }, /* Wolfson PCI ID + part ID */
   1512	{ "10138960", 0 }, /* Cirrus Logic PCI ID + part ID */
   1513	{ },
   1514};
   1515MODULE_DEVICE_TABLE(acpi, wm8960_acpi_match);
   1516#endif
   1517
   1518static struct i2c_driver wm8960_i2c_driver = {
   1519	.driver = {
   1520		.name = "wm8960",
   1521		.of_match_table = of_match_ptr(wm8960_of_match),
   1522		.acpi_match_table = ACPI_PTR(wm8960_acpi_match),
   1523	},
   1524	.probe_new = wm8960_i2c_probe,
   1525	.remove =   wm8960_i2c_remove,
   1526	.id_table = wm8960_i2c_id,
   1527};
   1528
   1529module_i2c_driver(wm8960_i2c_driver);
   1530
   1531MODULE_DESCRIPTION("ASoC WM8960 driver");
   1532MODULE_AUTHOR("Liam Girdwood");
   1533MODULE_LICENSE("GPL");