cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl_asrc_common.h (2850B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright 2019 NXP
      4 *
      5 */
      6
      7#ifndef _FSL_ASRC_COMMON_H
      8#define _FSL_ASRC_COMMON_H
      9
     10/* directions */
     11#define IN	0
     12#define OUT	1
     13
     14enum asrc_pair_index {
     15	ASRC_INVALID_PAIR = -1,
     16	ASRC_PAIR_A = 0,
     17	ASRC_PAIR_B = 1,
     18	ASRC_PAIR_C = 2,
     19	ASRC_PAIR_D = 3,
     20};
     21
     22#define PAIR_CTX_NUM  0x4
     23
     24/**
     25 * fsl_asrc_pair: ASRC Pair common data
     26 *
     27 * @asrc: pointer to its parent module
     28 * @error: error record
     29 * @index: pair index (ASRC_PAIR_A, ASRC_PAIR_B, ASRC_PAIR_C)
     30 * @channels: occupied channel number
     31 * @desc: input and output dma descriptors
     32 * @dma_chan: inputer and output DMA channels
     33 * @dma_data: private dma data
     34 * @pos: hardware pointer position
     35 * @req_dma_chan: flag to release dev_to_dev chan
     36 * @private: pair private area
     37 */
     38struct fsl_asrc_pair {
     39	struct fsl_asrc *asrc;
     40	unsigned int error;
     41
     42	enum asrc_pair_index index;
     43	unsigned int channels;
     44
     45	struct dma_async_tx_descriptor *desc[2];
     46	struct dma_chan *dma_chan[2];
     47	struct imx_dma_data dma_data;
     48	unsigned int pos;
     49	bool req_dma_chan;
     50
     51	void *private;
     52};
     53
     54/**
     55 * fsl_asrc: ASRC common data
     56 *
     57 * @dma_params_rx: DMA parameters for receive channel
     58 * @dma_params_tx: DMA parameters for transmit channel
     59 * @pdev: platform device pointer
     60 * @regmap: regmap handler
     61 * @paddr: physical address to the base address of registers
     62 * @mem_clk: clock source to access register
     63 * @ipg_clk: clock source to drive peripheral
     64 * @spba_clk: SPBA clock (optional, depending on SoC design)
     65 * @lock: spin lock for resource protection
     66 * @pair: pair pointers
     67 * @channel_avail: non-occupied channel numbers
     68 * @asrc_rate: default sample rate for ASoC Back-Ends
     69 * @asrc_format: default sample format for ASoC Back-Ends
     70 * @use_edma: edma is used
     71 * @get_dma_channel: function pointer
     72 * @request_pair: function pointer
     73 * @release_pair: function pointer
     74 * @get_fifo_addr: function pointer
     75 * @pair_priv_size: size of pair private struct.
     76 * @private: private data structure
     77 */
     78struct fsl_asrc {
     79	struct snd_dmaengine_dai_dma_data dma_params_rx;
     80	struct snd_dmaengine_dai_dma_data dma_params_tx;
     81	struct platform_device *pdev;
     82	struct regmap *regmap;
     83	unsigned long paddr;
     84	struct clk *mem_clk;
     85	struct clk *ipg_clk;
     86	struct clk *spba_clk;
     87	spinlock_t lock;      /* spin lock for resource protection */
     88
     89	struct fsl_asrc_pair *pair[PAIR_CTX_NUM];
     90	unsigned int channel_avail;
     91
     92	int asrc_rate;
     93	snd_pcm_format_t asrc_format;
     94	bool use_edma;
     95
     96	struct dma_chan *(*get_dma_channel)(struct fsl_asrc_pair *pair, bool dir);
     97	int (*request_pair)(int channels, struct fsl_asrc_pair *pair);
     98	void (*release_pair)(struct fsl_asrc_pair *pair);
     99	int (*get_fifo_addr)(u8 dir, enum asrc_pair_index index);
    100	size_t pair_priv_size;
    101
    102	void *private;
    103};
    104
    105#define DRV_NAME "fsl-asrc-dai"
    106extern struct snd_soc_component_driver fsl_asrc_component;
    107
    108#endif /* _FSL_ASRC_COMMON_H */