cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mpc5200_psc_ac97.c (8994B)


      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
      4//
      5// Copyright (C) 2009 Jon Smirl, Digispeaker
      6// Author: Jon Smirl <jonsmirl@gmail.com>
      7
      8#include <linux/module.h>
      9#include <linux/of_device.h>
     10#include <linux/of_platform.h>
     11#include <linux/delay.h>
     12#include <linux/time.h>
     13
     14#include <sound/pcm.h>
     15#include <sound/pcm_params.h>
     16#include <sound/soc.h>
     17
     18#include <asm/time.h>
     19#include <asm/delay.h>
     20#include <asm/mpc52xx.h>
     21#include <asm/mpc52xx_psc.h>
     22
     23#include "mpc5200_dma.h"
     24
     25#define DRV_NAME "mpc5200-psc-ac97"
     26
     27/* ALSA only supports a single AC97 device so static is recommend here */
     28static struct psc_dma *psc_dma;
     29
     30static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
     31{
     32	int status;
     33	unsigned int val;
     34
     35	mutex_lock(&psc_dma->mutex);
     36
     37	/* Wait for command send status zero = ready */
     38	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
     39				MPC52xx_PSC_SR_CMDSEND), 100, 0);
     40	if (status == 0) {
     41		pr_err("timeout on ac97 bus (rdy)\n");
     42		mutex_unlock(&psc_dma->mutex);
     43		return -ENODEV;
     44	}
     45
     46	/* Force clear the data valid bit */
     47	in_be32(&psc_dma->psc_regs->ac97_data);
     48
     49	/* Send the read */
     50	out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
     51
     52	/* Wait for the answer */
     53	status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
     54				MPC52xx_PSC_SR_DATA_VAL), 100, 0);
     55	if (status == 0) {
     56		pr_err("timeout on ac97 read (val) %x\n",
     57				in_be16(&psc_dma->psc_regs->sr_csr.status));
     58		mutex_unlock(&psc_dma->mutex);
     59		return -ENODEV;
     60	}
     61	/* Get the data */
     62	val = in_be32(&psc_dma->psc_regs->ac97_data);
     63	if (((val >> 24) & 0x7f) != reg) {
     64		pr_err("reg echo error on ac97 read\n");
     65		mutex_unlock(&psc_dma->mutex);
     66		return -ENODEV;
     67	}
     68	val = (val >> 8) & 0xffff;
     69
     70	mutex_unlock(&psc_dma->mutex);
     71	return (unsigned short) val;
     72}
     73
     74static void psc_ac97_write(struct snd_ac97 *ac97,
     75				unsigned short reg, unsigned short val)
     76{
     77	int status;
     78
     79	mutex_lock(&psc_dma->mutex);
     80
     81	/* Wait for command status zero = ready */
     82	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
     83				MPC52xx_PSC_SR_CMDSEND), 100, 0);
     84	if (status == 0) {
     85		pr_err("timeout on ac97 bus (write)\n");
     86		goto out;
     87	}
     88	/* Write data */
     89	out_be32(&psc_dma->psc_regs->ac97_cmd,
     90			((reg & 0x7f) << 24) | (val << 8));
     91
     92 out:
     93	mutex_unlock(&psc_dma->mutex);
     94}
     95
     96static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
     97{
     98	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
     99
    100	mutex_lock(&psc_dma->mutex);
    101
    102	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
    103	udelay(3);
    104	out_be32(&regs->sicr, psc_dma->sicr);
    105
    106	mutex_unlock(&psc_dma->mutex);
    107}
    108
    109static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
    110{
    111	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
    112
    113	mutex_lock(&psc_dma->mutex);
    114	dev_dbg(psc_dma->dev, "cold reset\n");
    115
    116	mpc5200_psc_ac97_gpio_reset(psc_dma->id);
    117
    118	/* Notify the PSC that a reset has occurred */
    119	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
    120
    121	/* Re-enable RX and TX */
    122	out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
    123
    124	mutex_unlock(&psc_dma->mutex);
    125
    126	usleep_range(1000, 2000);
    127	psc_ac97_warm_reset(ac97);
    128}
    129
    130static struct snd_ac97_bus_ops psc_ac97_ops = {
    131	.read		= psc_ac97_read,
    132	.write		= psc_ac97_write,
    133	.reset		= psc_ac97_cold_reset,
    134	.warm_reset	= psc_ac97_warm_reset,
    135};
    136
    137static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
    138				 struct snd_pcm_hw_params *params,
    139				 struct snd_soc_dai *cpu_dai)
    140{
    141	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
    142	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
    143
    144	dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
    145		" periods=%i buffer_size=%i  buffer_bytes=%i channels=%i"
    146		" rate=%i format=%i\n",
    147		__func__, substream, params_period_size(params),
    148		params_period_bytes(params), params_periods(params),
    149		params_buffer_size(params), params_buffer_bytes(params),
    150		params_channels(params), params_rate(params),
    151		params_format(params));
    152
    153	/* Determine the set of enable bits to turn on */
    154	s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
    155	if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
    156		s->ac97_slot_bits <<= 16;
    157	return 0;
    158}
    159
    160static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
    161				 struct snd_pcm_hw_params *params,
    162				 struct snd_soc_dai *cpu_dai)
    163{
    164	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
    165
    166	dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
    167
    168	if (params_channels(params) == 1)
    169		out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
    170	else
    171		out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
    172
    173	return 0;
    174}
    175
    176static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
    177							struct snd_soc_dai *dai)
    178{
    179	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
    180	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
    181
    182	switch (cmd) {
    183	case SNDRV_PCM_TRIGGER_START:
    184		dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
    185			substream->pstr->stream);
    186
    187		/* Set the slot enable bits */
    188		psc_dma->slots |= s->ac97_slot_bits;
    189		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
    190		break;
    191
    192	case SNDRV_PCM_TRIGGER_STOP:
    193		dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
    194			substream->pstr->stream);
    195
    196		/* Clear the slot enable bits */
    197		psc_dma->slots &= ~(s->ac97_slot_bits);
    198		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
    199		break;
    200	}
    201	return 0;
    202}
    203
    204static int psc_ac97_probe(struct snd_soc_dai *cpu_dai)
    205{
    206	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
    207	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
    208
    209	/* Go */
    210	out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
    211	return 0;
    212}
    213
    214/* ---------------------------------------------------------------------
    215 * ALSA SoC Bindings
    216 *
    217 * - Digital Audio Interface (DAI) template
    218 * - create/destroy dai hooks
    219 */
    220
    221/**
    222 * psc_ac97_dai_template: template CPU Digital Audio Interface
    223 */
    224static const struct snd_soc_dai_ops psc_ac97_analog_ops = {
    225	.hw_params	= psc_ac97_hw_analog_params,
    226	.trigger	= psc_ac97_trigger,
    227};
    228
    229static const struct snd_soc_dai_ops psc_ac97_digital_ops = {
    230	.hw_params	= psc_ac97_hw_digital_params,
    231};
    232
    233static struct snd_soc_dai_driver psc_ac97_dai[] = {
    234{
    235	.name = "mpc5200-psc-ac97.0",
    236	.probe	= psc_ac97_probe,
    237	.playback = {
    238		.stream_name	= "AC97 Playback",
    239		.channels_min   = 1,
    240		.channels_max   = 6,
    241		.rates          = SNDRV_PCM_RATE_8000_48000,
    242		.formats = SNDRV_PCM_FMTBIT_S32_BE,
    243	},
    244	.capture = {
    245		.stream_name	= "AC97 Capture",
    246		.channels_min   = 1,
    247		.channels_max   = 2,
    248		.rates          = SNDRV_PCM_RATE_8000_48000,
    249		.formats = SNDRV_PCM_FMTBIT_S32_BE,
    250	},
    251	.ops = &psc_ac97_analog_ops,
    252},
    253{
    254	.name = "mpc5200-psc-ac97.1",
    255	.playback = {
    256		.stream_name	= "AC97 SPDIF",
    257		.channels_min   = 1,
    258		.channels_max   = 2,
    259		.rates          = SNDRV_PCM_RATE_32000 | \
    260			SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
    261		.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
    262	},
    263	.ops = &psc_ac97_digital_ops,
    264} };
    265
    266static const struct snd_soc_component_driver psc_ac97_component = {
    267	.name		= DRV_NAME,
    268};
    269
    270
    271/* ---------------------------------------------------------------------
    272 * OF platform bus binding code:
    273 * - Probe/remove operations
    274 * - OF device match table
    275 */
    276static int psc_ac97_of_probe(struct platform_device *op)
    277{
    278	int rc;
    279	struct mpc52xx_psc __iomem *regs;
    280
    281	rc = mpc5200_audio_dma_create(op);
    282	if (rc != 0)
    283		return rc;
    284
    285	rc = snd_soc_set_ac97_ops(&psc_ac97_ops);
    286	if (rc != 0) {
    287		dev_err(&op->dev, "Failed to set AC'97 ops: %d\n", rc);
    288		return rc;
    289	}
    290
    291	rc = snd_soc_register_component(&op->dev, &psc_ac97_component,
    292					psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
    293	if (rc != 0) {
    294		dev_err(&op->dev, "Failed to register DAI\n");
    295		return rc;
    296	}
    297
    298	psc_dma = dev_get_drvdata(&op->dev);
    299	regs = psc_dma->psc_regs;
    300
    301	psc_dma->imr = 0;
    302	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
    303
    304	/* Configure the serial interface mode to AC97 */
    305	psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
    306	out_be32(&regs->sicr, psc_dma->sicr);
    307
    308	/* No slots active */
    309	out_be32(&regs->ac97_slots, 0x00000000);
    310
    311	return 0;
    312}
    313
    314static int psc_ac97_of_remove(struct platform_device *op)
    315{
    316	mpc5200_audio_dma_destroy(op);
    317	snd_soc_unregister_component(&op->dev);
    318	snd_soc_set_ac97_ops(NULL);
    319	return 0;
    320}
    321
    322/* Match table for of_platform binding */
    323static const struct of_device_id psc_ac97_match[] = {
    324	{ .compatible = "fsl,mpc5200-psc-ac97", },
    325	{ .compatible = "fsl,mpc5200b-psc-ac97", },
    326	{}
    327};
    328MODULE_DEVICE_TABLE(of, psc_ac97_match);
    329
    330static struct platform_driver psc_ac97_driver = {
    331	.probe = psc_ac97_of_probe,
    332	.remove = psc_ac97_of_remove,
    333	.driver = {
    334		.name = "mpc5200-psc-ac97",
    335		.of_match_table = psc_ac97_match,
    336	},
    337};
    338
    339module_platform_driver(psc_ac97_driver);
    340
    341MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
    342MODULE_DESCRIPTION("mpc5200 AC97 module");
    343MODULE_LICENSE("GPL");
    344