cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cht_bsw_rt5672.c (15628B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
      4 *                     Cherrytrail and Braswell, with RT5672 codec.
      5 *
      6 *  Copyright (C) 2014 Intel Corp
      7 *  Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
      8 *          Mengdong Lin <mengdong.lin@intel.com>
      9 */
     10
     11#include <linux/gpio/consumer.h>
     12#include <linux/input.h>
     13#include <linux/module.h>
     14#include <linux/platform_device.h>
     15#include <linux/slab.h>
     16#include <linux/clk.h>
     17#include <sound/pcm.h>
     18#include <sound/pcm_params.h>
     19#include <sound/soc.h>
     20#include <sound/jack.h>
     21#include <sound/soc-acpi.h>
     22#include "../../codecs/rt5670.h"
     23#include "../atom/sst-atom-controls.h"
     24#include "../common/soc-intel-quirks.h"
     25
     26
     27/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
     28#define CHT_PLAT_CLK_3_HZ	19200000
     29#define CHT_CODEC_DAI	"rt5670-aif1"
     30
     31struct cht_mc_private {
     32	struct snd_soc_jack headset;
     33	char codec_name[SND_ACPI_I2C_ID_LEN];
     34	struct clk *mclk;
     35	bool use_ssp0;
     36};
     37
     38/* Headset jack detection DAPM pins */
     39static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
     40	{
     41		.pin = "Headset Mic",
     42		.mask = SND_JACK_MICROPHONE,
     43	},
     44	{
     45		.pin = "Headphone",
     46		.mask = SND_JACK_HEADPHONE,
     47	},
     48};
     49
     50static int platform_clock_control(struct snd_soc_dapm_widget *w,
     51		struct snd_kcontrol *k, int  event)
     52{
     53	struct snd_soc_dapm_context *dapm = w->dapm;
     54	struct snd_soc_card *card = dapm->card;
     55	struct snd_soc_dai *codec_dai;
     56	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
     57	int ret;
     58
     59	codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
     60	if (!codec_dai) {
     61		dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
     62		return -EIO;
     63	}
     64
     65	if (SND_SOC_DAPM_EVENT_ON(event)) {
     66		if (ctx->mclk) {
     67			ret = clk_prepare_enable(ctx->mclk);
     68			if (ret < 0) {
     69				dev_err(card->dev,
     70					"could not configure MCLK state");
     71				return ret;
     72			}
     73		}
     74
     75		/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
     76		ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
     77				CHT_PLAT_CLK_3_HZ, 48000 * 512);
     78		if (ret < 0) {
     79			dev_err(card->dev, "can't set codec pll: %d\n", ret);
     80			return ret;
     81		}
     82
     83		/* set codec sysclk source to PLL */
     84		ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
     85			48000 * 512, SND_SOC_CLOCK_IN);
     86		if (ret < 0) {
     87			dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
     88			return ret;
     89		}
     90	} else {
     91		/* Set codec sysclk source to its internal clock because codec
     92		 * PLL will be off when idle and MCLK will also be off by ACPI
     93		 * when codec is runtime suspended. Codec needs clock for jack
     94		 * detection and button press.
     95		 */
     96		snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
     97				       48000 * 512, SND_SOC_CLOCK_IN);
     98
     99		if (ctx->mclk)
    100			clk_disable_unprepare(ctx->mclk);
    101	}
    102	return 0;
    103}
    104
    105static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
    106	SND_SOC_DAPM_HP("Headphone", NULL),
    107	SND_SOC_DAPM_MIC("Headset Mic", NULL),
    108	SND_SOC_DAPM_MIC("Int Mic", NULL),
    109	SND_SOC_DAPM_SPK("Ext Spk", NULL),
    110	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
    111			platform_clock_control, SND_SOC_DAPM_PRE_PMU |
    112			SND_SOC_DAPM_POST_PMD),
    113};
    114
    115static const struct snd_soc_dapm_route cht_audio_map[] = {
    116	{"IN1P", NULL, "Headset Mic"},
    117	{"IN1N", NULL, "Headset Mic"},
    118	{"DMIC L1", NULL, "Int Mic"},
    119	{"DMIC R1", NULL, "Int Mic"},
    120	{"Headphone", NULL, "HPOL"},
    121	{"Headphone", NULL, "HPOR"},
    122	{"Ext Spk", NULL, "SPOLP"},
    123	{"Ext Spk", NULL, "SPOLN"},
    124	{"Ext Spk", NULL, "SPORP"},
    125	{"Ext Spk", NULL, "SPORN"},
    126	{"Headphone", NULL, "Platform Clock"},
    127	{"Headset Mic", NULL, "Platform Clock"},
    128	{"Int Mic", NULL, "Platform Clock"},
    129	{"Ext Spk", NULL, "Platform Clock"},
    130};
    131
    132static const struct snd_soc_dapm_route cht_audio_ssp0_map[] = {
    133	{"AIF1 Playback", NULL, "ssp0 Tx"},
    134	{"ssp0 Tx", NULL, "modem_out"},
    135	{"modem_in", NULL, "ssp0 Rx"},
    136	{"ssp0 Rx", NULL, "AIF1 Capture"},
    137};
    138
    139static const struct snd_soc_dapm_route cht_audio_ssp2_map[] = {
    140	{"AIF1 Playback", NULL, "ssp2 Tx"},
    141	{"ssp2 Tx", NULL, "codec_out0"},
    142	{"ssp2 Tx", NULL, "codec_out1"},
    143	{"codec_in0", NULL, "ssp2 Rx"},
    144	{"codec_in1", NULL, "ssp2 Rx"},
    145	{"ssp2 Rx", NULL, "AIF1 Capture"},
    146};
    147
    148static const struct snd_kcontrol_new cht_mc_controls[] = {
    149	SOC_DAPM_PIN_SWITCH("Headphone"),
    150	SOC_DAPM_PIN_SWITCH("Headset Mic"),
    151	SOC_DAPM_PIN_SWITCH("Int Mic"),
    152	SOC_DAPM_PIN_SWITCH("Ext Spk"),
    153};
    154
    155static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
    156					struct snd_pcm_hw_params *params)
    157{
    158	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
    159	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
    160	int ret;
    161
    162	/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
    163	ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
    164				  CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
    165	if (ret < 0) {
    166		dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
    167		return ret;
    168	}
    169
    170	/* set codec sysclk source to PLL */
    171	ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
    172				     params_rate(params) * 512,
    173				     SND_SOC_CLOCK_IN);
    174	if (ret < 0) {
    175		dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
    176		return ret;
    177	}
    178	return 0;
    179}
    180
    181static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
    182
    183static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
    184	{ "headset-gpios", &headset_gpios, 1 },
    185	{},
    186};
    187
    188static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
    189{
    190	int ret;
    191	struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(runtime, 0);
    192	struct snd_soc_component *component = codec_dai->component;
    193	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
    194
    195	if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
    196		dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
    197
    198	/* Select codec ASRC clock source to track I2S1 clock, because codec
    199	 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
    200	 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
    201	 * noise.
    202	 */
    203	rt5670_sel_asrc_clk_src(component,
    204				RT5670_DA_STEREO_FILTER
    205				| RT5670_DA_MONO_L_FILTER
    206				| RT5670_DA_MONO_R_FILTER
    207				| RT5670_AD_STEREO_FILTER
    208				| RT5670_AD_MONO_L_FILTER
    209				| RT5670_AD_MONO_R_FILTER,
    210				RT5670_CLK_SEL_I2S1_ASRC);
    211
    212	if (ctx->use_ssp0) {
    213		ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
    214					      cht_audio_ssp0_map,
    215					      ARRAY_SIZE(cht_audio_ssp0_map));
    216	} else {
    217		ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
    218					      cht_audio_ssp2_map,
    219					      ARRAY_SIZE(cht_audio_ssp2_map));
    220	}
    221	if (ret)
    222		return ret;
    223
    224	ret = snd_soc_card_jack_new_pins(runtime->card, "Headset",
    225					 SND_JACK_HEADSET | SND_JACK_BTN_0 |
    226					 SND_JACK_BTN_1 | SND_JACK_BTN_2,
    227					 &ctx->headset,
    228					 cht_bsw_headset_pins,
    229					 ARRAY_SIZE(cht_bsw_headset_pins));
    230        if (ret)
    231                return ret;
    232
    233	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
    234	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
    235	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
    236
    237	rt5670_set_jack_detect(component, &ctx->headset);
    238	if (ctx->mclk) {
    239		/*
    240		 * The firmware might enable the clock at
    241		 * boot (this information may or may not
    242		 * be reflected in the enable clock register).
    243		 * To change the rate we must disable the clock
    244		 * first to cover these cases. Due to common
    245		 * clock framework restrictions that do not allow
    246		 * to disable a clock that has not been enabled,
    247		 * we need to enable the clock first.
    248		 */
    249		ret = clk_prepare_enable(ctx->mclk);
    250		if (!ret)
    251			clk_disable_unprepare(ctx->mclk);
    252
    253		ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
    254
    255		if (ret) {
    256			dev_err(runtime->dev, "unable to set MCLK rate\n");
    257			return ret;
    258		}
    259	}
    260	return 0;
    261}
    262
    263static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
    264			    struct snd_pcm_hw_params *params)
    265{
    266	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(rtd->card);
    267	struct snd_interval *rate = hw_param_interval(params,
    268			SNDRV_PCM_HW_PARAM_RATE);
    269	struct snd_interval *channels = hw_param_interval(params,
    270						SNDRV_PCM_HW_PARAM_CHANNELS);
    271	int ret, bits;
    272
    273	/* The DSP will covert the FE rate to 48k, stereo, 24bits */
    274	rate->min = rate->max = 48000;
    275	channels->min = channels->max = 2;
    276
    277	if (ctx->use_ssp0) {
    278		/* set SSP0 to 16-bit */
    279		params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
    280		bits = 16;
    281	} else {
    282		/* set SSP2 to 24-bit */
    283		params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
    284		bits = 24;
    285	}
    286
    287	/*
    288	 * The default mode for the cpu-dai is TDM 4 slot. The default mode
    289	 * for the codec-dai is I2S. So we need to either set the cpu-dai to
    290	 * I2S mode to match the codec-dai, or set the codec-dai to TDM 4 slot
    291	 * (or program both to yet another mode).
    292	 * One board, the Lenovo Miix 2 10, uses not 1 but 2 codecs connected
    293	 * to SSP2. The second piggy-backed, output-only codec is inside the
    294	 * keyboard-dock (which has extra speakers). Unlike the main rt5672
    295	 * codec, we cannot configure this codec, it is hard coded to use
    296	 * 2 channel 24 bit I2S. For this to work we must use I2S mode on this
    297	 * board. Since we only support 2 channels anyways, there is no need
    298	 * for TDM on any cht-bsw-rt5672 designs. So we use I2S 2ch everywhere.
    299	 */
    300	ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0),
    301				  SND_SOC_DAIFMT_I2S     |
    302				  SND_SOC_DAIFMT_NB_NF   |
    303				  SND_SOC_DAIFMT_CBC_CFC);
    304	if (ret < 0) {
    305		dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
    306		return ret;
    307	}
    308
    309	ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
    310	if (ret < 0) {
    311		dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
    312		return ret;
    313	}
    314
    315	return 0;
    316}
    317
    318static int cht_aif1_startup(struct snd_pcm_substream *substream)
    319{
    320	return snd_pcm_hw_constraint_single(substream->runtime,
    321			SNDRV_PCM_HW_PARAM_RATE, 48000);
    322}
    323
    324static const struct snd_soc_ops cht_aif1_ops = {
    325	.startup = cht_aif1_startup,
    326};
    327
    328static const struct snd_soc_ops cht_be_ssp2_ops = {
    329	.hw_params = cht_aif1_hw_params,
    330};
    331
    332SND_SOC_DAILINK_DEF(dummy,
    333	DAILINK_COMP_ARRAY(COMP_DUMMY()));
    334
    335SND_SOC_DAILINK_DEF(media,
    336	DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
    337
    338SND_SOC_DAILINK_DEF(deepbuffer,
    339	DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
    340
    341SND_SOC_DAILINK_DEF(ssp2_port,
    342	DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
    343SND_SOC_DAILINK_DEF(ssp2_codec,
    344	DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
    345				      "rt5670-aif1")));
    346
    347SND_SOC_DAILINK_DEF(platform,
    348	DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
    349
    350static struct snd_soc_dai_link cht_dailink[] = {
    351	/* Front End DAI links */
    352	[MERR_DPCM_AUDIO] = {
    353		.name = "Audio Port",
    354		.stream_name = "Audio",
    355		.nonatomic = true,
    356		.dynamic = 1,
    357		.dpcm_playback = 1,
    358		.dpcm_capture = 1,
    359		.ops = &cht_aif1_ops,
    360		SND_SOC_DAILINK_REG(media, dummy, platform),
    361	},
    362	[MERR_DPCM_DEEP_BUFFER] = {
    363		.name = "Deep-Buffer Audio Port",
    364		.stream_name = "Deep-Buffer Audio",
    365		.nonatomic = true,
    366		.dynamic = 1,
    367		.dpcm_playback = 1,
    368		.ops = &cht_aif1_ops,
    369		SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
    370	},
    371
    372	/* Back End DAI links */
    373	{
    374		/* SSP2 - Codec */
    375		.name = "SSP2-Codec",
    376		.id = 0,
    377		.no_pcm = 1,
    378		.init = cht_codec_init,
    379		.be_hw_params_fixup = cht_codec_fixup,
    380		.dpcm_playback = 1,
    381		.dpcm_capture = 1,
    382		.ops = &cht_be_ssp2_ops,
    383		SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
    384	},
    385};
    386
    387static int cht_suspend_pre(struct snd_soc_card *card)
    388{
    389	struct snd_soc_component *component;
    390	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
    391
    392	for_each_card_components(card, component) {
    393		if (!strncmp(component->name,
    394			     ctx->codec_name, sizeof(ctx->codec_name))) {
    395
    396			dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
    397			rt5670_jack_suspend(component);
    398			break;
    399		}
    400	}
    401	return 0;
    402}
    403
    404static int cht_resume_post(struct snd_soc_card *card)
    405{
    406	struct snd_soc_component *component;
    407	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
    408
    409	for_each_card_components(card, component) {
    410		if (!strncmp(component->name,
    411			     ctx->codec_name, sizeof(ctx->codec_name))) {
    412
    413			dev_dbg(component->dev, "enabling jack detect for resume.\n");
    414			rt5670_jack_resume(component);
    415			break;
    416		}
    417	}
    418
    419	return 0;
    420}
    421
    422/* use space before codec name to simplify card ID, and simplify driver name */
    423#define SOF_CARD_NAME "bytcht rt5672" /* card name will be 'sof-bytcht rt5672' */
    424#define SOF_DRIVER_NAME "SOF"
    425
    426#define CARD_NAME "cht-bsw-rt5672"
    427#define DRIVER_NAME NULL /* card name will be used for driver name */
    428
    429/* SoC card */
    430static struct snd_soc_card snd_soc_card_cht = {
    431	.owner = THIS_MODULE,
    432	.dai_link = cht_dailink,
    433	.num_links = ARRAY_SIZE(cht_dailink),
    434	.dapm_widgets = cht_dapm_widgets,
    435	.num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
    436	.dapm_routes = cht_audio_map,
    437	.num_dapm_routes = ARRAY_SIZE(cht_audio_map),
    438	.controls = cht_mc_controls,
    439	.num_controls = ARRAY_SIZE(cht_mc_controls),
    440	.suspend_pre = cht_suspend_pre,
    441	.resume_post = cht_resume_post,
    442};
    443
    444#define RT5672_I2C_DEFAULT	"i2c-10EC5670:00"
    445
    446static int snd_cht_mc_probe(struct platform_device *pdev)
    447{
    448	int ret_val = 0;
    449	struct cht_mc_private *drv;
    450	struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
    451	const char *platform_name;
    452	struct acpi_device *adev;
    453	bool sof_parent;
    454	int dai_index = 0;
    455	int i;
    456
    457	drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
    458	if (!drv)
    459		return -ENOMEM;
    460
    461	strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
    462
    463	/* find index of codec dai */
    464	for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
    465		if (!strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
    466			dai_index = i;
    467			break;
    468		}
    469	}
    470
    471	/* fixup codec name based on HID */
    472	adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
    473	if (adev) {
    474		snprintf(drv->codec_name, sizeof(drv->codec_name),
    475			 "i2c-%s", acpi_dev_name(adev));
    476		put_device(&adev->dev);
    477		cht_dailink[dai_index].codecs->name = drv->codec_name;
    478	}
    479
    480	/* Use SSP0 on Bay Trail CR devices */
    481	if (soc_intel_is_byt() && mach->mach_params.acpi_ipc_irq_index == 0) {
    482		cht_dailink[dai_index].cpus->dai_name = "ssp0-port";
    483		drv->use_ssp0 = true;
    484	}
    485
    486	/* override platform name, if required */
    487	snd_soc_card_cht.dev = &pdev->dev;
    488	platform_name = mach->mach_params.platform;
    489
    490	ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
    491							platform_name);
    492	if (ret_val)
    493		return ret_val;
    494
    495	snd_soc_card_cht.components = rt5670_components();
    496
    497	drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
    498	if (IS_ERR(drv->mclk)) {
    499		dev_err(&pdev->dev,
    500			"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
    501			PTR_ERR(drv->mclk));
    502		return PTR_ERR(drv->mclk);
    503	}
    504	snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
    505
    506	sof_parent = snd_soc_acpi_sof_parent(&pdev->dev);
    507
    508	/* set card and driver name */
    509	if (sof_parent) {
    510		snd_soc_card_cht.name = SOF_CARD_NAME;
    511		snd_soc_card_cht.driver_name = SOF_DRIVER_NAME;
    512	} else {
    513		snd_soc_card_cht.name = CARD_NAME;
    514		snd_soc_card_cht.driver_name = DRIVER_NAME;
    515	}
    516
    517	/* set pm ops */
    518	if (sof_parent)
    519		pdev->dev.driver->pm = &snd_soc_pm_ops;
    520
    521	/* register the soc card */
    522	ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
    523	if (ret_val) {
    524		dev_err(&pdev->dev,
    525			"snd_soc_register_card failed %d\n", ret_val);
    526		return ret_val;
    527	}
    528	platform_set_drvdata(pdev, &snd_soc_card_cht);
    529	return ret_val;
    530}
    531
    532static struct platform_driver snd_cht_mc_driver = {
    533	.driver = {
    534		.name = "cht-bsw-rt5672",
    535	},
    536	.probe = snd_cht_mc_probe,
    537};
    538
    539module_platform_driver(snd_cht_mc_driver);
    540
    541MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
    542MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
    543MODULE_LICENSE("GPL v2");
    544MODULE_ALIAS("platform:cht-bsw-rt5672");