cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

skl-i2s.h (2118B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  skl-i2s.h - i2s blob mapping
      4 *
      5 *  Copyright (C) 2017 Intel Corp
      6 *  Author: Subhransu S. Prusty < subhransu.s.prusty@intel.com>
      7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      8 *
      9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     10 */
     11
     12#ifndef __SOUND_SOC_SKL_I2S_H
     13#define __SOUND_SOC_SKL_I2S_H
     14
     15#define SKL_I2S_MAX_TIME_SLOTS		8
     16#define SKL_MCLK_DIV_CLK_SRC_MASK	GENMASK(17, 16)
     17
     18#define SKL_MNDSS_DIV_CLK_SRC_MASK	GENMASK(21, 20)
     19#define SKL_SHIFT(x)			(ffs(x) - 1)
     20#define SKL_MCLK_DIV_RATIO_MASK		GENMASK(11, 0)
     21
     22#define is_legacy_blob(x) (x.signature != 0xEE)
     23#define ext_to_legacy_blob(i2s_config_blob_ext) \
     24	((struct skl_i2s_config_blob_legacy *) i2s_config_blob_ext)
     25
     26#define get_clk_src(mclk, mask) \
     27		((mclk.mdivctrl & mask) >> SKL_SHIFT(mask))
     28struct skl_i2s_config {
     29	u32 ssc0;
     30	u32 ssc1;
     31	u32 sscto;
     32	u32 sspsp;
     33	u32 sstsa;
     34	u32 ssrsa;
     35	u32 ssc2;
     36	u32 sspsp2;
     37	u32 ssc3;
     38	u32 ssioc;
     39} __packed;
     40
     41struct skl_i2s_config_mclk {
     42	u32 mdivctrl;
     43	u32 mdivr;
     44};
     45
     46struct skl_i2s_config_mclk_ext {
     47	u32 mdivctrl;
     48	u32 mdivr_count;
     49	u32 mdivr[];
     50} __packed;
     51
     52struct skl_i2s_config_blob_signature {
     53	u32 minor_ver : 8;
     54	u32 major_ver : 8;
     55	u32 resvdz : 8;
     56	u32 signature : 8;
     57} __packed;
     58
     59struct skl_i2s_config_blob_header {
     60	struct skl_i2s_config_blob_signature sig;
     61	u32 size;
     62};
     63
     64/**
     65 * struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway
     66 * configuration legacy blob
     67 *
     68 * @gtw_attr:		Gateway attribute for the I2S Gateway
     69 * @tdm_ts_group:	TDM slot mapping against channels in the Gateway.
     70 * @i2s_cfg:		I2S HW registers
     71 * @mclk:		MCLK clock source and divider values
     72 */
     73struct skl_i2s_config_blob_legacy {
     74	u32 gtw_attr;
     75	u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
     76	struct skl_i2s_config i2s_cfg;
     77	struct skl_i2s_config_mclk mclk;
     78};
     79
     80struct skl_i2s_config_blob_ext {
     81	u32 gtw_attr;
     82	struct skl_i2s_config_blob_header hdr;
     83	u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
     84	struct skl_i2s_config i2s_cfg;
     85	struct skl_i2s_config_mclk_ext mclk;
     86} __packed;
     87#endif /* __SOUND_SOC_SKL_I2S_H */