cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mt8192-afe-common.h (3431B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * mt8192-afe-common.h  --  Mediatek 8192 audio driver definitions
      4 *
      5 * Copyright (c) 2020 MediaTek Inc.
      6 * Author: Shane Chien <shane.chien@mediatek.com>
      7 */
      8
      9#ifndef _MT_8192_AFE_COMMON_H_
     10#define _MT_8192_AFE_COMMON_H_
     11
     12#include <linux/list.h>
     13#include <linux/regmap.h>
     14#include <sound/soc.h>
     15
     16#include "../common/mtk-base-afe.h"
     17#include "mt8192-reg.h"
     18
     19enum {
     20	MT8192_MEMIF_DL1,
     21	MT8192_MEMIF_DL12,
     22	MT8192_MEMIF_DL2,
     23	MT8192_MEMIF_DL3,
     24	MT8192_MEMIF_DL4,
     25	MT8192_MEMIF_DL5,
     26	MT8192_MEMIF_DL6,
     27	MT8192_MEMIF_DL7,
     28	MT8192_MEMIF_DL8,
     29	MT8192_MEMIF_DL9,
     30	MT8192_MEMIF_DAI,
     31	MT8192_MEMIF_DAI2,
     32	MT8192_MEMIF_MOD_DAI,
     33	MT8192_MEMIF_VUL12,
     34	MT8192_MEMIF_VUL2,
     35	MT8192_MEMIF_VUL3,
     36	MT8192_MEMIF_VUL4,
     37	MT8192_MEMIF_VUL5,
     38	MT8192_MEMIF_VUL6,
     39	MT8192_MEMIF_AWB,
     40	MT8192_MEMIF_AWB2,
     41	MT8192_MEMIF_HDMI,
     42	MT8192_MEMIF_NUM,
     43	MT8192_DAI_ADDA = MT8192_MEMIF_NUM,
     44	MT8192_DAI_ADDA_CH34,
     45	MT8192_DAI_AP_DMIC,
     46	MT8192_DAI_AP_DMIC_CH34,
     47	MT8192_DAI_VOW,
     48	MT8192_DAI_CONNSYS_I2S,
     49	MT8192_DAI_I2S_0,
     50	MT8192_DAI_I2S_1,
     51	MT8192_DAI_I2S_2,
     52	MT8192_DAI_I2S_3,
     53	MT8192_DAI_I2S_5,
     54	MT8192_DAI_I2S_6,
     55	MT8192_DAI_I2S_7,
     56	MT8192_DAI_I2S_8,
     57	MT8192_DAI_I2S_9,
     58	MT8192_DAI_HW_GAIN_1,
     59	MT8192_DAI_HW_GAIN_2,
     60	MT8192_DAI_SRC_1,
     61	MT8192_DAI_SRC_2,
     62	MT8192_DAI_PCM_1,
     63	MT8192_DAI_PCM_2,
     64	MT8192_DAI_TDM,
     65	MT8192_DAI_NUM,
     66};
     67
     68enum {
     69	MT8192_IRQ_0,
     70	MT8192_IRQ_1,
     71	MT8192_IRQ_2,
     72	MT8192_IRQ_3,
     73	MT8192_IRQ_4,
     74	MT8192_IRQ_5,
     75	MT8192_IRQ_6,
     76	MT8192_IRQ_7,
     77	MT8192_IRQ_8,
     78	MT8192_IRQ_9,
     79	MT8192_IRQ_10,
     80	MT8192_IRQ_11,
     81	MT8192_IRQ_12,
     82	MT8192_IRQ_13,
     83	MT8192_IRQ_14,
     84	MT8192_IRQ_15,
     85	MT8192_IRQ_16,
     86	MT8192_IRQ_17,
     87	MT8192_IRQ_18,
     88	MT8192_IRQ_19,
     89	MT8192_IRQ_20,
     90	MT8192_IRQ_21,
     91	MT8192_IRQ_22,
     92	MT8192_IRQ_23,
     93	MT8192_IRQ_24,
     94	MT8192_IRQ_25,
     95	MT8192_IRQ_26,
     96	MT8192_IRQ_31,	/* used only for TDM */
     97	MT8192_IRQ_NUM,
     98};
     99
    100enum {
    101	MTKAIF_PROTOCOL_1 = 0,
    102	MTKAIF_PROTOCOL_2,
    103	MTKAIF_PROTOCOL_2_CLK_P2,
    104};
    105
    106enum {
    107	MTK_AFE_ADDA_DL_GAIN_MUTE = 0,
    108	MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,
    109	/* SA suggest apply -0.3db to audio/speech path */
    110};
    111
    112/* MCLK */
    113enum {
    114	MT8192_I2S0_MCK = 0,
    115	MT8192_I2S1_MCK,
    116	MT8192_I2S2_MCK,
    117	MT8192_I2S3_MCK,
    118	MT8192_I2S4_MCK,
    119	MT8192_I2S4_BCK,
    120	MT8192_I2S5_MCK,
    121	MT8192_I2S6_MCK,
    122	MT8192_I2S7_MCK,
    123	MT8192_I2S8_MCK,
    124	MT8192_I2S9_MCK,
    125	MT8192_MCK_NUM,
    126};
    127
    128struct clk;
    129
    130struct mt8192_afe_private {
    131	struct clk **clk;
    132	struct regmap *topckgen;
    133	struct regmap *apmixedsys;
    134	struct regmap *infracfg;
    135	int stf_positive_gain_db;
    136	int pm_runtime_bypass_reg_ctl;
    137
    138	/* dai */
    139	bool dai_on[MT8192_DAI_NUM];
    140	void *dai_priv[MT8192_DAI_NUM];
    141
    142	/* adda */
    143	int mtkaif_protocol;
    144	int mtkaif_chosen_phase[4];
    145	int mtkaif_phase_cycle[4];
    146	int mtkaif_calibration_num_phase;
    147	int mtkaif_dmic;
    148	int mtkaif_dmic_ch34;
    149	int mtkaif_adda6_only;
    150
    151	/* mck */
    152	int mck_rate[MT8192_MCK_NUM];
    153};
    154
    155int mt8192_dai_adda_register(struct mtk_base_afe *afe);
    156int mt8192_dai_i2s_register(struct mtk_base_afe *afe);
    157int mt8192_dai_hw_gain_register(struct mtk_base_afe *afe);
    158int mt8192_dai_src_register(struct mtk_base_afe *afe);
    159int mt8192_dai_pcm_register(struct mtk_base_afe *afe);
    160int mt8192_dai_tdm_register(struct mtk_base_afe *afe);
    161
    162unsigned int mt8192_general_rate_transform(struct device *dev,
    163					   unsigned int rate);
    164unsigned int mt8192_rate_transform(struct device *dev,
    165				   unsigned int rate, int aud_blk);
    166
    167int mt8192_dai_set_priv(struct mtk_base_afe *afe, int id,
    168			int priv_size, const void *priv_data);
    169
    170#endif