cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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apl.c (3060B)

      1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
      2//
      3// This file is provided under a dual BSD/GPLv2 license.  When using or
      4// redistributing this file, you may do so under either license.
      5//
      6// Copyright(c) 2018 Intel Corporation. All rights reserved.
      7//
      8// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
      9//	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
     10//	    Rander Wang <rander.wang@intel.com>
     11//          Keyon Jie <yang.jie@linux.intel.com>
     12//
     13
     14/*
     15 * Hardware interface for audio DSP on Apollolake and GeminiLake
     16 */
     17
     18#include <sound/sof/ext_manifest4.h>
     19#include "../ipc4-priv.h"
     20#include "../sof-priv.h"
     21#include "hda.h"
     22#include "../sof-audio.h"
     23
     24static const struct snd_sof_debugfs_map apl_dsp_debugfs[] = {
     25	{"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS},
     26	{"pp", HDA_DSP_PP_BAR,  0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS},
     27	{"dsp", HDA_DSP_BAR,  0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
     28};
     29
     30/* apollolake ops */
     31struct snd_sof_dsp_ops sof_apl_ops;
     32EXPORT_SYMBOL_NS(sof_apl_ops, SND_SOC_SOF_INTEL_HDA_COMMON);
     33
     34int sof_apl_ops_init(struct snd_sof_dev *sdev)
     35{
     36	/* common defaults */
     37	memcpy(&sof_apl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops));
     38
     39	/* probe/remove/shutdown */
     40	sof_apl_ops.shutdown	= hda_dsp_shutdown;
     41
     42	if (sdev->pdata->ipc_type == SOF_IPC) {
     43		/* doorbell */
     44		sof_apl_ops.irq_thread	= hda_dsp_ipc_irq_thread;
     45
     46		/* ipc */
     47		sof_apl_ops.send_msg	= hda_dsp_ipc_send_msg;
     48	}
     49
     50	if (sdev->pdata->ipc_type == SOF_INTEL_IPC4) {
     51		struct sof_ipc4_fw_data *ipc4_data;
     52
     53		sdev->private = devm_kzalloc(sdev->dev, sizeof(*ipc4_data), GFP_KERNEL);
     54		if (!sdev->private)
     55			return -ENOMEM;
     56
     57		ipc4_data = sdev->private;
     58		ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET;
     59
     60		/* doorbell */
     61		sof_apl_ops.irq_thread	= hda_dsp_ipc4_irq_thread;
     62
     63		/* ipc */
     64		sof_apl_ops.send_msg	= hda_dsp_ipc4_send_msg;
     65	}
     66
     67	/* set DAI driver ops */
     68	hda_set_dai_drv_ops(sdev, &sof_apl_ops);
     69
     70	/* debug */
     71	sof_apl_ops.debug_map	= apl_dsp_debugfs;
     72	sof_apl_ops.debug_map_count	= ARRAY_SIZE(apl_dsp_debugfs);
     73	sof_apl_ops.ipc_dump	= hda_ipc_dump;
     74
     75	/* firmware run */
     76	sof_apl_ops.run = hda_dsp_cl_boot_firmware;
     77
     78	/* pre/post fw run */
     79	sof_apl_ops.post_fw_run = hda_dsp_post_fw_run;
     80
     81	/* dsp core get/put */
     82	sof_apl_ops.core_get = hda_dsp_core_get;
     83
     84	return 0;
     85};
     86EXPORT_SYMBOL_NS(sof_apl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON);
     87
     88const struct sof_intel_dsp_desc apl_chip_info = {
     89	/* Apollolake */
     90	.cores_num = 2,
     91	.init_core_mask = 1,
     92	.host_managed_cores_mask = GENMASK(1, 0),
     93	.ipc_req = HDA_DSP_REG_HIPCI,
     94	.ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY,
     95	.ipc_ack = HDA_DSP_REG_HIPCIE,
     96	.ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE,
     97	.ipc_ctl = HDA_DSP_REG_HIPCCTL,
     98	.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
     99	.rom_init_timeout	= 150,
    100	.ssp_count = APL_SSP_COUNT,
    101	.ssp_base_offset = APL_SSP_BASE_OFFSET,
    102	.quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
    103	.check_ipc_irq	= hda_dsp_check_ipc_irq,
    104	.hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
    105};
    106EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);