cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hda-bus.c (2521B)


      1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
      2//
      3// This file is provided under a dual BSD/GPLv2 license.  When using or
      4// redistributing this file, you may do so under either license.
      5//
      6// Copyright(c) 2018 Intel Corporation. All rights reserved.
      7//
      8// Authors: Keyon Jie <yang.jie@linux.intel.com>
      9
     10#include <linux/io.h>
     11#include <sound/hdaudio.h>
     12#include <sound/hda_i915.h>
     13#include <sound/hda_codec.h>
     14#include <sound/hda_register.h>
     15#include "../sof-priv.h"
     16#include "hda.h"
     17
     18#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC)
     19#include "../../codecs/hdac_hda.h"
     20#define sof_hda_ext_ops	snd_soc_hdac_hda_get_ops()
     21#else
     22#define sof_hda_ext_ops	NULL
     23#endif
     24
     25#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
     26static void update_codec_wake_enable(struct hdac_bus *bus, unsigned int addr, bool link_power)
     27{
     28	unsigned int mask = snd_hdac_chip_readw(bus, WAKEEN);
     29
     30	if (link_power)
     31		mask &= ~BIT(addr);
     32	else
     33		mask |= BIT(addr);
     34
     35	snd_hdac_chip_updatew(bus, WAKEEN, STATESTS_INT_MASK, mask);
     36}
     37
     38static void sof_hda_bus_link_power(struct hdac_device *codec, bool enable)
     39{
     40	struct hdac_bus *bus = codec->bus;
     41	bool oldstate = test_bit(codec->addr, &bus->codec_powered);
     42
     43	snd_hdac_ext_bus_link_power(codec, enable);
     44
     45	if (enable == oldstate)
     46		return;
     47
     48	/*
     49	 * Both codec driver and controller can hold references to
     50	 * display power. To avoid unnecessary power-up/down cycles,
     51	 * controller doesn't immediately release its reference.
     52	 *
     53	 * If the codec driver powers down the link, release
     54	 * the controller reference as well.
     55	 */
     56	if (codec->addr == HDA_IDISP_ADDR && !enable)
     57		snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
     58
     59	/* WAKEEN needs to be set for disabled links */
     60	update_codec_wake_enable(bus, codec->addr, enable);
     61}
     62
     63static const struct hdac_bus_ops bus_core_ops = {
     64	.command = snd_hdac_bus_send_cmd,
     65	.get_response = snd_hdac_bus_get_response,
     66	.link_power = sof_hda_bus_link_power,
     67};
     68#endif
     69
     70/*
     71 * This can be used for both with/without hda link support.
     72 */
     73void sof_hda_bus_init(struct hdac_bus *bus, struct device *dev)
     74{
     75#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
     76	snd_hdac_ext_bus_init(bus, dev, &bus_core_ops, sof_hda_ext_ops);
     77#else /* CONFIG_SND_SOC_SOF_HDA */
     78	memset(bus, 0, sizeof(*bus));
     79	bus->dev = dev;
     80
     81	INIT_LIST_HEAD(&bus->stream_list);
     82
     83	bus->irq = -1;
     84
     85	/*
     86	 * There is only one HDA bus atm. keep the index as 0.
     87	 * Need to fix when there are more than one HDA bus.
     88	 */
     89	bus->idx = 0;
     90
     91	spin_lock_init(&bus->reg_lock);
     92#endif /* CONFIG_SND_SOC_SOF_HDA */
     93}