cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pci-icl.c (3083B)


      1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
      2//
      3// This file is provided under a dual BSD/GPLv2 license.  When using or
      4// redistributing this file, you may do so under either license.
      5//
      6// Copyright(c) 2018-2021 Intel Corporation. All rights reserved.
      7//
      8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
      9//
     10
     11#include <linux/module.h>
     12#include <linux/pci.h>
     13#include <sound/soc-acpi.h>
     14#include <sound/soc-acpi-intel-match.h>
     15#include <sound/sof.h>
     16#include "../ops.h"
     17#include "../sof-pci-dev.h"
     18
     19/* platform specific devices */
     20#include "hda.h"
     21
     22static const struct sof_dev_desc icl_desc = {
     23	.machines               = snd_soc_acpi_intel_icl_machines,
     24	.alt_machines		= snd_soc_acpi_intel_icl_sdw_machines,
     25	.use_acpi_target_states	= true,
     26	.resindex_lpe_base      = 0,
     27	.resindex_pcicfg_base   = -1,
     28	.resindex_imr_base      = -1,
     29	.irqindex_host_ipc      = -1,
     30	.chip_info = &icl_chip_info,
     31	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
     32	.ipc_default		= SOF_IPC,
     33	.default_fw_path = {
     34		[SOF_IPC] = "intel/sof",
     35		[SOF_INTEL_IPC4] = "intel/avs/icl",
     36	},
     37	.default_tplg_path = {
     38		[SOF_IPC] = "intel/sof-tplg",
     39		[SOF_INTEL_IPC4] = "intel/avs-tplg",
     40	},
     41	.default_fw_filename = {
     42		[SOF_IPC] = "sof-icl.ri",
     43		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
     44	},
     45	.nocodec_tplg_filename = "sof-icl-nocodec.tplg",
     46	.ops = &sof_icl_ops,
     47	.ops_init = sof_icl_ops_init,
     48};
     49
     50static const struct sof_dev_desc jsl_desc = {
     51	.machines               = snd_soc_acpi_intel_jsl_machines,
     52	.use_acpi_target_states	= true,
     53	.resindex_lpe_base      = 0,
     54	.resindex_pcicfg_base   = -1,
     55	.resindex_imr_base      = -1,
     56	.irqindex_host_ipc      = -1,
     57	.chip_info = &jsl_chip_info,
     58	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
     59	.ipc_default		= SOF_IPC,
     60	.default_fw_path = {
     61		[SOF_IPC] = "intel/sof",
     62		[SOF_INTEL_IPC4] = "intel/avs/jsl",
     63	},
     64	.default_tplg_path = {
     65		[SOF_IPC] = "intel/sof-tplg",
     66		[SOF_INTEL_IPC4] = "intel/avs-tplg",
     67	},
     68	.default_fw_filename = {
     69		[SOF_IPC] = "sof-jsl.ri",
     70		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
     71	},
     72	.nocodec_tplg_filename = "sof-jsl-nocodec.tplg",
     73	.ops = &sof_cnl_ops,
     74	.ops_init = sof_cnl_ops_init,
     75};
     76
     77/* PCI IDs */
     78static const struct pci_device_id sof_pci_ids[] = {
     79	{ PCI_DEVICE(0x8086, 0x34C8), /* ICL-LP */
     80		.driver_data = (unsigned long)&icl_desc},
     81	{ PCI_DEVICE(0x8086, 0x3dc8), /* ICL-H */
     82		.driver_data = (unsigned long)&icl_desc},
     83	{ PCI_DEVICE(0x8086, 0x38c8), /* ICL-N */
     84		.driver_data = (unsigned long)&jsl_desc},
     85	{ PCI_DEVICE(0x8086, 0x4dc8), /* JSL-N */
     86		.driver_data = (unsigned long)&jsl_desc},
     87	{ 0, }
     88};
     89MODULE_DEVICE_TABLE(pci, sof_pci_ids);
     90
     91/* pci_driver definition */
     92static struct pci_driver snd_sof_pci_intel_icl_driver = {
     93	.name = "sof-audio-pci-intel-icl",
     94	.id_table = sof_pci_ids,
     95	.probe = hda_pci_intel_probe,
     96	.remove = sof_pci_remove,
     97	.shutdown = sof_pci_shutdown,
     98	.driver = {
     99		.pm = &sof_pci_pm,
    100	},
    101};
    102module_pci_driver(snd_sof_pci_intel_icl_driver);
    103
    104MODULE_LICENSE("Dual BSD/GPL");
    105MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);
    106MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);