cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pci-tgl.c (6374B)


      1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
      2//
      3// This file is provided under a dual BSD/GPLv2 license.  When using or
      4// redistributing this file, you may do so under either license.
      5//
      6// Copyright(c) 2018-2021 Intel Corporation. All rights reserved.
      7//
      8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
      9//
     10
     11#include <linux/module.h>
     12#include <linux/pci.h>
     13#include <sound/soc-acpi.h>
     14#include <sound/soc-acpi-intel-match.h>
     15#include <sound/sof.h>
     16#include "../ops.h"
     17#include "../sof-pci-dev.h"
     18
     19/* platform specific devices */
     20#include "hda.h"
     21
     22static const struct sof_dev_desc tgl_desc = {
     23	.machines               = snd_soc_acpi_intel_tgl_machines,
     24	.alt_machines		= snd_soc_acpi_intel_tgl_sdw_machines,
     25	.use_acpi_target_states	= true,
     26	.resindex_lpe_base      = 0,
     27	.resindex_pcicfg_base   = -1,
     28	.resindex_imr_base      = -1,
     29	.irqindex_host_ipc      = -1,
     30	.chip_info = &tgl_chip_info,
     31	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
     32	.ipc_default		= SOF_IPC,
     33	.default_fw_path = {
     34		[SOF_IPC] = "intel/sof",
     35		[SOF_INTEL_IPC4] = "intel/avs/tgl",
     36	},
     37	.default_tplg_path = {
     38		[SOF_IPC] = "intel/sof-tplg",
     39		[SOF_INTEL_IPC4] = "intel/avs-tplg",
     40	},
     41	.default_fw_filename = {
     42		[SOF_IPC] = "sof-tgl.ri",
     43		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
     44	},
     45	.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
     46	.ops = &sof_tgl_ops,
     47	.ops_init = sof_tgl_ops_init,
     48};
     49
     50static const struct sof_dev_desc tglh_desc = {
     51	.machines               = snd_soc_acpi_intel_tgl_machines,
     52	.alt_machines		= snd_soc_acpi_intel_tgl_sdw_machines,
     53	.use_acpi_target_states	= true,
     54	.resindex_lpe_base      = 0,
     55	.resindex_pcicfg_base   = -1,
     56	.resindex_imr_base      = -1,
     57	.irqindex_host_ipc      = -1,
     58	.chip_info = &tglh_chip_info,
     59	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
     60	.ipc_default		= SOF_IPC,
     61	.default_fw_path = {
     62		[SOF_IPC] = "intel/sof",
     63		[SOF_INTEL_IPC4] = "intel/avs/tgl-h",
     64	},
     65	.default_tplg_path = {
     66		[SOF_IPC] = "intel/sof-tplg",
     67		[SOF_INTEL_IPC4] = "intel/avs-tplg",
     68	},
     69	.default_fw_filename = {
     70		[SOF_IPC] = "sof-tgl-h.ri",
     71		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
     72	},
     73	.nocodec_tplg_filename = "sof-tgl-nocodec.tplg",
     74	.ops = &sof_tgl_ops,
     75	.ops_init = sof_tgl_ops_init,
     76};
     77
     78static const struct sof_dev_desc ehl_desc = {
     79	.machines               = snd_soc_acpi_intel_ehl_machines,
     80	.use_acpi_target_states	= true,
     81	.resindex_lpe_base      = 0,
     82	.resindex_pcicfg_base   = -1,
     83	.resindex_imr_base      = -1,
     84	.irqindex_host_ipc      = -1,
     85	.chip_info = &ehl_chip_info,
     86	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
     87	.ipc_default		= SOF_IPC,
     88	.default_fw_path = {
     89		[SOF_IPC] = "intel/sof",
     90		[SOF_INTEL_IPC4] = "intel/avs/ehl",
     91	},
     92	.default_tplg_path = {
     93		[SOF_IPC] = "intel/sof-tplg",
     94		[SOF_INTEL_IPC4] = "intel/avs-tplg",
     95	},
     96	.default_fw_filename = {
     97		[SOF_IPC] = "sof-ehl.ri",
     98		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
     99	},
    100	.nocodec_tplg_filename = "sof-ehl-nocodec.tplg",
    101	.ops = &sof_tgl_ops,
    102	.ops_init = sof_tgl_ops_init,
    103};
    104
    105static const struct sof_dev_desc adls_desc = {
    106	.machines               = snd_soc_acpi_intel_adl_machines,
    107	.alt_machines           = snd_soc_acpi_intel_adl_sdw_machines,
    108	.use_acpi_target_states	= true,
    109	.resindex_lpe_base      = 0,
    110	.resindex_pcicfg_base   = -1,
    111	.resindex_imr_base      = -1,
    112	.irqindex_host_ipc      = -1,
    113	.chip_info = &adls_chip_info,
    114	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
    115	.ipc_default		= SOF_IPC,
    116	.default_fw_path = {
    117		[SOF_IPC] = "intel/sof",
    118		[SOF_INTEL_IPC4] = "intel/avs/adl-s",
    119	},
    120	.default_tplg_path = {
    121		[SOF_IPC] = "intel/sof-tplg",
    122		[SOF_INTEL_IPC4] = "intel/avs-tplg",
    123	},
    124	.default_fw_filename = {
    125		[SOF_IPC] = "sof-adl-s.ri",
    126		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
    127	},
    128	.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
    129	.ops = &sof_tgl_ops,
    130	.ops_init = sof_tgl_ops_init,
    131};
    132
    133static const struct sof_dev_desc adl_desc = {
    134	.machines               = snd_soc_acpi_intel_adl_machines,
    135	.alt_machines           = snd_soc_acpi_intel_adl_sdw_machines,
    136	.use_acpi_target_states = true,
    137	.resindex_lpe_base      = 0,
    138	.resindex_pcicfg_base   = -1,
    139	.resindex_imr_base      = -1,
    140	.irqindex_host_ipc      = -1,
    141	.chip_info = &tgl_chip_info,
    142	.ipc_supported_mask	= BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4),
    143	.ipc_default		= SOF_IPC,
    144	.default_fw_path = {
    145		[SOF_IPC] = "intel/sof",
    146		[SOF_INTEL_IPC4] = "intel/avs/adl",
    147	},
    148	.default_tplg_path = {
    149		[SOF_IPC] = "intel/sof-tplg",
    150		[SOF_INTEL_IPC4] = "intel/avs-tplg",
    151	},
    152	.default_fw_filename = {
    153		[SOF_IPC] = "sof-adl.ri",
    154		[SOF_INTEL_IPC4] = "dsp_basefw.bin",
    155	},
    156	.nocodec_tplg_filename = "sof-adl-nocodec.tplg",
    157	.ops = &sof_tgl_ops,
    158	.ops_init = sof_tgl_ops_init,
    159};
    160
    161/* PCI IDs */
    162static const struct pci_device_id sof_pci_ids[] = {
    163	{ PCI_DEVICE(0x8086, 0xa0c8), /* TGL-LP */
    164		.driver_data = (unsigned long)&tgl_desc},
    165	{ PCI_DEVICE(0x8086, 0x43c8), /* TGL-H */
    166		.driver_data = (unsigned long)&tglh_desc},
    167	{ PCI_DEVICE(0x8086, 0x4b55), /* EHL */
    168		.driver_data = (unsigned long)&ehl_desc},
    169	{ PCI_DEVICE(0x8086, 0x4b58), /* EHL */
    170		.driver_data = (unsigned long)&ehl_desc},
    171	{ PCI_DEVICE(0x8086, 0x7ad0), /* ADL-S */
    172		.driver_data = (unsigned long)&adls_desc},
    173	{ PCI_DEVICE(0x8086, 0x7a50), /* RPL-S */
    174		.driver_data = (unsigned long)&adls_desc},
    175	{ PCI_DEVICE(0x8086, 0x51c8), /* ADL-P */
    176		.driver_data = (unsigned long)&adl_desc},
    177	{ PCI_DEVICE(0x8086, 0x51cd), /* ADL-P */
    178		.driver_data = (unsigned long)&adl_desc},
    179	{ PCI_DEVICE(0x8086, 0x51c9), /* ADL-PS */
    180		.driver_data = (unsigned long)&adl_desc},
    181	{ PCI_DEVICE(0x8086, 0x51ca), /* RPL-P */
    182		.driver_data = (unsigned long)&adl_desc},
    183	{ PCI_DEVICE(0x8086, 0x51cb), /* RPL-P */
    184		.driver_data = (unsigned long)&adl_desc},
    185	{ PCI_DEVICE(0x8086, 0x51cc), /* ADL-M */
    186		.driver_data = (unsigned long)&adl_desc},
    187	{ PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */
    188		.driver_data = (unsigned long)&adl_desc},
    189	{ 0, }
    190};
    191MODULE_DEVICE_TABLE(pci, sof_pci_ids);
    192
    193/* pci_driver definition */
    194static struct pci_driver snd_sof_pci_intel_tgl_driver = {
    195	.name = "sof-audio-pci-intel-tgl",
    196	.id_table = sof_pci_ids,
    197	.probe = hda_pci_intel_probe,
    198	.remove = sof_pci_remove,
    199	.shutdown = sof_pci_shutdown,
    200	.driver = {
    201		.pm = &sof_pci_pm,
    202	},
    203};
    204module_pci_driver(snd_sof_pci_intel_tgl_driver);
    205
    206MODULE_LICENSE("Dual BSD/GPL");
    207MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HDA_COMMON);
    208MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);