cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ptrace.h (11719B)


      1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
      2/*
      3 *  S390 version
      4 *    Copyright IBM Corp. 1999, 2000
      5 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
      6 */
      7
      8#ifndef _UAPI_S390_PTRACE_H
      9#define _UAPI_S390_PTRACE_H
     10
     11/*
     12 * Offsets in the user_regs_struct. They are used for the ptrace
     13 * system call and in entry.S
     14 */
     15#ifndef __s390x__
     16
     17#define PT_PSWMASK  0x00
     18#define PT_PSWADDR  0x04
     19#define PT_GPR0     0x08
     20#define PT_GPR1     0x0C
     21#define PT_GPR2     0x10
     22#define PT_GPR3     0x14
     23#define PT_GPR4     0x18
     24#define PT_GPR5     0x1C
     25#define PT_GPR6     0x20
     26#define PT_GPR7     0x24
     27#define PT_GPR8     0x28
     28#define PT_GPR9     0x2C
     29#define PT_GPR10    0x30
     30#define PT_GPR11    0x34
     31#define PT_GPR12    0x38
     32#define PT_GPR13    0x3C
     33#define PT_GPR14    0x40
     34#define PT_GPR15    0x44
     35#define PT_ACR0     0x48
     36#define PT_ACR1     0x4C
     37#define PT_ACR2     0x50
     38#define PT_ACR3     0x54
     39#define PT_ACR4	    0x58
     40#define PT_ACR5	    0x5C
     41#define PT_ACR6	    0x60
     42#define PT_ACR7	    0x64
     43#define PT_ACR8	    0x68
     44#define PT_ACR9	    0x6C
     45#define PT_ACR10    0x70
     46#define PT_ACR11    0x74
     47#define PT_ACR12    0x78
     48#define PT_ACR13    0x7C
     49#define PT_ACR14    0x80
     50#define PT_ACR15    0x84
     51#define PT_ORIGGPR2 0x88
     52#define PT_FPC	    0x90
     53/*
     54 * A nasty fact of life that the ptrace api
     55 * only supports passing of longs.
     56 */
     57#define PT_FPR0_HI  0x98
     58#define PT_FPR0_LO  0x9C
     59#define PT_FPR1_HI  0xA0
     60#define PT_FPR1_LO  0xA4
     61#define PT_FPR2_HI  0xA8
     62#define PT_FPR2_LO  0xAC
     63#define PT_FPR3_HI  0xB0
     64#define PT_FPR3_LO  0xB4
     65#define PT_FPR4_HI  0xB8
     66#define PT_FPR4_LO  0xBC
     67#define PT_FPR5_HI  0xC0
     68#define PT_FPR5_LO  0xC4
     69#define PT_FPR6_HI  0xC8
     70#define PT_FPR6_LO  0xCC
     71#define PT_FPR7_HI  0xD0
     72#define PT_FPR7_LO  0xD4
     73#define PT_FPR8_HI  0xD8
     74#define PT_FPR8_LO  0XDC
     75#define PT_FPR9_HI  0xE0
     76#define PT_FPR9_LO  0xE4
     77#define PT_FPR10_HI 0xE8
     78#define PT_FPR10_LO 0xEC
     79#define PT_FPR11_HI 0xF0
     80#define PT_FPR11_LO 0xF4
     81#define PT_FPR12_HI 0xF8
     82#define PT_FPR12_LO 0xFC
     83#define PT_FPR13_HI 0x100
     84#define PT_FPR13_LO 0x104
     85#define PT_FPR14_HI 0x108
     86#define PT_FPR14_LO 0x10C
     87#define PT_FPR15_HI 0x110
     88#define PT_FPR15_LO 0x114
     89#define PT_CR_9	    0x118
     90#define PT_CR_10    0x11C
     91#define PT_CR_11    0x120
     92#define PT_IEEE_IP  0x13C
     93#define PT_LASTOFF  PT_IEEE_IP
     94#define PT_ENDREGS  0x140-1
     95
     96#define GPR_SIZE	4
     97#define CR_SIZE		4
     98
     99#define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
    100
    101#else /* __s390x__ */
    102
    103#define PT_PSWMASK  0x00
    104#define PT_PSWADDR  0x08
    105#define PT_GPR0     0x10
    106#define PT_GPR1     0x18
    107#define PT_GPR2     0x20
    108#define PT_GPR3     0x28
    109#define PT_GPR4     0x30
    110#define PT_GPR5     0x38
    111#define PT_GPR6     0x40
    112#define PT_GPR7     0x48
    113#define PT_GPR8     0x50
    114#define PT_GPR9     0x58
    115#define PT_GPR10    0x60
    116#define PT_GPR11    0x68
    117#define PT_GPR12    0x70
    118#define PT_GPR13    0x78
    119#define PT_GPR14    0x80
    120#define PT_GPR15    0x88
    121#define PT_ACR0     0x90
    122#define PT_ACR1     0x94
    123#define PT_ACR2     0x98
    124#define PT_ACR3     0x9C
    125#define PT_ACR4	    0xA0
    126#define PT_ACR5	    0xA4
    127#define PT_ACR6	    0xA8
    128#define PT_ACR7	    0xAC
    129#define PT_ACR8	    0xB0
    130#define PT_ACR9	    0xB4
    131#define PT_ACR10    0xB8
    132#define PT_ACR11    0xBC
    133#define PT_ACR12    0xC0
    134#define PT_ACR13    0xC4
    135#define PT_ACR14    0xC8
    136#define PT_ACR15    0xCC
    137#define PT_ORIGGPR2 0xD0
    138#define PT_FPC	    0xD8
    139#define PT_FPR0     0xE0
    140#define PT_FPR1     0xE8
    141#define PT_FPR2     0xF0
    142#define PT_FPR3     0xF8
    143#define PT_FPR4     0x100
    144#define PT_FPR5     0x108
    145#define PT_FPR6     0x110
    146#define PT_FPR7     0x118
    147#define PT_FPR8     0x120
    148#define PT_FPR9     0x128
    149#define PT_FPR10    0x130
    150#define PT_FPR11    0x138
    151#define PT_FPR12    0x140
    152#define PT_FPR13    0x148
    153#define PT_FPR14    0x150
    154#define PT_FPR15    0x158
    155#define PT_CR_9     0x160
    156#define PT_CR_10    0x168
    157#define PT_CR_11    0x170
    158#define PT_IEEE_IP  0x1A8
    159#define PT_LASTOFF  PT_IEEE_IP
    160#define PT_ENDREGS  0x1B0-1
    161
    162#define GPR_SIZE	8
    163#define CR_SIZE		8
    164
    165#define STACK_FRAME_OVERHEAD	160	 /* size of minimum stack frame */
    166
    167#endif /* __s390x__ */
    168
    169#define NUM_GPRS	16
    170#define NUM_FPRS	16
    171#define NUM_CRS		16
    172#define NUM_ACRS	16
    173
    174#define NUM_CR_WORDS	3
    175
    176#define FPR_SIZE	8
    177#define FPC_SIZE	4
    178#define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
    179#define ACR_SIZE	4
    180
    181
    182#define PTRACE_OLDSETOPTIONS		21
    183#define PTRACE_SYSEMU			31
    184#define PTRACE_SYSEMU_SINGLESTEP	32
    185#ifndef __ASSEMBLY__
    186#include <linux/stddef.h>
    187#include <linux/types.h>
    188
    189typedef union {
    190	float	f;
    191	double	d;
    192	__u64	ui;
    193	struct
    194	{
    195		__u32 hi;
    196		__u32 lo;
    197	} fp;
    198} freg_t;
    199
    200typedef struct {
    201	__u32	fpc;
    202	__u32	pad;
    203	freg_t	fprs[NUM_FPRS];
    204} s390_fp_regs;
    205
    206#define FPC_EXCEPTION_MASK	0xF8000000
    207#define FPC_FLAGS_MASK		0x00F80000
    208#define FPC_DXC_MASK		0x0000FF00
    209#define FPC_RM_MASK		0x00000003
    210
    211/* this typedef defines how a Program Status Word looks like */
    212typedef struct {
    213	unsigned long mask;
    214	unsigned long addr;
    215} __attribute__ ((aligned(8))) psw_t;
    216
    217#ifndef __s390x__
    218
    219#define PSW_MASK_PER		0x40000000UL
    220#define PSW_MASK_DAT		0x04000000UL
    221#define PSW_MASK_IO		0x02000000UL
    222#define PSW_MASK_EXT		0x01000000UL
    223#define PSW_MASK_KEY		0x00F00000UL
    224#define PSW_MASK_BASE		0x00080000UL	/* always one */
    225#define PSW_MASK_MCHECK		0x00040000UL
    226#define PSW_MASK_WAIT		0x00020000UL
    227#define PSW_MASK_PSTATE		0x00010000UL
    228#define PSW_MASK_ASC		0x0000C000UL
    229#define PSW_MASK_CC		0x00003000UL
    230#define PSW_MASK_PM		0x00000F00UL
    231#define PSW_MASK_RI		0x00000000UL
    232#define PSW_MASK_EA		0x00000000UL
    233#define PSW_MASK_BA		0x00000000UL
    234
    235#define PSW_MASK_USER		0x0000FF00UL
    236
    237#define PSW_ADDR_AMODE		0x80000000UL
    238#define PSW_ADDR_INSN		0x7FFFFFFFUL
    239
    240#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 20)
    241
    242#define PSW_ASC_PRIMARY		0x00000000UL
    243#define PSW_ASC_ACCREG		0x00004000UL
    244#define PSW_ASC_SECONDARY	0x00008000UL
    245#define PSW_ASC_HOME		0x0000C000UL
    246
    247#else /* __s390x__ */
    248
    249#define PSW_MASK_PER		0x4000000000000000UL
    250#define PSW_MASK_DAT		0x0400000000000000UL
    251#define PSW_MASK_IO		0x0200000000000000UL
    252#define PSW_MASK_EXT		0x0100000000000000UL
    253#define PSW_MASK_BASE		0x0000000000000000UL
    254#define PSW_MASK_KEY		0x00F0000000000000UL
    255#define PSW_MASK_MCHECK		0x0004000000000000UL
    256#define PSW_MASK_WAIT		0x0002000000000000UL
    257#define PSW_MASK_PSTATE		0x0001000000000000UL
    258#define PSW_MASK_ASC		0x0000C00000000000UL
    259#define PSW_MASK_CC		0x0000300000000000UL
    260#define PSW_MASK_PM		0x00000F0000000000UL
    261#define PSW_MASK_RI		0x0000008000000000UL
    262#define PSW_MASK_EA		0x0000000100000000UL
    263#define PSW_MASK_BA		0x0000000080000000UL
    264
    265#define PSW_MASK_USER		0x0000FF0180000000UL
    266
    267#define PSW_ADDR_AMODE		0x0000000000000000UL
    268#define PSW_ADDR_INSN		0xFFFFFFFFFFFFFFFFUL
    269
    270#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 52)
    271
    272#define PSW_ASC_PRIMARY		0x0000000000000000UL
    273#define PSW_ASC_ACCREG		0x0000400000000000UL
    274#define PSW_ASC_SECONDARY	0x0000800000000000UL
    275#define PSW_ASC_HOME		0x0000C00000000000UL
    276
    277#endif /* __s390x__ */
    278
    279
    280/*
    281 * The s390_regs structure is used to define the elf_gregset_t.
    282 */
    283typedef struct {
    284	psw_t psw;
    285	unsigned long gprs[NUM_GPRS];
    286	unsigned int  acrs[NUM_ACRS];
    287	unsigned long orig_gpr2;
    288} s390_regs;
    289
    290/*
    291 * The user_pt_regs structure exports the beginning of
    292 * the in-kernel pt_regs structure to user space.
    293 */
    294typedef struct {
    295	unsigned long args[1];
    296	psw_t psw;
    297	unsigned long gprs[NUM_GPRS];
    298} user_pt_regs;
    299
    300/*
    301 * Now for the user space program event recording (trace) definitions.
    302 * The following structures are used only for the ptrace interface, don't
    303 * touch or even look at it if you don't want to modify the user-space
    304 * ptrace interface. In particular stay away from it for in-kernel PER.
    305 */
    306typedef struct {
    307	unsigned long cr[NUM_CR_WORDS];
    308} per_cr_words;
    309
    310#define PER_EM_MASK 0xE8000000UL
    311
    312typedef struct {
    313#ifdef __s390x__
    314	unsigned		       : 32;
    315#endif /* __s390x__ */
    316	unsigned em_branching	       : 1;
    317	unsigned em_instruction_fetch  : 1;
    318	/*
    319	 * Switching on storage alteration automatically fixes
    320	 * the storage alteration event bit in the users std.
    321	 */
    322	unsigned em_storage_alteration : 1;
    323	unsigned em_gpr_alt_unused     : 1;
    324	unsigned em_store_real_address : 1;
    325	unsigned		       : 3;
    326	unsigned branch_addr_ctl       : 1;
    327	unsigned		       : 1;
    328	unsigned storage_alt_space_ctl : 1;
    329	unsigned		       : 21;
    330	unsigned long starting_addr;
    331	unsigned long ending_addr;
    332} per_cr_bits;
    333
    334typedef struct {
    335	unsigned short perc_atmid;
    336	unsigned long address;
    337	unsigned char access_id;
    338} per_lowcore_words;
    339
    340typedef struct {
    341	unsigned perc_branching		 : 1;
    342	unsigned perc_instruction_fetch  : 1;
    343	unsigned perc_storage_alteration : 1;
    344	unsigned perc_gpr_alt_unused	 : 1;
    345	unsigned perc_store_real_address : 1;
    346	unsigned			 : 3;
    347	unsigned atmid_psw_bit_31	 : 1;
    348	unsigned atmid_validity_bit	 : 1;
    349	unsigned atmid_psw_bit_32	 : 1;
    350	unsigned atmid_psw_bit_5	 : 1;
    351	unsigned atmid_psw_bit_16	 : 1;
    352	unsigned atmid_psw_bit_17	 : 1;
    353	unsigned si			 : 2;
    354	unsigned long address;
    355	unsigned			 : 4;
    356	unsigned access_id		 : 4;
    357} per_lowcore_bits;
    358
    359typedef struct {
    360	union {
    361		per_cr_words   words;
    362		per_cr_bits    bits;
    363	} control_regs;
    364	/*
    365	 * The single_step and instruction_fetch bits are obsolete,
    366	 * the kernel always sets them to zero. To enable single
    367	 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
    368	 */
    369	unsigned  single_step	    : 1;
    370	unsigned  instruction_fetch : 1;
    371	unsigned		    : 30;
    372	/*
    373	 * These addresses are copied into cr10 & cr11 if single
    374	 * stepping is switched off
    375	 */
    376	unsigned long starting_addr;
    377	unsigned long ending_addr;
    378	union {
    379		per_lowcore_words words;
    380		per_lowcore_bits  bits;
    381	} lowcore;
    382} per_struct;
    383
    384typedef struct {
    385	unsigned int  len;
    386	unsigned long kernel_addr;
    387	unsigned long process_addr;
    388} ptrace_area;
    389
    390/*
    391 * S/390 specific non posix ptrace requests. I chose unusual values so
    392 * they are unlikely to clash with future ptrace definitions.
    393 */
    394#define PTRACE_PEEKUSR_AREA	      0x5000
    395#define PTRACE_POKEUSR_AREA	      0x5001
    396#define PTRACE_PEEKTEXT_AREA	      0x5002
    397#define PTRACE_PEEKDATA_AREA	      0x5003
    398#define PTRACE_POKETEXT_AREA	      0x5004
    399#define PTRACE_POKEDATA_AREA	      0x5005
    400#define PTRACE_GET_LAST_BREAK	      0x5006
    401#define PTRACE_PEEK_SYSTEM_CALL       0x5007
    402#define PTRACE_POKE_SYSTEM_CALL	      0x5008
    403#define PTRACE_ENABLE_TE	      0x5009
    404#define PTRACE_DISABLE_TE	      0x5010
    405#define PTRACE_TE_ABORT_RAND	      0x5011
    406
    407/*
    408 * The numbers chosen here are somewhat arbitrary but absolutely MUST
    409 * not overlap with any of the number assigned in <linux/ptrace.h>.
    410 */
    411#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
    412
    413/*
    414 * PT_PROT definition is loosely based on hppa bsd definition in
    415 * gdb/hppab-nat.c
    416 */
    417#define PTRACE_PROT			  21
    418
    419typedef enum {
    420	ptprot_set_access_watchpoint,
    421	ptprot_set_write_watchpoint,
    422	ptprot_disable_watchpoint
    423} ptprot_flags;
    424
    425typedef struct {
    426	unsigned long lowaddr;
    427	unsigned long hiaddr;
    428	ptprot_flags prot;
    429} ptprot_area;
    430
    431/* Sequence of bytes for breakpoint illegal instruction.  */
    432#define S390_BREAKPOINT     {0x0,0x1}
    433#define S390_BREAKPOINT_U16 ((__u16)0x0001)
    434#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
    435#define S390_SYSCALL_SIZE   2
    436
    437/*
    438 * The user_regs_struct defines the way the user registers are
    439 * store on the stack for signal handling.
    440 */
    441struct user_regs_struct {
    442	psw_t psw;
    443	unsigned long gprs[NUM_GPRS];
    444	unsigned int  acrs[NUM_ACRS];
    445	unsigned long orig_gpr2;
    446	s390_fp_regs fp_regs;
    447	/*
    448	 * These per registers are in here so that gdb can modify them
    449	 * itself as there is no "official" ptrace interface for hardware
    450	 * watchpoints. This is the way intel does it.
    451	 */
    452	per_struct per_info;
    453	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
    454};
    455
    456#endif /* __ASSEMBLY__ */
    457
    458#endif /* _UAPI_S390_PTRACE_H */