cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rmwcc.h (1130B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _TOOLS_LINUX_ASM_X86_RMWcc
      3#define _TOOLS_LINUX_ASM_X86_RMWcc
      4
      5#ifdef CONFIG_CC_HAS_ASM_GOTO
      6
      7#define __GEN_RMWcc(fullop, var, cc, ...)				\
      8do {									\
      9	asm_volatile_goto (fullop "; j" cc " %l[cc_label]"		\
     10			: : "m" (var), ## __VA_ARGS__ 			\
     11			: "memory" : cc_label);				\
     12	return 0;							\
     13cc_label:								\
     14	return 1;							\
     15} while (0)
     16
     17#define GEN_UNARY_RMWcc(op, var, arg0, cc) 				\
     18	__GEN_RMWcc(op " " arg0, var, cc)
     19
     20#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc)			\
     21	__GEN_RMWcc(op " %1, " arg0, var, cc, vcon (val))
     22
     23#else /* !CONFIG_CC_HAS_ASM_GOTO */
     24
     25#define __GEN_RMWcc(fullop, var, cc, ...)				\
     26do {									\
     27	char c;								\
     28	asm volatile (fullop "; set" cc " %1"				\
     29			: "+m" (var), "=qm" (c)				\
     30			: __VA_ARGS__ : "memory");			\
     31	return c != 0;							\
     32} while (0)
     33
     34#define GEN_UNARY_RMWcc(op, var, arg0, cc)				\
     35	__GEN_RMWcc(op " " arg0, var, cc)
     36
     37#define GEN_BINARY_RMWcc(op, var, vcon, val, arg0, cc)			\
     38	__GEN_RMWcc(op " %2, " arg0, var, cc, vcon (val))
     39
     40#endif /* CONFIG_CC_HAS_ASM_GOTO */
     41
     42#endif /* _TOOLS_LINUX_ASM_X86_RMWcc */