cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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arch.h (1096B)


      1/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
      2/*
      3 * Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
      4 */
      5
      6/* Below comes the architecture-specific code. For each architecture, we have
      7 * the syscall declarations and the _start code definition. This is the only
      8 * global part. On all architectures the kernel puts everything in the stack
      9 * before jumping to _start just above us, without any return address (_start
     10 * is not a function but an entry pint). So at the stack pointer we find argc.
     11 * Then argv[] begins, and ends at the first NULL. Then we have envp which
     12 * starts and ends with a NULL as well. So envp=argv+argc+1.
     13 */
     14
     15#ifndef _NOLIBC_ARCH_H
     16#define _NOLIBC_ARCH_H
     17
     18#if defined(__x86_64__)
     19#include "arch-x86_64.h"
     20#elif defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)
     21#include "arch-i386.h"
     22#elif defined(__ARM_EABI__)
     23#include "arch-arm.h"
     24#elif defined(__aarch64__)
     25#include "arch-aarch64.h"
     26#elif defined(__mips__) && defined(_ABIO32)
     27#include "arch-mips.h"
     28#elif defined(__riscv)
     29#include "arch-riscv.h"
     30#endif
     31
     32#endif /* _NOLIBC_ARCH_H */