intel-pt-pkt-decoder-test.c (13747B)
1// SPDX-License-Identifier: GPL-2.0 2 3#include <string.h> 4 5#include "intel-pt-decoder/intel-pt-pkt-decoder.h" 6 7#include "debug.h" 8#include "tests/tests.h" 9#include "arch-tests.h" 10 11/** 12 * struct test_data - Test data. 13 * @len: number of bytes to decode 14 * @bytes: bytes to decode 15 * @ctx: packet context to decode 16 * @packet: expected packet 17 * @new_ctx: expected new packet context 18 * @ctx_unchanged: the packet context must not change 19 */ 20static struct test_data { 21 int len; 22 u8 bytes[INTEL_PT_PKT_MAX_SZ]; 23 enum intel_pt_pkt_ctx ctx; 24 struct intel_pt_pkt packet; 25 enum intel_pt_pkt_ctx new_ctx; 26 int ctx_unchanged; 27} data[] = { 28 /* Padding Packet */ 29 {1, {0}, 0, {INTEL_PT_PAD, 0, 0}, 0, 1 }, 30 /* Short Taken/Not Taken Packet */ 31 {1, {4}, 0, {INTEL_PT_TNT, 1, 0}, 0, 0 }, 32 {1, {6}, 0, {INTEL_PT_TNT, 1, 0x20ULL << 58}, 0, 0 }, 33 {1, {0x80}, 0, {INTEL_PT_TNT, 6, 0}, 0, 0 }, 34 {1, {0xfe}, 0, {INTEL_PT_TNT, 6, 0x3fULL << 58}, 0, 0 }, 35 /* Long Taken/Not Taken Packet */ 36 {8, {0x02, 0xa3, 2}, 0, {INTEL_PT_TNT, 1, 0xa302ULL << 47}, 0, 0 }, 37 {8, {0x02, 0xa3, 3}, 0, {INTEL_PT_TNT, 1, 0x1a302ULL << 47}, 0, 0 }, 38 {8, {0x02, 0xa3, 0, 0, 0, 0, 0, 0x80}, 0, {INTEL_PT_TNT, 47, 0xa302ULL << 1}, 0, 0 }, 39 {8, {0x02, 0xa3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, 0, {INTEL_PT_TNT, 47, 0xffffffffffffa302ULL << 1}, 0, 0 }, 40 /* Target IP Packet */ 41 {1, {0x0d}, 0, {INTEL_PT_TIP, 0, 0}, 0, 0 }, 42 {3, {0x2d, 1, 2}, 0, {INTEL_PT_TIP, 1, 0x201}, 0, 0 }, 43 {5, {0x4d, 1, 2, 3, 4}, 0, {INTEL_PT_TIP, 2, 0x4030201}, 0, 0 }, 44 {7, {0x6d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP, 3, 0x60504030201}, 0, 0 }, 45 {7, {0x8d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP, 4, 0x60504030201}, 0, 0 }, 46 {9, {0xcd, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP, 6, 0x807060504030201}, 0, 0 }, 47 /* Packet Generation Enable */ 48 {1, {0x11}, 0, {INTEL_PT_TIP_PGE, 0, 0}, 0, 0 }, 49 {3, {0x31, 1, 2}, 0, {INTEL_PT_TIP_PGE, 1, 0x201}, 0, 0 }, 50 {5, {0x51, 1, 2, 3, 4}, 0, {INTEL_PT_TIP_PGE, 2, 0x4030201}, 0, 0 }, 51 {7, {0x71, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGE, 3, 0x60504030201}, 0, 0 }, 52 {7, {0x91, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGE, 4, 0x60504030201}, 0, 0 }, 53 {9, {0xd1, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP_PGE, 6, 0x807060504030201}, 0, 0 }, 54 /* Packet Generation Disable */ 55 {1, {0x01}, 0, {INTEL_PT_TIP_PGD, 0, 0}, 0, 0 }, 56 {3, {0x21, 1, 2}, 0, {INTEL_PT_TIP_PGD, 1, 0x201}, 0, 0 }, 57 {5, {0x41, 1, 2, 3, 4}, 0, {INTEL_PT_TIP_PGD, 2, 0x4030201}, 0, 0 }, 58 {7, {0x61, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGD, 3, 0x60504030201}, 0, 0 }, 59 {7, {0x81, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_TIP_PGD, 4, 0x60504030201}, 0, 0 }, 60 {9, {0xc1, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_TIP_PGD, 6, 0x807060504030201}, 0, 0 }, 61 /* Flow Update Packet */ 62 {1, {0x1d}, 0, {INTEL_PT_FUP, 0, 0}, 0, 0 }, 63 {3, {0x3d, 1, 2}, 0, {INTEL_PT_FUP, 1, 0x201}, 0, 0 }, 64 {5, {0x5d, 1, 2, 3, 4}, 0, {INTEL_PT_FUP, 2, 0x4030201}, 0, 0 }, 65 {7, {0x7d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_FUP, 3, 0x60504030201}, 0, 0 }, 66 {7, {0x9d, 1, 2, 3, 4, 5, 6}, 0, {INTEL_PT_FUP, 4, 0x60504030201}, 0, 0 }, 67 {9, {0xdd, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_FUP, 6, 0x807060504030201}, 0, 0 }, 68 /* Paging Information Packet */ 69 {8, {0x02, 0x43, 2, 4, 6, 8, 10, 12}, 0, {INTEL_PT_PIP, 0, 0xC0A08060402}, 0, 0 }, 70 {8, {0x02, 0x43, 3, 4, 6, 8, 10, 12}, 0, {INTEL_PT_PIP, 0, 0xC0A08060403}, 0, 0 }, 71 /* Mode Exec Packet */ 72 {2, {0x99, 0x00}, 0, {INTEL_PT_MODE_EXEC, 0, 16}, 0, 0 }, 73 {2, {0x99, 0x01}, 0, {INTEL_PT_MODE_EXEC, 1, 64}, 0, 0 }, 74 {2, {0x99, 0x02}, 0, {INTEL_PT_MODE_EXEC, 2, 32}, 0, 0 }, 75 {2, {0x99, 0x04}, 0, {INTEL_PT_MODE_EXEC, 4, 16}, 0, 0 }, 76 {2, {0x99, 0x05}, 0, {INTEL_PT_MODE_EXEC, 5, 64}, 0, 0 }, 77 {2, {0x99, 0x06}, 0, {INTEL_PT_MODE_EXEC, 6, 32}, 0, 0 }, 78 /* Mode TSX Packet */ 79 {2, {0x99, 0x20}, 0, {INTEL_PT_MODE_TSX, 0, 0}, 0, 0 }, 80 {2, {0x99, 0x21}, 0, {INTEL_PT_MODE_TSX, 0, 1}, 0, 0 }, 81 {2, {0x99, 0x22}, 0, {INTEL_PT_MODE_TSX, 0, 2}, 0, 0 }, 82 /* Trace Stop Packet */ 83 {2, {0x02, 0x83}, 0, {INTEL_PT_TRACESTOP, 0, 0}, 0, 0 }, 84 /* Core:Bus Ratio Packet */ 85 {4, {0x02, 0x03, 0x12, 0}, 0, {INTEL_PT_CBR, 0, 0x12}, 0, 1 }, 86 /* Timestamp Counter Packet */ 87 {8, {0x19, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_TSC, 0, 0x7060504030201}, 0, 1 }, 88 /* Mini Time Counter Packet */ 89 {2, {0x59, 0x12}, 0, {INTEL_PT_MTC, 0, 0x12}, 0, 1 }, 90 /* TSC / MTC Alignment Packet */ 91 {7, {0x02, 0x73}, 0, {INTEL_PT_TMA, 0, 0}, 0, 1 }, 92 {7, {0x02, 0x73, 1, 2}, 0, {INTEL_PT_TMA, 0, 0x201}, 0, 1 }, 93 {7, {0x02, 0x73, 0, 0, 0, 0xff, 1}, 0, {INTEL_PT_TMA, 0x1ff, 0}, 0, 1 }, 94 {7, {0x02, 0x73, 0x80, 0xc0, 0, 0xff, 1}, 0, {INTEL_PT_TMA, 0x1ff, 0xc080}, 0, 1 }, 95 /* Cycle Count Packet */ 96 {1, {0x03}, 0, {INTEL_PT_CYC, 0, 0}, 0, 1 }, 97 {1, {0x0b}, 0, {INTEL_PT_CYC, 0, 1}, 0, 1 }, 98 {1, {0xfb}, 0, {INTEL_PT_CYC, 0, 0x1f}, 0, 1 }, 99 {2, {0x07, 2}, 0, {INTEL_PT_CYC, 0, 0x20}, 0, 1 }, 100 {2, {0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0xfff}, 0, 1 }, 101 {3, {0x07, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x1000}, 0, 1 }, 102 {3, {0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x7ffff}, 0, 1 }, 103 {4, {0x07, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x80000}, 0, 1 }, 104 {4, {0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x3ffffff}, 0, 1 }, 105 {5, {0x07, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x4000000}, 0, 1 }, 106 {5, {0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x1ffffffff}, 0, 1 }, 107 {6, {0x07, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x200000000}, 0, 1 }, 108 {6, {0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0xffffffffff}, 0, 1 }, 109 {7, {0x07, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x10000000000}, 0, 1 }, 110 {7, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x7fffffffffff}, 0, 1 }, 111 {8, {0x07, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x800000000000}, 0, 1 }, 112 {8, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x3fffffffffffff}, 0, 1 }, 113 {9, {0x07, 1, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x40000000000000}, 0, 1 }, 114 {9, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe}, 0, {INTEL_PT_CYC, 0, 0x1fffffffffffffff}, 0, 1 }, 115 {10, {0x07, 1, 1, 1, 1, 1, 1, 1, 1, 2}, 0, {INTEL_PT_CYC, 0, 0x2000000000000000}, 0, 1 }, 116 {10, {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe}, 0, {INTEL_PT_CYC, 0, 0xffffffffffffffff}, 0, 1 }, 117 /* Virtual-Machine Control Structure Packet */ 118 {7, {0x02, 0xc8, 1, 2, 3, 4, 5}, 0, {INTEL_PT_VMCS, 5, 0x504030201}, 0, 0 }, 119 /* Overflow Packet */ 120 {2, {0x02, 0xf3}, 0, {INTEL_PT_OVF, 0, 0}, 0, 0 }, 121 {2, {0x02, 0xf3}, INTEL_PT_BLK_4_CTX, {INTEL_PT_OVF, 0, 0}, 0, 0 }, 122 {2, {0x02, 0xf3}, INTEL_PT_BLK_8_CTX, {INTEL_PT_OVF, 0, 0}, 0, 0 }, 123 /* Packet Stream Boundary*/ 124 {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, 0, {INTEL_PT_PSB, 0, 0}, 0, 0 }, 125 {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, INTEL_PT_BLK_4_CTX, {INTEL_PT_PSB, 0, 0}, 0, 0 }, 126 {16, {0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82, 0x02, 0x82}, INTEL_PT_BLK_8_CTX, {INTEL_PT_PSB, 0, 0}, 0, 0 }, 127 /* PSB End Packet */ 128 {2, {0x02, 0x23}, 0, {INTEL_PT_PSBEND, 0, 0}, 0, 0 }, 129 /* Maintenance Packet */ 130 {11, {0x02, 0xc3, 0x88, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_MNT, 0, 0x7060504030201}, 0, 1 }, 131 /* Write Data to PT Packet */ 132 {6, {0x02, 0x12, 1, 2, 3, 4}, 0, {INTEL_PT_PTWRITE, 0, 0x4030201}, 0, 0 }, 133 {10, {0x02, 0x32, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_PTWRITE, 1, 0x807060504030201}, 0, 0 }, 134 {6, {0x02, 0x92, 1, 2, 3, 4}, 0, {INTEL_PT_PTWRITE_IP, 0, 0x4030201}, 0, 0 }, 135 {10, {0x02, 0xb2, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_PTWRITE_IP, 1, 0x807060504030201}, 0, 0 }, 136 /* Execution Stop Packet */ 137 {2, {0x02, 0x62}, 0, {INTEL_PT_EXSTOP, 0, 0}, 0, 1 }, 138 {2, {0x02, 0xe2}, 0, {INTEL_PT_EXSTOP_IP, 0, 0}, 0, 1 }, 139 /* Monitor Wait Packet */ 140 {10, {0x02, 0xc2}, 0, {INTEL_PT_MWAIT, 0, 0}, 0, 0 }, 141 {10, {0x02, 0xc2, 1, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_MWAIT, 0, 0x807060504030201}, 0, 0 }, 142 {10, {0x02, 0xc2, 0xff, 2, 3, 4, 7, 6, 7, 8}, 0, {INTEL_PT_MWAIT, 0, 0x8070607040302ff}, 0, 0 }, 143 /* Power Entry Packet */ 144 {4, {0x02, 0x22}, 0, {INTEL_PT_PWRE, 0, 0}, 0, 1 }, 145 {4, {0x02, 0x22, 1, 2}, 0, {INTEL_PT_PWRE, 0, 0x0201}, 0, 1 }, 146 {4, {0x02, 0x22, 0x80, 0x34}, 0, {INTEL_PT_PWRE, 0, 0x3480}, 0, 1 }, 147 {4, {0x02, 0x22, 0x00, 0x56}, 0, {INTEL_PT_PWRE, 0, 0x5600}, 0, 1 }, 148 /* Power Exit Packet */ 149 {7, {0x02, 0xa2}, 0, {INTEL_PT_PWRX, 0, 0}, 0, 1 }, 150 {7, {0x02, 0xa2, 1, 2, 3, 4, 5}, 0, {INTEL_PT_PWRX, 0, 0x504030201}, 0, 1 }, 151 {7, {0x02, 0xa2, 0xff, 0xff, 0xff, 0xff, 0xff}, 0, {INTEL_PT_PWRX, 0, 0xffffffffff}, 0, 1 }, 152 /* Block Begin Packet */ 153 {3, {0x02, 0x63, 0x00}, 0, {INTEL_PT_BBP, 0, 0}, INTEL_PT_BLK_8_CTX, 0 }, 154 {3, {0x02, 0x63, 0x80}, 0, {INTEL_PT_BBP, 1, 0}, INTEL_PT_BLK_4_CTX, 0 }, 155 {3, {0x02, 0x63, 0x1f}, 0, {INTEL_PT_BBP, 0, 0x1f}, INTEL_PT_BLK_8_CTX, 0 }, 156 {3, {0x02, 0x63, 0x9f}, 0, {INTEL_PT_BBP, 1, 0x1f}, INTEL_PT_BLK_4_CTX, 0 }, 157 /* 4-byte Block Item Packet */ 158 {5, {0x04}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0, 0}, INTEL_PT_BLK_4_CTX, 0 }, 159 {5, {0xfc}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0x1f, 0}, INTEL_PT_BLK_4_CTX, 0 }, 160 {5, {0x04, 1, 2, 3, 4}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0, 0x04030201}, INTEL_PT_BLK_4_CTX, 0 }, 161 {5, {0xfc, 1, 2, 3, 4}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BIP, 0x1f, 0x04030201}, INTEL_PT_BLK_4_CTX, 0 }, 162 /* 8-byte Block Item Packet */ 163 {9, {0x04}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0, 0}, INTEL_PT_BLK_8_CTX, 0 }, 164 {9, {0xfc}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0x1f, 0}, INTEL_PT_BLK_8_CTX, 0 }, 165 {9, {0x04, 1, 2, 3, 4, 5, 6, 7, 8}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0, 0x0807060504030201}, INTEL_PT_BLK_8_CTX, 0 }, 166 {9, {0xfc, 1, 2, 3, 4, 5, 6, 7, 8}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BIP, 0x1f, 0x0807060504030201}, INTEL_PT_BLK_8_CTX, 0 }, 167 /* Block End Packet */ 168 {2, {0x02, 0x33}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BEP, 0, 0}, 0, 0 }, 169 {2, {0x02, 0xb3}, INTEL_PT_BLK_4_CTX, {INTEL_PT_BEP_IP, 0, 0}, 0, 0 }, 170 {2, {0x02, 0x33}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BEP, 0, 0}, 0, 0 }, 171 {2, {0x02, 0xb3}, INTEL_PT_BLK_8_CTX, {INTEL_PT_BEP_IP, 0, 0}, 0, 0 }, 172 /* Control Flow Event Packet */ 173 {4, {0x02, 0x13, 0x01, 0x03}, 0, {INTEL_PT_CFE, 1, 3}, 0, 0 }, 174 {4, {0x02, 0x13, 0x81, 0x03}, 0, {INTEL_PT_CFE_IP, 1, 3}, 0, 0 }, 175 {4, {0x02, 0x13, 0x1f, 0x00}, 0, {INTEL_PT_CFE, 0x1f, 0}, 0, 0 }, 176 {4, {0x02, 0x13, 0x9f, 0xff}, 0, {INTEL_PT_CFE_IP, 0x1f, 0xff}, 0, 0 }, 177 /* */ 178 {11, {0x02, 0x53, 0x09, 1, 2, 3, 4, 5, 6, 7}, 0, {INTEL_PT_EVD, 0x09, 0x7060504030201}, 0, 0 }, 179 {11, {0x02, 0x53, 0x3f, 2, 3, 4, 5, 6, 7, 8}, 0, {INTEL_PT_EVD, 0x3f, 0x8070605040302}, 0, 0 }, 180 /* Terminator */ 181 {0, {0}, 0, {0, 0, 0}, 0, 0 }, 182}; 183 184static int dump_packet(struct intel_pt_pkt *packet, u8 *bytes, int len) 185{ 186 char desc[INTEL_PT_PKT_DESC_MAX]; 187 int ret, i; 188 189 for (i = 0; i < len; i++) 190 pr_debug(" %02x", bytes[i]); 191 for (; i < INTEL_PT_PKT_MAX_SZ; i++) 192 pr_debug(" "); 193 pr_debug(" "); 194 ret = intel_pt_pkt_desc(packet, desc, INTEL_PT_PKT_DESC_MAX); 195 if (ret < 0) { 196 pr_debug("intel_pt_pkt_desc failed!\n"); 197 return TEST_FAIL; 198 } 199 pr_debug("%s\n", desc); 200 201 return TEST_OK; 202} 203 204static void decoding_failed(struct test_data *d) 205{ 206 pr_debug("Decoding failed!\n"); 207 pr_debug("Decoding: "); 208 dump_packet(&d->packet, d->bytes, d->len); 209} 210 211static int fail(struct test_data *d, struct intel_pt_pkt *packet, int len, 212 enum intel_pt_pkt_ctx new_ctx) 213{ 214 decoding_failed(d); 215 216 if (len != d->len) 217 pr_debug("Expected length: %d Decoded length %d\n", 218 d->len, len); 219 220 if (packet->type != d->packet.type) 221 pr_debug("Expected type: %d Decoded type %d\n", 222 d->packet.type, packet->type); 223 224 if (packet->count != d->packet.count) 225 pr_debug("Expected count: %d Decoded count %d\n", 226 d->packet.count, packet->count); 227 228 if (packet->payload != d->packet.payload) 229 pr_debug("Expected payload: 0x%llx Decoded payload 0x%llx\n", 230 (unsigned long long)d->packet.payload, 231 (unsigned long long)packet->payload); 232 233 if (new_ctx != d->new_ctx) 234 pr_debug("Expected packet context: %d Decoded packet context %d\n", 235 d->new_ctx, new_ctx); 236 237 return TEST_FAIL; 238} 239 240static int test_ctx_unchanged(struct test_data *d, struct intel_pt_pkt *packet, 241 enum intel_pt_pkt_ctx ctx) 242{ 243 enum intel_pt_pkt_ctx old_ctx = ctx; 244 245 intel_pt_upd_pkt_ctx(packet, &ctx); 246 247 if (ctx != old_ctx) { 248 decoding_failed(d); 249 pr_debug("Packet context changed!\n"); 250 return TEST_FAIL; 251 } 252 253 return TEST_OK; 254} 255 256static int test_one(struct test_data *d) 257{ 258 struct intel_pt_pkt packet; 259 enum intel_pt_pkt_ctx ctx = d->ctx; 260 int ret; 261 262 memset(&packet, 0xff, sizeof(packet)); 263 264 /* Decode a packet */ 265 ret = intel_pt_get_packet(d->bytes, d->len, &packet, &ctx); 266 if (ret < 0 || ret > INTEL_PT_PKT_MAX_SZ) { 267 decoding_failed(d); 268 pr_debug("intel_pt_get_packet returned %d\n", ret); 269 return TEST_FAIL; 270 } 271 272 /* Some packets must always leave the packet context unchanged */ 273 if (d->ctx_unchanged) { 274 int err; 275 276 err = test_ctx_unchanged(d, &packet, INTEL_PT_NO_CTX); 277 if (err) 278 return err; 279 err = test_ctx_unchanged(d, &packet, INTEL_PT_BLK_4_CTX); 280 if (err) 281 return err; 282 err = test_ctx_unchanged(d, &packet, INTEL_PT_BLK_8_CTX); 283 if (err) 284 return err; 285 } 286 287 /* Compare to the expected values */ 288 if (ret != d->len || packet.type != d->packet.type || 289 packet.count != d->packet.count || 290 packet.payload != d->packet.payload || ctx != d->new_ctx) 291 return fail(d, &packet, ret, ctx); 292 293 pr_debug("Decoded ok:"); 294 ret = dump_packet(&d->packet, d->bytes, d->len); 295 296 return ret; 297} 298 299/* 300 * This test feeds byte sequences to the Intel PT packet decoder and checks the 301 * results. Changes to the packet context are also checked. 302 */ 303int test__intel_pt_pkt_decoder(struct test_suite *test __maybe_unused, int subtest __maybe_unused) 304{ 305 struct test_data *d = data; 306 int ret; 307 308 for (d = data; d->len; d++) { 309 ret = test_one(d); 310 if (ret) 311 return ret; 312 } 313 314 return TEST_OK; 315}