cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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perf_regs.c (8260B)


      1// SPDX-License-Identifier: GPL-2.0
      2#include <errno.h>
      3#include <string.h>
      4#include <regex.h>
      5#include <linux/kernel.h>
      6#include <linux/zalloc.h>
      7
      8#include "../../../perf-sys.h"
      9#include "../../../util/perf_regs.h"
     10#include "../../../util/debug.h"
     11#include "../../../util/event.h"
     12#include "../../../util/pmu.h"
     13#include "../../../util/pmu-hybrid.h"
     14
     15const struct sample_reg sample_reg_masks[] = {
     16	SMPL_REG(AX, PERF_REG_X86_AX),
     17	SMPL_REG(BX, PERF_REG_X86_BX),
     18	SMPL_REG(CX, PERF_REG_X86_CX),
     19	SMPL_REG(DX, PERF_REG_X86_DX),
     20	SMPL_REG(SI, PERF_REG_X86_SI),
     21	SMPL_REG(DI, PERF_REG_X86_DI),
     22	SMPL_REG(BP, PERF_REG_X86_BP),
     23	SMPL_REG(SP, PERF_REG_X86_SP),
     24	SMPL_REG(IP, PERF_REG_X86_IP),
     25	SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
     26	SMPL_REG(CS, PERF_REG_X86_CS),
     27	SMPL_REG(SS, PERF_REG_X86_SS),
     28#ifdef HAVE_ARCH_X86_64_SUPPORT
     29	SMPL_REG(R8, PERF_REG_X86_R8),
     30	SMPL_REG(R9, PERF_REG_X86_R9),
     31	SMPL_REG(R10, PERF_REG_X86_R10),
     32	SMPL_REG(R11, PERF_REG_X86_R11),
     33	SMPL_REG(R12, PERF_REG_X86_R12),
     34	SMPL_REG(R13, PERF_REG_X86_R13),
     35	SMPL_REG(R14, PERF_REG_X86_R14),
     36	SMPL_REG(R15, PERF_REG_X86_R15),
     37#endif
     38	SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
     39	SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
     40	SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
     41	SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
     42	SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
     43	SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
     44	SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
     45	SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
     46	SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
     47	SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
     48	SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
     49	SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
     50	SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
     51	SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
     52	SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
     53	SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
     54	SMPL_REG_END
     55};
     56
     57struct sdt_name_reg {
     58	const char *sdt_name;
     59	const char *uprobe_name;
     60};
     61#define SDT_NAME_REG(n, m) {.sdt_name = "%" #n, .uprobe_name = "%" #m}
     62#define SDT_NAME_REG_END {.sdt_name = NULL, .uprobe_name = NULL}
     63
     64static const struct sdt_name_reg sdt_reg_tbl[] = {
     65	SDT_NAME_REG(eax, ax),
     66	SDT_NAME_REG(rax, ax),
     67	SDT_NAME_REG(al,  ax),
     68	SDT_NAME_REG(ah,  ax),
     69	SDT_NAME_REG(ebx, bx),
     70	SDT_NAME_REG(rbx, bx),
     71	SDT_NAME_REG(bl,  bx),
     72	SDT_NAME_REG(bh,  bx),
     73	SDT_NAME_REG(ecx, cx),
     74	SDT_NAME_REG(rcx, cx),
     75	SDT_NAME_REG(cl,  cx),
     76	SDT_NAME_REG(ch,  cx),
     77	SDT_NAME_REG(edx, dx),
     78	SDT_NAME_REG(rdx, dx),
     79	SDT_NAME_REG(dl,  dx),
     80	SDT_NAME_REG(dh,  dx),
     81	SDT_NAME_REG(esi, si),
     82	SDT_NAME_REG(rsi, si),
     83	SDT_NAME_REG(sil, si),
     84	SDT_NAME_REG(edi, di),
     85	SDT_NAME_REG(rdi, di),
     86	SDT_NAME_REG(dil, di),
     87	SDT_NAME_REG(ebp, bp),
     88	SDT_NAME_REG(rbp, bp),
     89	SDT_NAME_REG(bpl, bp),
     90	SDT_NAME_REG(rsp, sp),
     91	SDT_NAME_REG(esp, sp),
     92	SDT_NAME_REG(spl, sp),
     93
     94	/* rNN registers */
     95	SDT_NAME_REG(r8b,  r8),
     96	SDT_NAME_REG(r8w,  r8),
     97	SDT_NAME_REG(r8d,  r8),
     98	SDT_NAME_REG(r9b,  r9),
     99	SDT_NAME_REG(r9w,  r9),
    100	SDT_NAME_REG(r9d,  r9),
    101	SDT_NAME_REG(r10b, r10),
    102	SDT_NAME_REG(r10w, r10),
    103	SDT_NAME_REG(r10d, r10),
    104	SDT_NAME_REG(r11b, r11),
    105	SDT_NAME_REG(r11w, r11),
    106	SDT_NAME_REG(r11d, r11),
    107	SDT_NAME_REG(r12b, r12),
    108	SDT_NAME_REG(r12w, r12),
    109	SDT_NAME_REG(r12d, r12),
    110	SDT_NAME_REG(r13b, r13),
    111	SDT_NAME_REG(r13w, r13),
    112	SDT_NAME_REG(r13d, r13),
    113	SDT_NAME_REG(r14b, r14),
    114	SDT_NAME_REG(r14w, r14),
    115	SDT_NAME_REG(r14d, r14),
    116	SDT_NAME_REG(r15b, r15),
    117	SDT_NAME_REG(r15w, r15),
    118	SDT_NAME_REG(r15d, r15),
    119	SDT_NAME_REG_END,
    120};
    121
    122/*
    123 * Perf only supports OP which is in  +/-NUM(REG)  form.
    124 * Here plus-minus sign, NUM and parenthesis are optional,
    125 * only REG is mandatory.
    126 *
    127 * SDT events also supports indirect addressing mode with a
    128 * symbol as offset, scaled mode and constants in OP. But
    129 * perf does not support them yet. Below are few examples.
    130 *
    131 * OP with scaled mode:
    132 *     (%rax,%rsi,8)
    133 *     10(%ras,%rsi,8)
    134 *
    135 * OP with indirect addressing mode:
    136 *     check_action(%rip)
    137 *     mp_+52(%rip)
    138 *     44+mp_(%rip)
    139 *
    140 * OP with constant values:
    141 *     $0
    142 *     $123
    143 *     $-1
    144 */
    145#define SDT_OP_REGEX  "^([+\\-]?)([0-9]*)(\\(?)(%[a-z][a-z0-9]+)(\\)?)$"
    146
    147static regex_t sdt_op_regex;
    148
    149static int sdt_init_op_regex(void)
    150{
    151	static int initialized;
    152	int ret = 0;
    153
    154	if (initialized)
    155		return 0;
    156
    157	ret = regcomp(&sdt_op_regex, SDT_OP_REGEX, REG_EXTENDED);
    158	if (ret < 0) {
    159		pr_debug4("Regex compilation error.\n");
    160		return ret;
    161	}
    162
    163	initialized = 1;
    164	return 0;
    165}
    166
    167/*
    168 * Max x86 register name length is 5(ex: %r15d). So, 6th char
    169 * should always contain NULL. This helps to find register name
    170 * length using strlen, instead of maintaining one more variable.
    171 */
    172#define SDT_REG_NAME_SIZE  6
    173
    174/*
    175 * The uprobe parser does not support all gas register names;
    176 * so, we have to replace them (ex. for x86_64: %rax -> %ax).
    177 * Note: If register does not require renaming, just copy
    178 * paste as it is, but don't leave it empty.
    179 */
    180static void sdt_rename_register(char *sdt_reg, int sdt_len, char *uprobe_reg)
    181{
    182	int i = 0;
    183
    184	for (i = 0; sdt_reg_tbl[i].sdt_name != NULL; i++) {
    185		if (!strncmp(sdt_reg_tbl[i].sdt_name, sdt_reg, sdt_len)) {
    186			strcpy(uprobe_reg, sdt_reg_tbl[i].uprobe_name);
    187			return;
    188		}
    189	}
    190
    191	strncpy(uprobe_reg, sdt_reg, sdt_len);
    192}
    193
    194int arch_sdt_arg_parse_op(char *old_op, char **new_op)
    195{
    196	char new_reg[SDT_REG_NAME_SIZE] = {0};
    197	int new_len = 0, ret;
    198	/*
    199	 * rm[0]:  +/-NUM(REG)
    200	 * rm[1]:  +/-
    201	 * rm[2]:  NUM
    202	 * rm[3]:  (
    203	 * rm[4]:  REG
    204	 * rm[5]:  )
    205	 */
    206	regmatch_t rm[6];
    207	/*
    208	 * Max prefix length is 2 as it may contains sign(+/-)
    209	 * and displacement 0 (Both sign and displacement 0 are
    210	 * optional so it may be empty). Use one more character
    211	 * to hold last NULL so that strlen can be used to find
    212	 * prefix length, instead of maintaining one more variable.
    213	 */
    214	char prefix[3] = {0};
    215
    216	ret = sdt_init_op_regex();
    217	if (ret < 0)
    218		return ret;
    219
    220	/*
    221	 * If unsupported OR does not match with regex OR
    222	 * register name too long, skip it.
    223	 */
    224	if (strchr(old_op, ',') || strchr(old_op, '$') ||
    225	    regexec(&sdt_op_regex, old_op, 6, rm, 0)   ||
    226	    rm[4].rm_eo - rm[4].rm_so > SDT_REG_NAME_SIZE) {
    227		pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
    228		return SDT_ARG_SKIP;
    229	}
    230
    231	/*
    232	 * Prepare prefix.
    233	 * If SDT OP has parenthesis but does not provide
    234	 * displacement, add 0 for displacement.
    235	 *     SDT         Uprobe     Prefix
    236	 *     -----------------------------
    237	 *     +24(%rdi)   +24(%di)   +
    238	 *     24(%rdi)    +24(%di)   +
    239	 *     %rdi        %di
    240	 *     (%rdi)      +0(%di)    +0
    241	 *     -80(%rbx)   -80(%bx)   -
    242	 */
    243	if (rm[3].rm_so != rm[3].rm_eo) {
    244		if (rm[1].rm_so != rm[1].rm_eo)
    245			prefix[0] = *(old_op + rm[1].rm_so);
    246		else if (rm[2].rm_so != rm[2].rm_eo)
    247			prefix[0] = '+';
    248		else
    249			scnprintf(prefix, sizeof(prefix), "+0");
    250	}
    251
    252	/* Rename register */
    253	sdt_rename_register(old_op + rm[4].rm_so, rm[4].rm_eo - rm[4].rm_so,
    254			    new_reg);
    255
    256	/* Prepare final OP which should be valid for uprobe_events */
    257	new_len = strlen(prefix)              +
    258		  (rm[2].rm_eo - rm[2].rm_so) +
    259		  (rm[3].rm_eo - rm[3].rm_so) +
    260		  strlen(new_reg)             +
    261		  (rm[5].rm_eo - rm[5].rm_so) +
    262		  1;					/* NULL */
    263
    264	*new_op = zalloc(new_len);
    265	if (!*new_op)
    266		return -ENOMEM;
    267
    268	scnprintf(*new_op, new_len, "%.*s%.*s%.*s%.*s%.*s",
    269		  strlen(prefix), prefix,
    270		  (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
    271		  (int)(rm[3].rm_eo - rm[3].rm_so), old_op + rm[3].rm_so,
    272		  strlen(new_reg), new_reg,
    273		  (int)(rm[5].rm_eo - rm[5].rm_so), old_op + rm[5].rm_so);
    274
    275	return SDT_ARG_VALID;
    276}
    277
    278uint64_t arch__intr_reg_mask(void)
    279{
    280	struct perf_event_attr attr = {
    281		.type			= PERF_TYPE_HARDWARE,
    282		.config			= PERF_COUNT_HW_CPU_CYCLES,
    283		.sample_type		= PERF_SAMPLE_REGS_INTR,
    284		.sample_regs_intr	= PERF_REG_EXTENDED_MASK,
    285		.precise_ip		= 1,
    286		.disabled 		= 1,
    287		.exclude_kernel		= 1,
    288	};
    289	struct perf_pmu *pmu;
    290	int fd;
    291	/*
    292	 * In an unnamed union, init it here to build on older gcc versions
    293	 */
    294	attr.sample_period = 1;
    295
    296	if (perf_pmu__has_hybrid()) {
    297		/*
    298		 * The same register set is supported among different hybrid PMUs.
    299		 * Only check the first available one.
    300		 */
    301		pmu = list_first_entry(&perf_pmu__hybrid_pmus, typeof(*pmu), hybrid_list);
    302		attr.config |= (__u64)pmu->type << PERF_PMU_TYPE_SHIFT;
    303	}
    304
    305	event_attr_init(&attr);
    306
    307	fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
    308	if (fd != -1) {
    309		close(fd);
    310		return (PERF_REG_EXTENDED_MASK | PERF_REGS_MASK);
    311	}
    312
    313	return PERF_REGS_MASK;
    314}