cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ifu.json (5483B)


      1[
      2    {
      3        "PublicDescription": "I-Cache miss on an access from the prefetch block",
      4        "EventCode": "0xD0",
      5        "EventName": "IFU_IC_MISS_WAIT",
      6        "BriefDescription": "I-Cache miss on an access from the prefetch block"
      7    },
      8    {
      9        "PublicDescription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss",
     10        "EventCode": "0xD1",
     11        "EventName": "IFU_IUTLB_MISS_WAIT",
     12        "BriefDescription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss"
     13    },
     14    {
     15        "PublicDescription": "Micro-predictor conditional/direction mispredict, with respect to. if3/if4 predictor",
     16        "EventCode": "0xD2",
     17        "EventName": "IFU_MICRO_COND_MISPRED",
     18        "BriefDescription": "Micro-predictor conditional/direction mispredict, with respect to. if3/if4 predictor"
     19    },
     20    {
     21        "PublicDescription": "Micro-predictor address mispredict, with respect to if3/if4 predictor",
     22        "EventCode": "0xD3",
     23        "EventName": "IFU_MICRO_CADDR_MISPRED",
     24        "BriefDescription": "Micro-predictor address mispredict, with respect to if3/if4 predictor"
     25    },
     26    {
     27        "PublicDescription": "Micro-predictor hit with immediate redirect",
     28        "EventCode": "0xD4",
     29        "EventName": "IFU_MICRO_HIT",
     30        "BriefDescription": "Micro-predictor hit with immediate redirect"
     31    },
     32    {
     33        "PublicDescription": "Micro-predictor negative cache hit",
     34        "EventCode": "0xD6",
     35        "EventName": "IFU_MICRO_NEG_HIT",
     36        "BriefDescription": "Micro-predictor negative cache hit"
     37    },
     38    {
     39        "PublicDescription": "Micro-predictor correction",
     40        "EventCode": "0xD7",
     41        "EventName": "IFU_MICRO_CORRECTION",
     42        "BriefDescription": "Micro-predictor correction"
     43    },
     44    {
     45        "PublicDescription": "A 2nd instruction could have been pushed but was not because it was nonsequential",
     46        "EventCode": "0xD8",
     47        "EventName": "IFU_MICRO_NO_INSTR1",
     48        "BriefDescription": "A 2nd instruction could have been pushed but was not because it was nonsequential"
     49    },
     50    {
     51        "PublicDescription": "Micro-predictor miss",
     52        "EventCode": "0xD9",
     53        "EventName": "IFU_MICRO_NO_PRED",
     54        "BriefDescription": "Micro-predictor miss"
     55    },
     56    {
     57        "PublicDescription": "Thread flushed due to TLB miss",
     58        "EventCode": "0xDA",
     59        "EventName": "IFU_FLUSHED_TLB_MISS",
     60        "BriefDescription": "Thread flushed due to TLB miss"
     61    },
     62    {
     63        "PublicDescription": "Thread flushed due to reasons other than TLB miss",
     64        "EventCode": "0xDB",
     65        "EventName": "IFU_FLUSHED_EXCL_TLB_MISS",
     66        "BriefDescription": "Thread flushed due to reasons other than TLB miss"
     67    },
     68    {
     69        "PublicDescription": "This thread and the other thread both ready for scheduling in if0",
     70        "EventCode": "0xDC",
     71        "EventName": "IFU_ALL_THRDS_RDY",
     72        "BriefDescription": "This thread and the other thread both ready for scheduling in if0"
     73    },
     74    {
     75        "PublicDescription": "This thread was arbitrated when the other thread was also ready for scheduling",
     76        "EventCode": "0xDD",
     77        "EventName": "IFU_WIN_ARB_OTHER_RDY",
     78        "BriefDescription": "This thread was arbitrated when the other thread was also ready for scheduling"
     79    },
     80    {
     81        "PublicDescription": "This thread was arbitrated when the other thread was also active, but not necessarily ready. For example, waiting for I-Cache or TLB",
     82        "EventCode": "0xDE",
     83        "EventName": "IFU_WIN_ARB_OTHER_ACT",
     84        "BriefDescription": "This thread was arbitrated when the other thread was also active, but not necessarily ready. For example, waiting for I-Cache or TLB"
     85    },
     86    {
     87        "PublicDescription": "This thread was not arbitrated because it was not ready for scheduling. For example, due to a cache miss or TLB miss",
     88        "EventCode": "0xDF",
     89        "EventName": "IFU_NOT_RDY_FOR_ARB",
     90        "BriefDescription": "This thread was not arbitrated because it was not ready for scheduling. For example, due to a cache miss or TLB miss"
     91    },
     92    {
     93        "PublicDescription": "The thread moved from an active state to an inactive state (long-term sleep state, causing deallocation of some resources)",
     94        "EventCode": "0xE0",
     95        "EventName": "IFU_GOTO_IDLE",
     96        "BriefDescription": "The thread moved from an active state to an inactive state (long-term sleep state, causing deallocation of some resources)"
     97    },
     98    {
     99        "PublicDescription": "I-Cache lookup under miss from other thread",
    100        "EventCode": "0xE1",
    101        "EventName": "IFU_IC_LOOKUP_UNDER_MISS",
    102        "BriefDescription": "I-Cache lookup under miss from other thread"
    103    },
    104    {
    105        "PublicDescription": "I-Cache miss under miss from other thread",
    106        "EventCode": "0xE2",
    107        "EventName": "IFU_IC_MISS_UNDER_MISS",
    108        "BriefDescription": "I-Cache miss under miss from other thread"
    109    },
    110    {
    111        "PublicDescription": "This thread pushed an instruction into the IQ",
    112        "EventCode": "0xE3",
    113        "EventName": "IFU_INSTR_PUSHED",
    114        "BriefDescription": "This thread pushed an instruction into the IQ"
    115    },
    116    {
    117        "PublicDescription": "I-Cache Speculative line fill",
    118        "EventCode": "0xE4",
    119        "EventName": "IFU_IC_LF_SP",
    120        "BriefDescription": "I-Cache Speculative line fill"
    121    }
    122]