cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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metrics.json (9602B)

      1[
      2    {
      3        "MetricExpr": "FETCH_BUBBLE / (4 * CPU_CYCLES)",
      4        "PublicDescription": "Frontend bound L1 topdown metric",
      5        "BriefDescription": "Frontend bound L1 topdown metric",
      6        "MetricGroup": "TopDownL1",
      7        "MetricName": "frontend_bound"
      8    },
      9    {
     10        "MetricExpr": "(INST_SPEC - INST_RETIRED) / (4 * CPU_CYCLES)",
     11        "PublicDescription": "Bad Speculation L1 topdown metric",
     12        "BriefDescription": "Bad Speculation L1 topdown metric",
     13        "MetricGroup": "TopDownL1",
     14        "MetricName": "bad_speculation"
     15    },
     16    {
     17        "MetricExpr": "INST_RETIRED / (CPU_CYCLES * 4)",
     18        "PublicDescription": "Retiring L1 topdown metric",
     19        "BriefDescription": "Retiring L1 topdown metric",
     20        "MetricGroup": "TopDownL1",
     21        "MetricName": "retiring"
     22    },
     23    {
     24        "MetricExpr": "1 - (frontend_bound + bad_speculation + retiring)",
     25        "PublicDescription": "Backend Bound L1 topdown metric",
     26        "BriefDescription": "Backend Bound L1 topdown metric",
     27        "MetricGroup": "TopDownL1",
     28        "MetricName": "backend_bound"
     29    },
     30    {
     31        "MetricExpr": "armv8_pmuv3_0@event\\=0x201d@ / CPU_CYCLES",
     32        "PublicDescription": "Fetch latency bound L2 topdown metric",
     33        "BriefDescription": "Fetch latency bound L2 topdown metric",
     34        "MetricGroup": "TopDownL2",
     35        "MetricName": "fetch_latency_bound"
     36    },
     37    {
     38        "MetricExpr": "frontend_bound - fetch_latency_bound",
     39        "PublicDescription": "Fetch bandwidth bound L2 topdown metric",
     40        "BriefDescription": "Fetch bandwidth bound L2 topdown metric",
     41        "MetricGroup": "TopDownL2",
     42        "MetricName": "fetch_bandwidth_bound"
     43    },
     44    {
     45        "MetricExpr": "(bad_speculation * BR_MIS_PRED) / (BR_MIS_PRED + armv8_pmuv3_0@event\\=0x2013@)",
     46        "PublicDescription": "Branch mispredicts L2 topdown metric",
     47        "BriefDescription": "Branch mispredicts L2 topdown metric",
     48        "MetricGroup": "TopDownL2",
     49        "MetricName": "branch_mispredicts"
     50    },
     51    {
     52        "MetricExpr": "bad_speculation - branch_mispredicts",
     53        "PublicDescription": "Machine clears L2 topdown metric",
     54        "BriefDescription": "Machine clears L2 topdown metric",
     55        "MetricGroup": "TopDownL2",
     56        "MetricName": "machine_clears"
     57    },
     58    {
     59        "MetricExpr": "(EXE_STALL_CYCLE - (MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@)) / CPU_CYCLES",
     60        "PublicDescription": "Core bound L2 topdown metric",
     61        "BriefDescription": "Core bound L2 topdown metric",
     62        "MetricGroup": "TopDownL2",
     63        "MetricName": "core_bound"
     64    },
     65    {
     66        "MetricExpr": "(MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@) / CPU_CYCLES",
     67        "PublicDescription": "Memory bound L2 topdown metric",
     68        "BriefDescription": "Memory bound L2 topdown metric",
     69        "MetricGroup": "TopDownL2",
     70        "MetricName": "memory_bound"
     71    },
     72    {
     73        "MetricExpr": "(((L2I_TLB - L2I_TLB_REFILL) * 15) + (L2I_TLB_REFILL * 100)) / CPU_CYCLES",
     74        "PublicDescription": "Idle by itlb miss L3 topdown metric",
     75        "BriefDescription": "Idle by itlb miss L3 topdown metric",
     76        "MetricGroup": "TopDownL3",
     77        "MetricName": "idle_by_itlb_miss"
     78    },
     79    {
     80        "MetricExpr": "(((L2I_CACHE - L2I_CACHE_REFILL) * 15) + (L2I_CACHE_REFILL * 100)) / CPU_CYCLES",
     81        "PublicDescription": "Idle by icache miss L3 topdown metric",
     82        "BriefDescription": "Idle by icache miss L3 topdown metric",
     83        "MetricGroup": "TopDownL3",
     84        "MetricName": "idle_by_icache_miss"
     85    },
     86    {
     87        "MetricExpr": "(BR_MIS_PRED * 5) / CPU_CYCLES",
     88        "PublicDescription": "BP misp flush L3 topdown metric",
     89        "BriefDescription": "BP misp flush L3 topdown metric",
     90        "MetricGroup": "TopDownL3",
     91        "MetricName": "bp_misp_flush"
     92    },
     93    {
     94        "MetricExpr": "(armv8_pmuv3_0@event\\=0x2013@ * 5) / CPU_CYCLES",
     95        "PublicDescription": "OOO flush L3 topdown metric",
     96        "BriefDescription": "OOO flush L3 topdown metric",
     97        "MetricGroup": "TopDownL3",
     98        "MetricName": "ooo_flush"
     99    },
    100    {
    101        "MetricExpr": "(armv8_pmuv3_0@event\\=0x1001@ * 5) / CPU_CYCLES",
    102        "PublicDescription": "Static predictor flush L3 topdown metric",
    103        "BriefDescription": "Static predictor flush L3 topdown metric",
    104        "MetricGroup": "TopDownL3",
    105        "MetricName": "sp_flush"
    106    },
    107    {
    108        "MetricExpr": "armv8_pmuv3_0@event\\=0x1010@ / BR_MIS_PRED",
    109        "PublicDescription": "Indirect branch L3 topdown metric",
    110        "BriefDescription": "Indirect branch L3 topdown metric",
    111        "MetricGroup": "TopDownL3",
    112        "MetricName": "indirect_branch"
    113    },
    114    {
    115        "MetricExpr": "(armv8_pmuv3_0@event\\=0x1014@ + armv8_pmuv3_0@event\\=0x1018@) / BR_MIS_PRED",
    116        "PublicDescription": "Push branch L3 topdown metric",
    117        "BriefDescription": "Push branch L3 topdown metric",
    118        "MetricGroup": "TopDownL3",
    119        "MetricName": "push_branch"
    120    },
    121    {
    122        "MetricExpr": "armv8_pmuv3_0@event\\=0x100c@ / BR_MIS_PRED",
    123        "PublicDescription": "Pop branch L3 topdown metric",
    124        "BriefDescription": "Pop branch L3 topdown metric",
    125        "MetricGroup": "TopDownL3",
    126        "MetricName": "pop_branch"
    127    },
    128    {
    129        "MetricExpr": "(BR_MIS_PRED - armv8_pmuv3_0@event\\=0x1010@ - armv8_pmuv3_0@event\\=0x1014@ - armv8_pmuv3_0@event\\=0x1018@ - armv8_pmuv3_0@event\\=0x100c@) / BR_MIS_PRED",
    130        "PublicDescription": "Other branch L3 topdown metric",
    131        "BriefDescription": "Other branch L3 topdown metric",
    132        "MetricGroup": "TopDownL3",
    133        "MetricName": "other_branch"
    134    },
    135    {
    136        "MetricExpr": "armv8_pmuv3_0@event\\=0x2012@ / armv8_pmuv3_0@event\\=0x2013@",
    137        "PublicDescription": "Nuke flush L3 topdown metric",
    138        "BriefDescription": "Nuke flush L3 topdown metric",
    139        "MetricGroup": "TopDownL3",
    140        "MetricName": "nuke_flush"
    141    },
    142    {
    143        "MetricExpr": "1 - nuke_flush",
    144        "PublicDescription": "Other flush L3 topdown metric",
    145        "BriefDescription": "Other flush L3 topdown metric",
    146        "MetricGroup": "TopDownL3",
    147        "MetricName": "other_flush"
    148    },
    149    {
    150        "MetricExpr": "armv8_pmuv3_0@event\\=0x2010@ / CPU_CYCLES",
    151        "PublicDescription": "Sync stall L3 topdown metric",
    152        "BriefDescription": "Sync stall L3 topdown metric",
    153        "MetricGroup": "TopDownL3",
    154        "MetricName": "sync_stall"
    155    },
    156    {
    157        "MetricExpr": "armv8_pmuv3_0@event\\=0x2004@ / CPU_CYCLES",
    158        "PublicDescription": "Rob stall L3 topdown metric",
    159        "BriefDescription": "Rob stall L3 topdown metric",
    160        "MetricGroup": "TopDownL3",
    161        "MetricName": "rob_stall"
    162    },
    163    {
    164        "MetricExpr": "(armv8_pmuv3_0@event\\=0x2006@ + armv8_pmuv3_0@event\\=0x2007@ + armv8_pmuv3_0@event\\=0x2008@) / CPU_CYCLES",
    165        "PublicDescription": "Ptag stall L3 topdown metric",
    166        "BriefDescription": "Ptag stall L3 topdown metric",
    167        "MetricGroup": "TopDownL3",
    168        "MetricName": "ptag_stall"
    169    },
    170    {
    171        "MetricExpr": "armv8_pmuv3_0@event\\=0x201e@ / CPU_CYCLES",
    172        "PublicDescription": "SaveOpQ stall L3 topdown metric",
    173        "BriefDescription": "SaveOpQ stall L3 topdown metric",
    174        "MetricGroup": "TopDownL3",
    175        "MetricName": "saveopq_stall"
    176    },
    177    {
    178        "MetricExpr": "armv8_pmuv3_0@event\\=0x2005@ / CPU_CYCLES",
    179        "PublicDescription": "PC buffer stall L3 topdown metric",
    180        "BriefDescription": "PC buffer stall L3 topdown metric",
    181        "MetricGroup": "TopDownL3",
    182        "MetricName": "pc_buffer_stall"
    183    },
    184    {
    185        "MetricExpr": "armv8_pmuv3_0@event\\=0x7002@ / CPU_CYCLES",
    186        "PublicDescription": "Divider L3 topdown metric",
    187        "BriefDescription": "Divider L3 topdown metric",
    188        "MetricGroup": "TopDownL3",
    189        "MetricName": "divider"
    190    },
    191    {
    192        "MetricExpr": "armv8_pmuv3_0@event\\=0x7003@ / CPU_CYCLES",
    193        "PublicDescription": "FSU stall L3 topdown metric",
    194        "BriefDescription": "FSU stall L3 topdown metric",
    195        "MetricGroup": "TopDownL3",
    196        "MetricName": "fsu_stall"
    197    },
    198    {
    199        "MetricExpr": "core_bound - divider - fsu_stall",
    200        "PublicDescription": "EXE ports util L3 topdown metric",
    201        "BriefDescription": "EXE ports util L3 topdown metric",
    202        "MetricGroup": "TopDownL3",
    203        "MetricName": "exe_ports_util"
    204    },
    205    {
    206        "MetricExpr": "(MEM_STALL_ANYLOAD - MEM_STALL_L1MISS) / CPU_CYCLES",
    207        "PublicDescription": "L1 bound L3 topdown metric",
    208        "BriefDescription": "L1 bound L3 topdown metric",
    209        "MetricGroup": "TopDownL3",
    210        "MetricName": "l1_bound"
    211    },
    212    {
    213        "MetricExpr": "(MEM_STALL_L1MISS - MEM_STALL_L2MISS) / CPU_CYCLES",
    214        "PublicDescription": "L2 bound L3 topdown metric",
    215        "BriefDescription": "L2 bound L3 topdown metric",
    216        "MetricGroup": "TopDownL3",
    217        "MetricName": "l2_bound"
    218    },
    219    {
    220        "MetricExpr": "MEM_STALL_L2MISS / CPU_CYCLES",
    221        "PublicDescription": "Mem bound L3 topdown metric",
    222        "BriefDescription": "Mem bound L3 topdown metric",
    223        "MetricGroup": "TopDownL3",
    224        "MetricName": "mem_bound"
    225    },
    226    {
    227        "MetricExpr": "armv8_pmuv3_0@event\\=0x7005@ / CPU_CYCLES",
    228        "PublicDescription": "Store bound L3 topdown metric",
    229        "BriefDescription": "Store bound L3 topdown metric",
    230        "MetricGroup": "TopDownL3",
    231        "MetricName": "store_bound"
    232    }
    233]